sunxi_can.c revision 1.9
1 /* $NetBSD: sunxi_can.c,v 1.9 2022/09/18 15:28:01 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2017,2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Manuel Bouyer. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 33 #include "locators.h" 34 #include "opt_can.h" 35 36 37 #include <sys/cdefs.h> 38 39 __KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.9 2022/09/18 15:28:01 thorpej Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/bus.h> 43 #include <sys/device.h> 44 #include <sys/intr.h> 45 #include <sys/ioctl.h> 46 #include <sys/mutex.h> 47 #include <sys/rndsource.h> 48 #include <sys/mbuf.h> 49 #include <sys/systm.h> 50 51 #include <net/if.h> 52 #include <net/if_types.h> 53 #include <net/bpf.h> 54 55 #ifdef CAN 56 #include <netcan/can.h> 57 #include <netcan/can_var.h> 58 #endif 59 60 #include <dev/fdt/fdtvar.h> 61 62 #include <arm/sunxi/sunxi_can.h> 63 64 /* shortcut for all error interrupts */ 65 #define SUNXI_CAN_INT_ALLERRS (\ 66 SUNXI_CAN_INT_BERR | \ 67 SUNXI_CAN_INT_ARB_LOST | \ 68 SUNXI_CAN_INT_ERR_PASSIVE | \ 69 SUNXI_CAN_INT_DATA_OR | \ 70 SUNXI_CAN_INT_ERR \ 71 ) 72 73 struct sunxi_can_softc { 74 struct canif_softc sc_cansc; 75 bus_space_tag_t sc_bst; 76 bus_space_handle_t sc_bsh; 77 kmutex_t sc_intr_lock; 78 void *sc_ih; 79 struct ifnet *sc_ifp; 80 krndsource_t sc_rnd_source; /* random source */ 81 struct mbuf *sc_m_transmit; /* mbuf being transmitted */ 82 }; 83 #define sc_dev sc_cansc.csc_dev 84 #define sc_timecaps sc_cansc.csc_timecaps 85 #define sc_timings sc_cansc.csc_timings 86 #define sc_linkmodes sc_cansc.csc_linkmodes 87 88 static const struct device_compatible_entry compat_data[] = { 89 { .compat = "allwinner,sun4i-a10-can" }, 90 DEVICE_COMPAT_EOL 91 }; 92 93 static int sunxi_can_match(device_t, cfdata_t, void *); 94 static void sunxi_can_attach(device_t, device_t, void *); 95 96 static int sunxi_can_intr(void *); 97 98 static void sunxi_can_ifstart(struct ifnet *); 99 static int sunxi_can_ifioctl(struct ifnet *, u_long, void *); 100 static void sunxi_can_ifwatchdog(struct ifnet *); 101 102 static void sunxi_can_enter_reset(struct sunxi_can_softc *); 103 static void sunxi_can_exit_reset(struct sunxi_can_softc *); 104 105 CFATTACH_DECL_NEW(sunxi_can, sizeof(struct sunxi_can_softc), 106 sunxi_can_match, sunxi_can_attach, NULL, NULL); 107 108 static inline uint32_t 109 sunxi_can_read(struct sunxi_can_softc *sc, bus_size_t o) 110 { 111 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o); 112 } 113 114 static inline void 115 sunxi_can_write(struct sunxi_can_softc *sc, bus_size_t o, uint32_t v) 116 { 117 return bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v); 118 } 119 120 static int 121 sunxi_can_match(device_t parent, cfdata_t cf, void *aux) 122 { 123 struct fdt_attach_args * const faa = aux; 124 125 return of_compatible_match(faa->faa_phandle, compat_data); 126 } 127 128 static void 129 sunxi_can_attach(device_t parent, device_t self, void *aux) 130 { 131 struct sunxi_can_softc * const sc = device_private(self); 132 struct fdt_attach_args * const faa = aux; 133 struct ifnet *ifp; 134 const int phandle = faa->faa_phandle; 135 bus_addr_t addr; 136 bus_size_t size; 137 char intrstr[128]; 138 struct clk *clk; 139 struct fdtbus_reset *rst; 140 141 sc->sc_dev = self; 142 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_NET); 143 144 sc->sc_bst = faa->faa_bst; 145 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 146 aprint_error(": couldn't get registers\n"); 147 return; 148 } 149 150 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 151 aprint_error(": couldn't map registers\n"); 152 return; 153 } 154 155 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 156 aprint_error(": failed to decode interrupt\n"); 157 return; 158 } 159 160 if ((clk = fdtbus_clock_get_index(phandle, 0)) != NULL) { 161 if (clk_enable(clk) != 0) { 162 aprint_error(": couldn't enable clock\n"); 163 return; 164 } 165 } 166 167 if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL) { 168 if (fdtbus_reset_deassert(rst) != 0) { 169 aprint_error(": couldn't de-assert reset\n"); 170 return; 171 } 172 } 173 174 sc->sc_timecaps.cltc_prop_min = 0; 175 sc->sc_timecaps.cltc_prop_max = 0; 176 sc->sc_timecaps.cltc_ps1_min = 1; 177 sc->sc_timecaps.cltc_ps1_max = 16; 178 sc->sc_timecaps.cltc_ps2_min = 1; 179 sc->sc_timecaps.cltc_ps2_max = 8; 180 sc->sc_timecaps.cltc_sjw_max = 4; 181 sc->sc_timecaps.cltc_brp_min = 1; 182 sc->sc_timecaps.cltc_brp_max = 64; 183 sc->sc_timecaps.cltc_brp_inc = 1; 184 sc->sc_timecaps.cltc_clock_freq = clk_get_rate(clk); 185 sc->sc_timecaps.cltc_linkmode_caps = 186 CAN_LINKMODE_3SAMPLES | CAN_LINKMODE_LISTENONLY | 187 CAN_LINKMODE_LOOPBACK; 188 can_ifinit_timings(&sc->sc_cansc); 189 sc->sc_timings.clt_prop = 0; 190 sc->sc_timings.clt_sjw = 1; 191 192 aprint_naive("\n"); 193 aprint_normal(": CAN bus controller\n"); 194 aprint_debug_dev(self, ": clock freq %d\n", 195 sc->sc_timecaps.cltc_clock_freq); 196 197 sunxi_can_enter_reset(sc); 198 /* 199 * Disable and then clear all interrupts 200 */ 201 sunxi_can_write(sc, SUNXI_CAN_INTE_REG, 0); 202 sunxi_can_write(sc, SUNXI_CAN_INT_REG, 203 sunxi_can_read(sc, SUNXI_CAN_INT_REG)); 204 205 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_NET, 0, 206 sunxi_can_intr, sc, device_xname(self)); 207 if (sc->sc_ih == NULL) { 208 aprint_error_dev(self, "failed to establish interrupt on %s\n", 209 intrstr); 210 return; 211 } 212 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 213 214 ifp = if_alloc(IFT_OTHER); 215 sc->sc_ifp = ifp; 216 strlcpy(ifp->if_xname, device_xname(self), IFNAMSIZ); 217 ifp->if_softc = sc; 218 ifp->if_capabilities = 0; 219 ifp->if_flags = 0; 220 ifp->if_start = sunxi_can_ifstart; 221 ifp->if_ioctl = sunxi_can_ifioctl; 222 ifp->if_watchdog = sunxi_can_ifwatchdog; 223 224 /* 225 * Attach the interface. 226 */ 227 can_ifattach(ifp); 228 if_deferred_start_init(ifp, NULL); 229 bpf_mtap_softint_init(ifp); 230 rnd_attach_source(&sc->sc_rnd_source, device_xname(self), 231 RND_TYPE_NET, RND_FLAG_DEFAULT); 232 #ifdef MBUFTRACE 233 ifp->if_mowner = malloc(sizeof(struct mowner), M_DEVBUF, 234 M_WAITOK | M_ZERO); 235 strlcpy(ifp->if_mowner->mo_name, ifp->if_xname, 236 sizeof(ifp->if_mowner->mo_name)); 237 MOWNER_ATTACH(ifp->if_mowner); 238 #endif 239 } 240 241 static void 242 sunxi_can_rx_intr(struct sunxi_can_softc *sc) 243 { 244 uint32_t reg0v; 245 struct mbuf *m; 246 struct ifnet *ifp = sc->sc_ifp; 247 struct can_frame *cf; 248 int dlc; 249 int regd, i; 250 251 KASSERT(mutex_owned(&sc->sc_intr_lock)); 252 reg0v = sunxi_can_read(sc, SUNXI_CAN_TXBUF0_REG); 253 dlc = reg0v & SUNXI_CAN_TXBUF0_DL; 254 255 if (dlc > CAN_MAX_DLC) { 256 if_statinc(ifp, if_ierrors); 257 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_REL_RX_BUF); 258 return; 259 } 260 261 m = m_gethdr(M_NOWAIT, MT_HEADER); 262 if (m == NULL) { 263 if_statinc(ifp, if_ierrors); 264 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_REL_RX_BUF); 265 return; 266 } 267 cf = mtod(m, struct can_frame *); 268 memset(cf, 0, sizeof(struct can_frame)); 269 270 cf->can_dlc = dlc; 271 272 if (reg0v & SUNXI_CAN_TXBUF0_EFF) { 273 cf->can_id = 274 (sunxi_can_read(sc, SUNXI_CAN_TXBUF1_REG) << 21) | 275 (sunxi_can_read(sc, SUNXI_CAN_TXBUF2_REG) << 13) | 276 (sunxi_can_read(sc, SUNXI_CAN_TXBUF3_REG) << 5) | 277 ((sunxi_can_read(sc, SUNXI_CAN_TXBUF4_REG) >> 3) & 0x1f); 278 cf->can_id |= CAN_EFF_FLAG; 279 regd = SUNXI_CAN_TXBUF5_REG; 280 } else { 281 cf->can_id = 282 (sunxi_can_read(sc, SUNXI_CAN_TXBUF1_REG) << 3) | 283 ((sunxi_can_read(sc, SUNXI_CAN_TXBUF2_REG) << 5) & 0x7); 284 regd = SUNXI_CAN_TXBUF3_REG; 285 } 286 if (reg0v & SUNXI_CAN_TXBUF0_RTR) { 287 cf->can_id |= CAN_RTR_FLAG; 288 } else { 289 for (i = 0; i < cf->can_dlc; i++) { 290 cf->data[i] = sunxi_can_read(sc, regd + i * 4); 291 } 292 } 293 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_REL_RX_BUF); 294 m->m_len = m->m_pkthdr.len = CAN_MTU; 295 if_statadd(ifp, if_ibytes, m->m_len); 296 m_set_rcvif(m, ifp); 297 can_bpf_mtap(ifp, m, 1); 298 can_input(ifp, m); 299 } 300 301 static void 302 sunxi_can_tx_intr(struct sunxi_can_softc *sc) 303 { 304 struct ifnet * const ifp = sc->sc_ifp; 305 struct mbuf *m; 306 307 KASSERT(mutex_owned(&sc->sc_intr_lock)); 308 if ((m = sc->sc_m_transmit) != NULL) { 309 if_statadd2(ifp, if_obytes, m->m_len, if_opackets, 1); 310 can_mbuf_tag_clean(m); 311 m_set_rcvif(m, ifp); 312 can_input(ifp, m); /* loopback */ 313 sc->sc_m_transmit = NULL; 314 ifp->if_timer = 0; 315 } 316 if_schedule_deferred_start(ifp); 317 } 318 319 static int 320 sunxi_can_tx_abort(struct sunxi_can_softc *sc) 321 { 322 KASSERT(mutex_owned(&sc->sc_intr_lock)); 323 if (sc->sc_m_transmit) { 324 m_freem(sc->sc_m_transmit); 325 sc->sc_m_transmit = NULL; 326 sc->sc_ifp->if_timer = 0; 327 /* 328 * the transmit abort will trigger a TX interrupt 329 * which will restart the queue as appropriate. 330 */ 331 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_ABT_REQ); 332 return 1; 333 } 334 return 0; 335 } 336 337 static void 338 sunxi_can_err_intr(struct sunxi_can_softc *sc, uint32_t irq, uint32_t sts) 339 { 340 struct ifnet * const ifp = sc->sc_ifp; 341 KASSERT(mutex_owned(&sc->sc_intr_lock)); 342 int txerr = 0; 343 uint32_t reg; 344 345 if (irq & SUNXI_CAN_INT_DATA_OR) { 346 if_statinc(ifp, if_ierrors); 347 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_CLR_OR); 348 } 349 if (irq & SUNXI_CAN_INT_ERR) { 350 reg = sunxi_can_read(sc, SUNXI_CAN_REC_REG); 351 printf("%s: ERR interrupt status 0x%x counters 0x%x\n", 352 device_xname(sc->sc_dev), sts, reg); 353 354 } 355 if (irq & SUNXI_CAN_INT_BERR) { 356 if (sts & SUNXI_CAN_STA_TX) 357 txerr++; 358 if (sts & SUNXI_CAN_STA_RX) 359 if_statinc(ifp, if_ierrors); 360 } 361 if (irq & SUNXI_CAN_INT_ERR_PASSIVE) { 362 printf("%s: PASSV interrupt status 0x%x\n", 363 device_xname(sc->sc_dev), sts); 364 } 365 if (irq & SUNXI_CAN_INT_ARB_LOST) { 366 txerr++; 367 } 368 if (txerr) { 369 if_statadd(ifp, if_oerrors, txerr); 370 (void) sunxi_can_tx_abort(sc); 371 } 372 } 373 374 int 375 sunxi_can_intr(void *arg) 376 { 377 struct sunxi_can_softc * const sc = arg; 378 int rv = 0; 379 int irq; 380 381 mutex_enter(&sc->sc_intr_lock); 382 383 while ((irq = sunxi_can_read(sc, SUNXI_CAN_INT_REG)) != 0) { 384 uint32_t sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG); 385 rv = 1; 386 387 if (irq & SUNXI_CAN_INT_TX_FLAG) { 388 sunxi_can_tx_intr(sc); 389 } 390 if (irq & SUNXI_CAN_INT_RX_FLAG) { 391 while (sts & SUNXI_CAN_STA_RX_RDY) { 392 sunxi_can_rx_intr(sc); 393 sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG); 394 } 395 } 396 if (irq & SUNXI_CAN_INT_ALLERRS) { 397 sunxi_can_err_intr(sc, irq, sts); 398 } 399 sunxi_can_write(sc, SUNXI_CAN_INT_REG, irq); 400 rnd_add_uint32(&sc->sc_rnd_source, irq); 401 402 } 403 mutex_exit(&sc->sc_intr_lock); 404 405 return rv; 406 } 407 408 void 409 sunxi_can_ifstart(struct ifnet *ifp) 410 { 411 struct sunxi_can_softc * const sc = ifp->if_softc; 412 struct mbuf *m; 413 struct can_frame *cf; 414 int regd; 415 uint32_t reg0val; 416 int i; 417 418 mutex_enter(&sc->sc_intr_lock); 419 if (sc->sc_m_transmit != NULL) 420 goto out; 421 422 IF_DEQUEUE(&ifp->if_snd, m); 423 424 if (m == NULL) 425 goto out; 426 427 MCLAIM(m, ifp->if_mowner); 428 sc->sc_m_transmit = m; 429 430 KASSERT((m->m_flags & M_PKTHDR) != 0); 431 KASSERT(m->m_len == m->m_pkthdr.len); 432 433 cf = mtod(m, struct can_frame *); 434 reg0val = cf->can_dlc & SUNXI_CAN_TXBUF0_DL; 435 if (cf->can_id & CAN_RTR_FLAG) 436 reg0val |= SUNXI_CAN_TXBUF0_RTR; 437 438 if (cf->can_id & CAN_EFF_FLAG) { 439 reg0val |= SUNXI_CAN_TXBUF0_EFF; 440 sunxi_can_write(sc, SUNXI_CAN_TXBUF1_REG, 441 (cf->can_id >> 21) & 0xff); 442 sunxi_can_write(sc, SUNXI_CAN_TXBUF2_REG, 443 (cf->can_id >> 13) & 0xff); 444 sunxi_can_write(sc, SUNXI_CAN_TXBUF3_REG, 445 (cf->can_id >> 5) & 0xff); 446 sunxi_can_write(sc, SUNXI_CAN_TXBUF4_REG, 447 (cf->can_id << 3) & 0xf8); 448 regd = SUNXI_CAN_TXBUF5_REG; 449 } else { 450 sunxi_can_write(sc, SUNXI_CAN_TXBUF1_REG, 451 (cf->can_id >> 3) & 0xff); 452 sunxi_can_write(sc, SUNXI_CAN_TXBUF2_REG, 453 (cf->can_id << 5) & 0xe0); 454 regd = SUNXI_CAN_TXBUF3_REG; 455 } 456 457 for (i = 0; i < cf->can_dlc; i++) { 458 sunxi_can_write(sc, regd + i * 4, cf->data[i]); 459 } 460 sunxi_can_write(sc, SUNXI_CAN_TXBUF0_REG, reg0val); 461 462 if (sc->sc_linkmodes & CAN_LINKMODE_LOOPBACK) { 463 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, 464 SUNXI_CAN_CMD_TANS_REQ | SUNXI_CAN_CMD_SELF_REQ); 465 } else { 466 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_TANS_REQ); 467 } 468 ifp->if_timer = 5; 469 can_bpf_mtap(ifp, m, 0); 470 out: 471 mutex_exit(&sc->sc_intr_lock); 472 } 473 474 static int 475 sunxi_can_ifup(struct sunxi_can_softc * const sc) 476 { 477 uint32_t reg; 478 479 /* setup timings and mode - has to be done in reset */ 480 reg = SUNXI_CAN_MODSEL_RST; 481 if (sc->sc_linkmodes & CAN_LINKMODE_LISTENONLY) 482 reg |= SUNXI_CAN_MODSEL_LST_ONLY; 483 484 if (sc->sc_linkmodes & CAN_LINKMODE_LOOPBACK) 485 reg |= SUNXI_CAN_MODSEL_LB_MOD; 486 487 sunxi_can_write(sc, SUNXI_CAN_MODSEL_REG, reg); 488 489 reg = 0; 490 if (sc->sc_timings.clt_prop != 0) 491 return EINVAL; 492 493 if (sc->sc_timings.clt_brp > sc->sc_timecaps.cltc_brp_max || 494 sc->sc_timings.clt_brp < sc->sc_timecaps.cltc_brp_min) 495 return EINVAL; 496 reg |= (sc->sc_timings.clt_brp - 1) << 0; 497 498 if (sc->sc_timings.clt_ps1 > sc->sc_timecaps.cltc_ps1_max || 499 sc->sc_timings.clt_ps1 < sc->sc_timecaps.cltc_ps1_min) 500 return EINVAL; 501 reg |= (sc->sc_timings.clt_ps1 - 1) << 16; 502 503 if (sc->sc_timings.clt_ps2 > sc->sc_timecaps.cltc_ps2_max || 504 sc->sc_timings.clt_ps2 < sc->sc_timecaps.cltc_ps2_min) 505 return EINVAL; 506 reg |= (sc->sc_timings.clt_ps2 - 1) << 20; 507 508 if (sc->sc_timings.clt_sjw > sc->sc_timecaps.cltc_sjw_max || 509 sc->sc_timings.clt_sjw < 1) 510 return EINVAL; 511 reg |= (sc->sc_timings.clt_sjw - 1) << 14; 512 513 if (sc->sc_linkmodes & CAN_LINKMODE_3SAMPLES) 514 reg |= SUNXI_CAN_BUS_TIME_SAM; 515 516 sunxi_can_write(sc, SUNXI_CAN_BUS_TIME_REG, reg); 517 518 /* set filters to accept all frames */ 519 sunxi_can_write(sc, SUNXI_CAN_ACPC, 0x00000000); 520 sunxi_can_write(sc, SUNXI_CAN_ACPM, 0xffffffff); 521 522 /* clear errors counter */ 523 sunxi_can_write(sc, SUNXI_CAN_REC_REG, 0); 524 525 /* leave reset mode and enable interrupts */ 526 sunxi_can_exit_reset(sc); 527 sunxi_can_write(sc, SUNXI_CAN_INTE_REG, 528 SUNXI_CAN_INT_TX_FLAG | SUNXI_CAN_INT_RX_FLAG | SUNXI_CAN_INT_ALLERRS); 529 sc->sc_ifp->if_flags |= IFF_RUNNING; 530 return 0; 531 } 532 533 static void 534 sunxi_can_ifdown(struct sunxi_can_softc * const sc) 535 { 536 sc->sc_ifp->if_flags &= ~IFF_RUNNING; 537 sc->sc_ifp->if_timer = 0; 538 sunxi_can_enter_reset(sc); 539 sunxi_can_write(sc, SUNXI_CAN_INTE_REG, 0); 540 sunxi_can_write(sc, SUNXI_CAN_INT_REG, 541 sunxi_can_read(sc, SUNXI_CAN_INT_REG)); 542 } 543 544 static int 545 sunxi_can_ifioctl(struct ifnet *ifp, u_long cmd, void *data) 546 { 547 struct sunxi_can_softc * const sc = ifp->if_softc; 548 struct ifreq *ifr = (struct ifreq *)data; 549 int error = 0; 550 551 mutex_enter(&sc->sc_intr_lock); 552 553 switch (cmd) { 554 case SIOCINITIFADDR: 555 error = EAFNOSUPPORT; 556 break; 557 case SIOCSIFMTU: 558 if ((unsigned)ifr->ifr_mtu != sizeof(struct can_frame)) 559 error = EINVAL; 560 break; 561 case SIOCADDMULTI: 562 case SIOCDELMULTI: 563 error = EAFNOSUPPORT; 564 break; 565 default: 566 error = ifioctl_common(ifp, cmd, data); 567 if (error == 0) { 568 if ((ifp->if_flags & IFF_UP) != 0 && 569 (ifp->if_flags & IFF_RUNNING) == 0) { 570 error = sunxi_can_ifup(sc); 571 if (error) { 572 ifp->if_flags &= ~IFF_UP; 573 } 574 } else if ((ifp->if_flags & IFF_UP) == 0 && 575 (ifp->if_flags & IFF_RUNNING) != 0) { 576 sunxi_can_ifdown(sc); 577 } 578 } 579 break; 580 } 581 582 mutex_exit(&sc->sc_intr_lock); 583 return error; 584 } 585 586 void 587 sunxi_can_ifwatchdog(struct ifnet *ifp) 588 { 589 struct sunxi_can_softc * const sc = ifp->if_softc; 590 printf("%s: watchdog timeout\n", device_xname(sc->sc_dev)); 591 592 mutex_enter(&sc->sc_intr_lock); 593 printf("irq 0x%x en 0x%x mode 0x%x status 0x%x timings 0x%x err 0x%x\n", 594 sunxi_can_read(sc, SUNXI_CAN_INT_REG), 595 sunxi_can_read(sc, SUNXI_CAN_INTE_REG), 596 sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG), 597 sunxi_can_read(sc, SUNXI_CAN_STA_REG), 598 sunxi_can_read(sc, SUNXI_CAN_BUS_TIME_REG), 599 sunxi_can_read(sc, SUNXI_CAN_REC_REG)); 600 /* if there is a transmit in progress abort */ 601 if (sunxi_can_tx_abort(sc)) { 602 if_statinc(ifp, if_oerrors); 603 } 604 mutex_exit(&sc->sc_intr_lock); 605 } 606 607 static void 608 sunxi_can_enter_reset(struct sunxi_can_softc *sc) 609 { 610 int i; 611 uint32_t val; 612 613 for (i = 0; i < 1000; i++) { 614 val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG); 615 val |= SUNXI_CAN_MODSEL_RST; 616 sunxi_can_write(sc, SUNXI_CAN_MODSEL_REG, val); 617 val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG); 618 if (val & SUNXI_CAN_MODSEL_RST) 619 return; 620 } 621 printf("%s: couldn't enter reset mode\n", device_xname(sc->sc_dev)); 622 } 623 624 static void 625 sunxi_can_exit_reset(struct sunxi_can_softc *sc) 626 { 627 int i; 628 uint32_t val; 629 630 for (i = 0; i < 1000; i++) { 631 val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG); 632 val &= ~SUNXI_CAN_MODSEL_RST; 633 sunxi_can_write(sc, SUNXI_CAN_MODSEL_REG, val); 634 val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG); 635 if ((val & SUNXI_CAN_MODSEL_RST) == 0) 636 return; 637 } 638 printf("%s: couldn't leave reset mode\n", device_xname(sc->sc_dev)); 639 } 640
Indexes created Thu Oct 02 10:09:58 GMT 2025