sunxi_ccu_prediv.c revision 1.3.2.2
1 1.3.2.2 skrll /* $NetBSD: sunxi_ccu_prediv.c,v 1.3.2.2 2017/08/28 17:51:32 skrll Exp $ */ 2 1.3.2.2 skrll 3 1.3.2.2 skrll /*- 4 1.3.2.2 skrll * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 1.3.2.2 skrll * All rights reserved. 6 1.3.2.2 skrll * 7 1.3.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.3.2.2 skrll * modification, are permitted provided that the following conditions 9 1.3.2.2 skrll * are met: 10 1.3.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.3.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.3.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.3.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.3.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.3.2.2 skrll * 16 1.3.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.3.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.3.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.3.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.3.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.3.2.2 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.3.2.2 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.3.2.2 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.3.2.2 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.3.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.3.2.2 skrll * SUCH DAMAGE. 27 1.3.2.2 skrll */ 28 1.3.2.2 skrll 29 1.3.2.2 skrll #include <sys/cdefs.h> 30 1.3.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: sunxi_ccu_prediv.c,v 1.3.2.2 2017/08/28 17:51:32 skrll Exp $"); 31 1.3.2.2 skrll 32 1.3.2.2 skrll #include <sys/param.h> 33 1.3.2.2 skrll #include <sys/bus.h> 34 1.3.2.2 skrll 35 1.3.2.2 skrll #include <dev/clk/clk_backend.h> 36 1.3.2.2 skrll 37 1.3.2.2 skrll #include <arm/sunxi/sunxi_ccu.h> 38 1.3.2.2 skrll 39 1.3.2.2 skrll u_int 40 1.3.2.2 skrll sunxi_ccu_prediv_get_rate(struct sunxi_ccu_softc *sc, 41 1.3.2.2 skrll struct sunxi_ccu_clk *clk) 42 1.3.2.2 skrll { 43 1.3.2.2 skrll struct sunxi_ccu_prediv *prediv = &clk->u.prediv; 44 1.3.2.2 skrll struct clk *clkp, *clkp_parent; 45 1.3.2.2 skrll u_int rate, pre, div, sel; 46 1.3.2.2 skrll uint32_t val; 47 1.3.2.2 skrll 48 1.3.2.2 skrll KASSERT(clk->type == SUNXI_CCU_PREDIV); 49 1.3.2.2 skrll 50 1.3.2.2 skrll clkp = &clk->base; 51 1.3.2.2 skrll clkp_parent = clk_get_parent(clkp); 52 1.3.2.2 skrll if (clkp_parent == NULL) 53 1.3.2.2 skrll return 0; 54 1.3.2.2 skrll 55 1.3.2.2 skrll rate = clk_get_rate(clkp_parent); 56 1.3.2.2 skrll if (rate == 0) 57 1.3.2.2 skrll return 0; 58 1.3.2.2 skrll 59 1.3.2.2 skrll val = CCU_READ(sc, prediv->reg); 60 1.3.2.2 skrll if (prediv->prediv) 61 1.3.2.2 skrll pre = __SHIFTOUT(val, prediv->prediv); 62 1.3.2.2 skrll else 63 1.3.2.2 skrll pre = 0; 64 1.3.2.2 skrll if (prediv->div) 65 1.3.2.2 skrll div = __SHIFTOUT(val, prediv->div); 66 1.3.2.2 skrll else 67 1.3.2.2 skrll div = 0; 68 1.3.2.2 skrll sel = __SHIFTOUT(val, prediv->sel); 69 1.3.2.2 skrll 70 1.3.2.2 skrll if (prediv->flags & SUNXI_CCU_PREDIV_POWER_OF_TWO) 71 1.3.2.2 skrll div = 1 << div; 72 1.3.2.2 skrll else 73 1.3.2.2 skrll div++; 74 1.3.2.2 skrll 75 1.3.2.2 skrll if (prediv->prediv_fixed) 76 1.3.2.2 skrll pre = prediv->prediv_fixed; 77 1.3.2.2 skrll else 78 1.3.2.2 skrll pre++; 79 1.3.2.2 skrll 80 1.3.2.2 skrll if (prediv->flags & SUNXI_CCU_PREDIV_DIVIDE_BY_TWO) 81 1.3.2.2 skrll pre *= 2; 82 1.3.2.2 skrll 83 1.3.2.2 skrll if (prediv->prediv_sel & __BIT(sel)) 84 1.3.2.2 skrll return rate / pre / div; 85 1.3.2.2 skrll else 86 1.3.2.2 skrll return rate / div; 87 1.3.2.2 skrll } 88 1.3.2.2 skrll 89 1.3.2.2 skrll int 90 1.3.2.2 skrll sunxi_ccu_prediv_set_rate(struct sunxi_ccu_softc *sc, 91 1.3.2.2 skrll struct sunxi_ccu_clk *clk, u_int new_rate) 92 1.3.2.2 skrll { 93 1.3.2.2 skrll return EINVAL; 94 1.3.2.2 skrll } 95 1.3.2.2 skrll 96 1.3.2.2 skrll int 97 1.3.2.2 skrll sunxi_ccu_prediv_set_parent(struct sunxi_ccu_softc *sc, 98 1.3.2.2 skrll struct sunxi_ccu_clk *clk, const char *name) 99 1.3.2.2 skrll { 100 1.3.2.2 skrll struct sunxi_ccu_prediv *prediv = &clk->u.prediv; 101 1.3.2.2 skrll uint32_t val; 102 1.3.2.2 skrll u_int index; 103 1.3.2.2 skrll 104 1.3.2.2 skrll KASSERT(clk->type == SUNXI_CCU_PREDIV); 105 1.3.2.2 skrll 106 1.3.2.2 skrll if (prediv->sel == 0) 107 1.3.2.2 skrll return ENODEV; 108 1.3.2.2 skrll 109 1.3.2.2 skrll for (index = 0; index < prediv->nparents; index++) { 110 1.3.2.2 skrll if (prediv->parents[index] != NULL && 111 1.3.2.2 skrll strcmp(prediv->parents[index], name) == 0) 112 1.3.2.2 skrll break; 113 1.3.2.2 skrll } 114 1.3.2.2 skrll if (index == prediv->nparents) 115 1.3.2.2 skrll return EINVAL; 116 1.3.2.2 skrll 117 1.3.2.2 skrll val = CCU_READ(sc, prediv->reg); 118 1.3.2.2 skrll val &= ~prediv->sel; 119 1.3.2.2 skrll val |= __SHIFTIN(index, prediv->sel); 120 1.3.2.2 skrll CCU_WRITE(sc, prediv->reg, val); 121 1.3.2.2 skrll 122 1.3.2.2 skrll return 0; 123 1.3.2.2 skrll } 124 1.3.2.2 skrll 125 1.3.2.2 skrll const char * 126 1.3.2.2 skrll sunxi_ccu_prediv_get_parent(struct sunxi_ccu_softc *sc, 127 1.3.2.2 skrll struct sunxi_ccu_clk *clk) 128 1.3.2.2 skrll { 129 1.3.2.2 skrll struct sunxi_ccu_prediv *prediv = &clk->u.prediv; 130 1.3.2.2 skrll u_int index; 131 1.3.2.2 skrll uint32_t val; 132 1.3.2.2 skrll 133 1.3.2.2 skrll KASSERT(clk->type == SUNXI_CCU_PREDIV); 134 1.3.2.2 skrll 135 1.3.2.2 skrll val = CCU_READ(sc, prediv->reg); 136 1.3.2.2 skrll index = __SHIFTOUT(val, prediv->sel); 137 1.3.2.2 skrll 138 1.3.2.2 skrll return prediv->parents[index]; 139 1.3.2.2 skrll } 140
Indexes created Tue Oct 21 16:10:11 GMT 2025