sunxi_debe.c revision 1.3 1 /* $NetBSD: sunxi_debe.c,v 1.3 2018/04/03 12:52:16 bouyer Exp $ */
2
3 /*-
4 * Copyright (c) 2018 Manuel Bouyer <bouyer (at) antioche.eu.org>
5 * All rights reserved.
6 *
7 * Copyright (c) 2014 Jared D. McNeill <jmcneill (at) invisible.ca>
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 #include "genfb.h"
33
34 #ifndef SUNXI_DEBE_VIDEOMEM
35 #define SUNXI_DEBE_VIDEOMEM (16 * 1024 * 1024)
36 #endif
37
38 #define SUNXI_DEBE_CURMAX 64
39
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: sunxi_debe.c,v 1.3 2018/04/03 12:52:16 bouyer Exp $");
42
43 #include <sys/param.h>
44 #include <sys/bus.h>
45 #include <sys/device.h>
46 #include <sys/intr.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
49 #include <sys/mutex.h>
50 #include <sys/condvar.h>
51
52 #include <dev/fdt/fdtvar.h>
53 #include <dev/fdt/fdt_port.h>
54
55 #include <dev/videomode/videomode.h>
56 #include <dev/wscons/wsconsio.h>
57 #include <dev/wsfb/genfbvar.h>
58
59 #include <arm/sunxi/sunxi_debereg.h>
60 #include <arm/sunxi/sunxi_display.h>
61
62 enum sunxi_debe_type {
63 DEBE_A10 = 1,
64 DEBE_A20,
65 };
66
67 struct sunxi_debe_softc {
68 device_t sc_dev;
69 device_t sc_fbdev;
70 enum sunxi_debe_type sc_type;
71 bus_space_tag_t sc_bst;
72 bus_space_handle_t sc_bsh;
73 bus_dma_tag_t sc_dmat;
74
75 struct clk *sc_clk_ahb;
76 struct clk *sc_clk_mod;
77 struct clk *sc_clk_ram;
78
79 bus_dma_segment_t sc_dmasegs[1];
80 bus_size_t sc_dmasize;
81 bus_dmamap_t sc_dmamap;
82 void *sc_dmap;
83
84 bool sc_cursor_enable;
85 int sc_cursor_x, sc_cursor_y;
86 int sc_hot_x, sc_hot_y;
87 uint8_t sc_cursor_bitmap[8 * SUNXI_DEBE_CURMAX];
88 uint8_t sc_cursor_mask[8 * SUNXI_DEBE_CURMAX];
89
90 int sc_phandle;
91 struct fdt_device_ports sc_ports;
92 struct fdt_endpoint *sc_out_ep;
93 int sc_unit; /* debe0 or debe1 */
94 };
95
96 #define DEBE_READ(sc, reg) \
97 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
98 #define DEBE_WRITE(sc, reg, val) \
99 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
100
101 static const struct of_compat_data compat_data[] = {
102 {"allwinner,sun4i-a10-display-backend", DEBE_A10},
103 {"allwinner,sun7i-a20-display-backend", DEBE_A20},
104 {NULL}
105 };
106
107 struct sunxifb_attach_args {
108 void *afb_fb;
109 uint32_t afb_width;
110 uint32_t afb_height;
111 bus_dma_tag_t afb_dmat;
112 bus_dma_segment_t *afb_dmasegs;
113 int afb_ndmasegs;
114 };
115
116 static void sunxi_debe_ep_connect(device_t, struct fdt_endpoint *, bool);
117 static int sunxi_debe_ep_enable(device_t, struct fdt_endpoint *, bool);
118 static int sunxi_debe_match(device_t, cfdata_t, void *);
119 static void sunxi_debe_attach(device_t, device_t, void *);
120
121 static int sunxi_debe_alloc_videomem(struct sunxi_debe_softc *);
122 static void sunxi_debe_setup_fbdev(struct sunxi_debe_softc *,
123 const struct videomode *);
124
125 static int sunxi_debe_set_curpos(struct sunxi_debe_softc *, int, int);
126 static int sunxi_debe_set_cursor(struct sunxi_debe_softc *,
127 struct wsdisplay_cursor *);
128 static int sunxi_debe_ioctl(device_t, u_long, void *);
129 static void sunxi_befb_set_videomode(device_t, u_int, u_int);
130 void sunxi_debe_dump_regs(int);
131
132 CFATTACH_DECL_NEW(sunxi_debe, sizeof(struct sunxi_debe_softc),
133 sunxi_debe_match, sunxi_debe_attach, NULL, NULL);
134
135 static int
136 sunxi_debe_match(device_t parent, cfdata_t cf, void *aux)
137 {
138 struct fdt_attach_args * const faa = aux;
139
140 return of_match_compat_data(faa->faa_phandle, compat_data);
141 }
142
143 static void
144 sunxi_debe_attach(device_t parent, device_t self, void *aux)
145 {
146 struct sunxi_debe_softc *sc = device_private(self);
147 struct fdt_attach_args * const faa = aux;
148 const int phandle = faa->faa_phandle;
149 bus_addr_t addr;
150 bus_size_t size;
151 struct fdtbus_reset *rst;
152 #if NAWIN_MP > 0
153 device_t mpdev;
154 #endif
155 #ifdef AWIN_DEBE_FWINIT
156 struct videomode mode;
157 #endif
158 int error;
159
160 sc->sc_dev = self;
161 sc->sc_phandle = phandle;
162 sc->sc_bst = faa->faa_bst;
163 sc->sc_dmat = faa->faa_dmat;
164 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
165 aprint_error(": couldn't get registers\n");
166 }
167 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
168 aprint_error(": couldn't map registers\n");
169 return;
170 }
171
172 sc->sc_clk_ahb = fdtbus_clock_get(phandle, "ahb");
173 sc->sc_clk_mod = fdtbus_clock_get(phandle, "mod");
174 sc->sc_clk_ram = fdtbus_clock_get(phandle, "ram");
175
176 rst = fdtbus_reset_get_index(phandle, 0);
177 if (rst == NULL) {
178 aprint_error(": couldn't get reset\n");
179 return;
180 }
181 if (fdtbus_reset_assert(rst) != 0) {
182 aprint_error(": couldn't assert reset\n");
183 return;
184 }
185 delay(1);
186 if (fdtbus_reset_deassert(rst) != 0) {
187 aprint_error(": couldn't de-assert reset\n");
188 return;
189 }
190
191 if (sc->sc_clk_ahb == NULL || sc->sc_clk_mod == NULL
192 || sc->sc_clk_ram == NULL) {
193 aprint_error(": couldn't get clocks\n");
194 aprint_debug_dev(self, "clk ahb %s mod %s ram %s\n",
195 sc->sc_clk_ahb == NULL ? "missing" : "present",
196 sc->sc_clk_mod == NULL ? "missing" : "present",
197 sc->sc_clk_ram == NULL ? "missing" : "present");
198 return;
199 }
200
201 error = clk_set_rate(sc->sc_clk_mod, 300000000);
202 if (error) {
203 aprint_error("couln't set mod clock rate (%d)\n", error);
204 return;
205 }
206
207 if (clk_enable(sc->sc_clk_ahb) != 0 ||
208 clk_enable(sc->sc_clk_mod) != 0 ||
209 clk_enable(sc->sc_clk_ram) != 0) {
210 aprint_error(": couldn't enable clocks\n");
211 return;
212 }
213
214 sc->sc_type = of_search_compatible(faa->faa_phandle, compat_data)->data;
215
216 aprint_naive("\n");
217 aprint_normal(": Display Engine Backend (%s)\n",
218 fdtbus_get_string(phandle, "name"));
219
220
221 #ifdef AWIN_DEBE_FWINIT
222 const uint32_t modctl = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
223 const uint32_t dissize = DEBE_READ(sc, SUNXI_DEBE_DISSIZE_REG);
224 if ((modctl & SUNXI_DEBE_MODCTL_EN) == 0) {
225 aprint_error_dev(sc->sc_dev, "disabled\n");
226 return;
227 }
228 if ((modctl & SUNXI_DEBE_MODCTL_START_CTL) == 0) {
229 aprint_error_dev(sc->sc_dev, "stopped\n");
230 return;
231 }
232 memset(&mode, 0, sizeof(mode));
233 mode.hdisplay = (dissize & 0xffff) + 1;
234 mode.vdisplay = ((dissize >> 16) & 0xffff) + 1;
235
236 if (mode.hdisplay == 1 || mode.vdisplay == 1) {
237 aprint_error_dev(sc->sc_dev,
238 "couldn't determine video mode\n");
239 return;
240 }
241
242 aprint_verbose_dev(sc->sc_dev, "using %dx%d mode from firmware\n",
243 mode.hdisplay, mode.vdisplay);
244
245 sc->sc_dmasize = mode.hdisplay * mode.vdisplay * 4;
246 #else
247 for (unsigned int reg = 0x800; reg < 0x1000; reg += 4) {
248 DEBE_WRITE(sc, reg, 0);
249 }
250
251 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, SUNXI_DEBE_MODCTL_EN);
252
253 sc->sc_dmasize = SUNXI_DEBE_VIDEOMEM;
254 #endif
255
256 DEBE_WRITE(sc, SUNXI_DEBE_HWC_PALETTE_TABLE, 0);
257
258 error = sunxi_debe_alloc_videomem(sc);
259 if (error) {
260 aprint_error_dev(sc->sc_dev,
261 "couldn't allocate video memory, error = %d\n", error);
262 return;
263 }
264
265 #if NAWIN_MP > 0
266 mpdev = device_find_by_driver_unit("sunximp", 0);
267 if (mpdev) {
268 paddr_t pa = sc->sc_dmamap->dm_segs[0].ds_addr;
269 if (pa >= SUNXI_SDRAM_PBASE)
270 pa -= SUNXI_SDRAM_PBASE;
271 sunxi_mp_setbase(mpdev, pa, sc->sc_dmasize);
272 }
273 #endif
274 sc->sc_unit = -1;
275 sc->sc_ports.dp_ep_connect = sunxi_debe_ep_connect;
276 sc->sc_ports.dp_ep_enable = sunxi_debe_ep_enable;
277 fdt_ports_register(&sc->sc_ports, self, phandle, EP_OTHER);
278
279 #ifdef AWIN_DEBE_FWINIT
280 sunxi_debe_set_videomode(device_unit(self), &mode);
281 sunxi_debe_enable(device_unit(self), true);
282 #endif
283 }
284
285
286
287 static void
288 sunxi_debe_ep_connect(device_t self, struct fdt_endpoint *ep, bool connect)
289 {
290 struct sunxi_debe_softc *sc = device_private(self);
291 struct fdt_endpoint *rep = fdt_endpoint_remote(ep);
292 int rep_idx = fdt_endpoint_index(rep);
293
294 KASSERT(device_is_a(self, "sunxidebe"));
295 if (!connect) {
296 aprint_error_dev(self, "endpoint disconnect not supported\n");
297 return;
298 }
299
300 if (fdt_endpoint_port_index(ep) == 1) {
301 bool do_print = (sc->sc_unit == -1);
302 /*
303 * one of our output endpoints has been connected.
304 * the remote id is our unit number
305 */
306 if (sc->sc_unit != -1 && rep_idx != -1 &&
307 sc->sc_unit != rep_idx) {
308 aprint_error_dev(self, ": remote id %d doens't match"
309 " discovered unit number %d\n",
310 rep_idx, sc->sc_unit);
311 return;
312 }
313 if (!device_is_a(fdt_endpoint_device(rep), "sunxitcon")) {
314 aprint_error_dev(self,
315 ": output %d connected to unknown device\n",
316 fdt_endpoint_index(ep));
317 return;
318 }
319 if (rep_idx != -1)
320 sc->sc_unit = rep_idx;
321 else {
322 /* assume only one debe */
323 sc->sc_unit = 0;
324 }
325 if (do_print)
326 aprint_verbose_dev(self, "debe unit %d\n", sc->sc_unit);
327 }
328 }
329
330 static int
331 sunxi_debe_alloc_videomem(struct sunxi_debe_softc *sc)
332 {
333 int error, nsegs;
334
335 error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dmasize, 0x1000, 0,
336 sc->sc_dmasegs, 1, &nsegs, BUS_DMA_WAITOK);
337 if (error)
338 return error;
339 error = bus_dmamem_map(sc->sc_dmat, sc->sc_dmasegs, nsegs,
340 sc->sc_dmasize, &sc->sc_dmap, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
341 if (error)
342 goto free;
343 error = bus_dmamap_create(sc->sc_dmat, sc->sc_dmasize, 1,
344 sc->sc_dmasize, 0, BUS_DMA_WAITOK, &sc->sc_dmamap);
345 if (error)
346 goto unmap;
347 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_dmap,
348 sc->sc_dmasize, NULL, BUS_DMA_WAITOK);
349 if (error)
350 goto destroy;
351
352 memset(sc->sc_dmap, 0, sc->sc_dmasize);
353
354 return 0;
355
356 destroy:
357 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap);
358 unmap:
359 bus_dmamem_unmap(sc->sc_dmat, sc->sc_dmap, sc->sc_dmasize);
360 free:
361 bus_dmamem_free(sc->sc_dmat, sc->sc_dmasegs, nsegs);
362
363 sc->sc_dmasize = 0;
364 sc->sc_dmap = NULL;
365
366 return error;
367 }
368
369 static void
370 sunxi_debe_setup_fbdev(struct sunxi_debe_softc *sc, const struct videomode *mode)
371 {
372 if (mode == NULL)
373 return;
374
375 const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
376 const u_int fb_width = mode->hdisplay;
377 const u_int fb_height = (mode->vdisplay << interlace_p);
378
379 if (mode && sc->sc_fbdev == NULL) {
380 struct sunxifb_attach_args afb = {
381 .afb_fb = sc->sc_dmap,
382 .afb_width = fb_width,
383 .afb_height = fb_height,
384 .afb_dmat = sc->sc_dmat,
385 .afb_dmasegs = sc->sc_dmasegs,
386 .afb_ndmasegs = 1
387 };
388 sc->sc_fbdev = config_found_ia(sc->sc_dev, "sunxidebe",
389 &afb, NULL);
390 } else if (sc->sc_fbdev != NULL) {
391 sunxi_befb_set_videomode(sc->sc_fbdev, fb_width, fb_height);
392 }
393 }
394
395 static int
396 sunxi_debe_set_curpos(struct sunxi_debe_softc *sc, int x, int y)
397 {
398 int xx, yy;
399 u_int yoff, xoff;
400
401 xoff = yoff = 0;
402 xx = x - sc->sc_hot_x;
403 yy = y - sc->sc_hot_y;
404 if (xx < 0) {
405 xoff -= xx;
406 xx = 0;
407 }
408 if (yy < 0) {
409 yoff -= yy;
410 yy = 0;
411 }
412
413 DEBE_WRITE(sc, SUNXI_DEBE_HWCCTL_REG,
414 __SHIFTIN(yy, SUNXI_DEBE_HWCCTL_YCOOR) |
415 __SHIFTIN(xx, SUNXI_DEBE_HWCCTL_XCOOR));
416 DEBE_WRITE(sc, SUNXI_DEBE_HWCFBCTL_REG,
417 #if SUNXI_DEBE_CURMAX == 32
418 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_32, SUNXI_DEBE_HWCFBCTL_YSIZE) |
419 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_32, SUNXI_DEBE_HWCFBCTL_XSIZE) |
420 #else
421 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_64, SUNXI_DEBE_HWCFBCTL_YSIZE) |
422 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_64, SUNXI_DEBE_HWCFBCTL_XSIZE) |
423 #endif
424 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_FBFMT_2BPP, SUNXI_DEBE_HWCFBCTL_FBFMT) |
425 __SHIFTIN(yoff, SUNXI_DEBE_HWCFBCTL_YCOOROFF) |
426 __SHIFTIN(xoff, SUNXI_DEBE_HWCFBCTL_XCOOROFF));
427
428 return 0;
429 }
430
431 static int
432 sunxi_debe_set_cursor(struct sunxi_debe_softc *sc, struct wsdisplay_cursor *cur)
433 {
434 uint32_t val;
435 uint8_t r[4], g[4], b[4];
436 u_int index, count, shift, off, pcnt;
437 int i, j, idx, error;
438 uint8_t mask;
439
440 if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
441 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
442 if (cur->enable)
443 val |= SUNXI_DEBE_MODCTL_HWC_EN;
444 else
445 val &= ~SUNXI_DEBE_MODCTL_HWC_EN;
446 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
447
448 sc->sc_cursor_enable = cur->enable;
449 }
450
451 if (cur->which & WSDISPLAY_CURSOR_DOHOT) {
452 sc->sc_hot_x = cur->hot.x;
453 sc->sc_hot_y = cur->hot.y;
454 cur->which |= WSDISPLAY_CURSOR_DOPOS;
455 }
456
457 if (cur->which & WSDISPLAY_CURSOR_DOPOS) {
458 sunxi_debe_set_curpos(sc, cur->pos.x, cur->pos.y);
459 }
460
461 if (cur->which & WSDISPLAY_CURSOR_DOCMAP) {
462 index = cur->cmap.index;
463 count = cur->cmap.count;
464 if (index >= 2 || count > 2 - index)
465 return EINVAL;
466 error = copyin(cur->cmap.red, &r[index], count);
467 if (error)
468 return error;
469 error = copyin(cur->cmap.green, &g[index], count);
470 if (error)
471 return error;
472 error = copyin(cur->cmap.blue, &b[index], count);
473 if (error)
474 return error;
475
476 for (i = index; i < (index + count); i++) {
477 DEBE_WRITE(sc,
478 SUNXI_DEBE_HWC_PALETTE_TABLE + (4 * (i + 2)),
479 (r[i] << 16) | (g[i] << 8) | b[i] | 0xff000000);
480 }
481 }
482
483 if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) {
484 error = copyin(cur->mask, sc->sc_cursor_mask,
485 SUNXI_DEBE_CURMAX * 8);
486 if (error)
487 return error;
488 error = copyin(cur->image, sc->sc_cursor_bitmap,
489 SUNXI_DEBE_CURMAX * 8);
490 if (error)
491 return error;
492 }
493
494 if (cur->which & (WSDISPLAY_CURSOR_DOCMAP|WSDISPLAY_CURSOR_DOSHAPE)) {
495 for (i = 0, pcnt = 0; i < SUNXI_DEBE_CURMAX * 8; i++) {
496 for (j = 0, mask = 1; j < 8; j++, mask <<= 1, pcnt++) {
497 idx = ((sc->sc_cursor_mask[i] & mask) ? 2 : 0) |
498 ((sc->sc_cursor_bitmap[i] & mask) ? 1 : 0);
499 off = (pcnt >> 4) * 4;
500 shift = (pcnt & 0xf) * 2;
501 val = DEBE_READ(sc,
502 SUNXI_DEBE_HWC_PATTERN_BLOCK + off);
503 val &= ~(3 << shift);
504 val |= (idx << shift);
505 DEBE_WRITE(sc,
506 SUNXI_DEBE_HWC_PATTERN_BLOCK + off, val);
507 }
508 }
509 }
510
511 return 0;
512 }
513
514 static int
515 sunxi_debe_ep_enable(device_t dev, struct fdt_endpoint *ep, bool enable)
516 {
517 struct sunxi_debe_softc *sc;
518 uint32_t val;
519
520 KASSERT(device_is_a(dev, "sunxidebe"));
521 sc = device_private(dev);
522
523 if (enable) {
524 val = DEBE_READ(sc, SUNXI_DEBE_REGBUFFCTL_REG);
525 val |= SUNXI_DEBE_REGBUFFCTL_REGLOADCTL;
526 DEBE_WRITE(sc, SUNXI_DEBE_REGBUFFCTL_REG, val);
527
528 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
529 val |= SUNXI_DEBE_MODCTL_START_CTL;
530 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
531 #ifdef SUNXI_DEBE_DEBUG
532 sunxi_debe_dump_regs(sc->sc_unit);
533 #endif
534 } else {
535 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
536 val &= ~SUNXI_DEBE_MODCTL_START_CTL;
537 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
538 }
539 #if 0
540 for (int i = 0; i < 0x1000; i += 4) {
541 printf("DEBE 0x%04x: 0x%08x\n", i, DEBE_READ(sc, i));
542 }
543 #endif
544 return 0;
545 }
546
547 void
548 sunxi_debe_set_videomode(device_t dev, const struct videomode *mode)
549 {
550 struct sunxi_debe_softc *sc;
551 uint32_t val;
552
553 KASSERT(device_is_a(dev, "sunxidebe"));
554 sc = device_private(dev);
555
556 if (mode) {
557 const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
558 const u_int width = mode->hdisplay;
559 const u_int height = (mode->vdisplay << interlace_p);
560 const u_int fb_width = width;
561 const u_int fb_height = height;
562 uint32_t vmem = width * height * 4;
563
564 if (vmem > sc->sc_dmasize) {
565 device_printf(sc->sc_dev,
566 "not enough memory for %ux%u fb (req %u have %u)\n",
567 width, height, vmem, (unsigned int)sc->sc_dmasize);
568 return;
569 }
570
571 paddr_t pa = sc->sc_dmamap->dm_segs[0].ds_addr;
572 #if !defined(ALLWINNER_A80) && 0
573 #define SUNXI_SDRAM_PBASE-0 0x40000000
574 /*
575 * On 2GB systems, we need to subtract AWIN_SDRAM_PBASE from
576 * the phys addr.
577 */
578 if (pa >= SUNXI_SDRAM_PBASE)
579 pa -= SUNXI_SDRAM_PBASE;
580 #endif
581
582 /* notify fb */
583 sunxi_debe_setup_fbdev(sc, mode);
584
585 DEBE_WRITE(sc, SUNXI_DEBE_DISSIZE_REG,
586 ((height - 1) << 16) | (width - 1));
587 DEBE_WRITE(sc, SUNXI_DEBE_LAYSIZE_REG,
588 ((fb_height - 1) << 16) | (fb_width - 1));
589 DEBE_WRITE(sc, SUNXI_DEBE_LAYCOOR_REG, 0);
590 DEBE_WRITE(sc, SUNXI_DEBE_LAYLINEWIDTH_REG, (fb_width << 5));
591 DEBE_WRITE(sc, SUNXI_DEBE_LAYFB_L32ADD_REG, pa << 3);
592 DEBE_WRITE(sc, SUNXI_DEBE_LAYFB_H4ADD_REG, pa >> 29);
593
594 val = DEBE_READ(sc, SUNXI_DEBE_ATTCTL1_REG);
595 val &= ~SUNXI_DEBE_ATTCTL1_LAY_FBFMT;
596 val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBFMT_XRGB8888,
597 SUNXI_DEBE_ATTCTL1_LAY_FBFMT);
598 val &= ~SUNXI_DEBE_ATTCTL1_LAY_BRSWAPEN;
599 val &= ~SUNXI_DEBE_ATTCTL1_LAY_FBPS;
600 #if __ARMEB__
601 val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBPS_32BPP_BGRA,
602 SUNXI_DEBE_ATTCTL1_LAY_FBPS);
603 #else
604 val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBPS_32BPP_ARGB,
605 SUNXI_DEBE_ATTCTL1_LAY_FBPS);
606 #endif
607 DEBE_WRITE(sc, SUNXI_DEBE_ATTCTL1_REG, val);
608
609 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
610 val |= SUNXI_DEBE_MODCTL_LAY0_EN;
611 if (interlace_p) {
612 val |= SUNXI_DEBE_MODCTL_ITLMOD_EN;
613 } else {
614 val &= ~SUNXI_DEBE_MODCTL_ITLMOD_EN;
615 }
616 val &= ~SUNXI_DEBE_MODCTL_OUT_SEL;
617 if (sc->sc_unit == 1) {
618 val |= __SHIFTIN(SUNXI_DEBE_MODCTL_OUT_SEL_LCD1,
619 SUNXI_DEBE_MODCTL_OUT_SEL);
620 }
621 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
622 } else {
623 /* disable */
624 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
625 val &= ~SUNXI_DEBE_MODCTL_LAY0_EN;
626 val &= ~SUNXI_DEBE_MODCTL_START_CTL;
627 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
628
629 /* notify fb */
630 sunxi_debe_setup_fbdev(sc, mode);
631 }
632 }
633
634 static int
635 sunxi_debe_ioctl(device_t self, u_long cmd, void *data)
636 {
637 struct sunxi_debe_softc *sc = device_private(self);
638 struct wsdisplay_curpos *cp;
639 uint32_t val;
640 int enable;
641
642 switch (cmd) {
643 case WSDISPLAYIO_SVIDEO:
644 enable = *(int *)data;
645 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
646 if (enable) {
647 if (val & SUNXI_DEBE_MODCTL_START_CTL) {
648 /* already enabled */
649 return 0;
650 }
651 } else {
652 if ((val & SUNXI_DEBE_MODCTL_START_CTL) == 0) {
653 /* already disabled */
654 return 0;
655 }
656 }
657 return fdt_endpoint_enable(sc->sc_out_ep, enable);
658 case WSDISPLAYIO_GVIDEO:
659 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
660 *(int *)data = !!(val & SUNXI_DEBE_MODCTL_LAY0_EN);
661 return 0;
662 case WSDISPLAYIO_GCURPOS:
663 cp = data;
664 cp->x = sc->sc_cursor_x;
665 cp->y = sc->sc_cursor_y;
666 return 0;
667 case WSDISPLAYIO_SCURPOS:
668 cp = data;
669 return sunxi_debe_set_curpos(sc, cp->x, cp->y);
670 case WSDISPLAYIO_GCURMAX:
671 cp = data;
672 cp->x = SUNXI_DEBE_CURMAX;
673 cp->y = SUNXI_DEBE_CURMAX;
674 return 0;
675 case WSDISPLAYIO_SCURSOR:
676 return sunxi_debe_set_cursor(sc, data);
677 }
678
679 return EPASSTHROUGH;
680 }
681
682 /* genfb attachement */
683
684 struct sunxi_befb_softc {
685 struct genfb_softc sc_gen;
686 device_t sc_debedev;
687 device_t sc_mpdev;
688
689 bus_dma_tag_t sc_dmat;
690 bus_dma_segment_t *sc_dmasegs;
691 int sc_ndmasegs;
692 };
693
694 static device_t sunxi_befb_consoledev = NULL;
695
696 static int sunxi_befb_match(device_t, cfdata_t, void *);
697 static void sunxi_befb_attach(device_t, device_t, void *);
698
699 static int sunxi_befb_ioctl(void *, void *, u_long, void *, int, lwp_t *);
700 static paddr_t sunxi_befb_mmap(void *, void *, off_t, int);
701 static bool sunxi_befb_shutdown(device_t, int);
702
703 CFATTACH_DECL_NEW(sunxi_befb, sizeof(struct sunxi_befb_softc),
704 sunxi_befb_match, sunxi_befb_attach, NULL, NULL);
705
706 static int
707 sunxi_befb_match(device_t parent, cfdata_t cf, void *aux)
708 {
709 return 1;
710 }
711
712 static void
713 sunxi_befb_attach(device_t parent, device_t self, void *aux)
714 {
715 struct sunxi_befb_softc *sc = device_private(self);
716 struct sunxifb_attach_args * const afb = aux;
717 prop_dictionary_t cfg = device_properties(self);
718 struct genfb_ops ops;
719
720 if (sunxi_befb_consoledev == NULL)
721 sunxi_befb_consoledev = self;
722
723 sc->sc_gen.sc_dev = self;
724 sc->sc_debedev = parent;
725 sc->sc_dmat = afb->afb_dmat;
726 sc->sc_dmasegs = afb->afb_dmasegs;
727 sc->sc_ndmasegs = afb->afb_ndmasegs;
728 sc->sc_mpdev = device_find_by_driver_unit("sunximp", 0);
729
730 prop_dictionary_set_uint32(cfg, "width", afb->afb_width);
731 prop_dictionary_set_uint32(cfg, "height", afb->afb_height);
732 prop_dictionary_set_uint8(cfg, "depth", 32);
733 prop_dictionary_set_uint16(cfg, "linebytes", afb->afb_width * 4);
734 prop_dictionary_set_uint32(cfg, "address", 0);
735 prop_dictionary_set_uint32(cfg, "virtual_address",
736 (uintptr_t)afb->afb_fb);
737
738 genfb_init(&sc->sc_gen);
739
740 if (sc->sc_gen.sc_width == 0 || sc->sc_gen.sc_fbsize == 0) {
741 aprint_normal(": disabled\n");
742 return;
743 }
744
745 pmf_device_register1(self, NULL, NULL, sunxi_befb_shutdown);
746
747 memset(&ops, 0, sizeof(ops));
748 ops.genfb_ioctl = sunxi_befb_ioctl;
749 ops.genfb_mmap = sunxi_befb_mmap;
750
751 aprint_naive("\n");
752
753 bool is_console = false;
754 prop_dictionary_set_bool(cfg, "is_console", is_console);
755
756 if (is_console)
757 aprint_normal(": switching to framebuffer console\n");
758 else
759 aprint_normal("\n");
760
761 genfb_attach(&sc->sc_gen, &ops);
762 }
763
764 static int
765 sunxi_befb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l)
766 {
767 struct sunxi_befb_softc *sc = v;
768 struct wsdisplayio_bus_id *busid;
769 struct wsdisplayio_fbinfo *fbi;
770 struct rasops_info *ri;
771 int error;
772
773 switch (cmd) {
774 case WSDISPLAYIO_GTYPE:
775 *(u_int *)data = WSDISPLAY_TYPE_ALLWINNER;
776 return 0;
777 case WSDISPLAYIO_GET_BUSID:
778 busid = data;
779 busid->bus_type = WSDISPLAYIO_BUS_SOC;
780 return 0;
781 case WSDISPLAYIO_GET_FBINFO:
782 fbi = data;
783 ri = &sc->sc_gen.vd.active->scr_ri;
784 error = wsdisplayio_get_fbinfo(ri, fbi);
785 if (error == 0) {
786 fbi->fbi_flags |= WSFB_VRAM_IS_RAM;
787 fbi->fbi_fbsize = sc->sc_dmasegs[0].ds_len;
788 #if NAWIN_MP > 0
789 if (sc->sc_mpdev)
790 fbi->fbi_flags |= WSFB_ACCEL;
791 #endif
792 }
793 return error;
794 case WSDISPLAYIO_SVIDEO:
795 case WSDISPLAYIO_GVIDEO:
796 case WSDISPLAYIO_GCURPOS:
797 case WSDISPLAYIO_SCURPOS:
798 case WSDISPLAYIO_GCURMAX:
799 case WSDISPLAYIO_SCURSOR:
800 return sunxi_debe_ioctl(sc->sc_debedev, cmd, data);
801 #if NAWIN_MP > 0
802 case WSDISPLAYIO_FILL:
803 case WSDISPLAYIO_COPY:
804 case WSDISPLAYIO_SYNC:
805 if (sc->sc_mpdev == NULL)
806 return EPASSTHROUGH;
807 return sunxi_mp_ioctl(sc->sc_mpdev, cmd, data);
808 #endif
809 default:
810 return EPASSTHROUGH;
811 }
812 }
813
814 static paddr_t
815 sunxi_befb_mmap(void *v, void *vs, off_t off, int prot)
816 {
817 struct sunxi_befb_softc *sc = v;
818
819 if (off < 0 || off >= sc->sc_dmasegs[0].ds_len)
820 return -1;
821
822 return bus_dmamem_mmap(sc->sc_dmat, sc->sc_dmasegs, sc->sc_ndmasegs,
823 off, prot, BUS_DMA_PREFETCHABLE);
824 }
825
826 static bool
827 sunxi_befb_shutdown(device_t self, int flags)
828 {
829 genfb_enable_polling(self);
830 return true;
831 }
832
833 static void
834 sunxi_befb_set_videomode(device_t dev, u_int width, u_int height)
835 {
836 struct sunxi_befb_softc *sc = device_private(dev);
837
838 if (sc->sc_gen.sc_width != width || sc->sc_gen.sc_height != height) {
839 device_printf(sc->sc_gen.sc_dev,
840 "mode switching not yet supported\n");
841 }
842 }
843
844 int
845 sunxi_debe_pipeline(int phandle, bool active)
846 {
847 device_t dev;
848 struct sunxi_debe_softc *sc;
849 struct fdt_endpoint *ep;
850 int i, error;
851
852 if (!active)
853 return EOPNOTSUPP;
854
855 for (i = 0;;i++) {
856 dev = device_find_by_driver_unit("sunxidebe", i);
857 if (dev == NULL)
858 return ENODEV;
859 sc = device_private(dev);
860 if (sc->sc_phandle == phandle)
861 break;
862 }
863 aprint_normal("activate %s\n", device_xname(dev));
864 /* connect debd0 to tcon0, debe1 to tcon1 */
865 ep = fdt_endpoint_get_from_index(&sc->sc_ports, SUNXI_PORT_OUTPUT,
866 sc->sc_unit);
867 if (ep == NULL) {
868 aprint_error_dev(dev, "no output endpoint for %d\n",
869 sc->sc_unit);
870 return ENODEV;
871 }
872 error = fdt_endpoint_activate(ep, true);
873 if (error == 0) {
874 sc->sc_out_ep = ep;
875 fdt_endpoint_enable(ep, true);
876 }
877 return error;
878 }
879
880 #if defined(SUNXI_DEBE_DEBUG)
881 void
882 sunxi_debe_dump_regs(int u)
883 {
884 static const struct {
885 const char *name;
886 uint16_t reg;
887 } regs[] = {
888 { "SUNXI_DEBE_MODCTL_REG", SUNXI_DEBE_MODCTL_REG},
889 { "SUNXI_DEBE_BACKCOLOR_REG", SUNXI_DEBE_BACKCOLOR_REG},
890 { "SUNXI_DEBE_DISSIZE_REG", SUNXI_DEBE_DISSIZE_REG},
891 { "SUNXI_DEBE_LAYSIZE_REG", SUNXI_DEBE_LAYSIZE_REG},
892 { "SUNXI_DEBE_LAYCOOR_REG", SUNXI_DEBE_LAYCOOR_REG},
893 { "SUNXI_DEBE_LAYLINEWIDTH_REG", SUNXI_DEBE_LAYLINEWIDTH_REG},
894 { "SUNXI_DEBE_LAYFB_L32ADD_REG", SUNXI_DEBE_LAYFB_L32ADD_REG},
895 { "SUNXI_DEBE_LAYFB_H4ADD_REG", SUNXI_DEBE_LAYFB_H4ADD_REG},
896 { "SUNXI_DEBE_REGBUFFCTL_REG", SUNXI_DEBE_REGBUFFCTL_REG},
897 { "SUNXI_DEBE_CKMAX_REG", SUNXI_DEBE_CKMAX_REG},
898 { "SUNXI_DEBE_CKMIN_REG", SUNXI_DEBE_CKMIN_REG},
899 { "SUNXI_DEBE_CKCFG_REG", SUNXI_DEBE_CKCFG_REG},
900 { "SUNXI_DEBE_ATTCTL0_REG", SUNXI_DEBE_ATTCTL0_REG},
901 { "SUNXI_DEBE_ATTCTL1_REG", SUNXI_DEBE_ATTCTL1_REG},
902 { "SUNXI_DEBE_HWCCTL_REG", SUNXI_DEBE_HWCCTL_REG},
903 { "SUNXI_DEBE_HWCFBCTL_REG", SUNXI_DEBE_HWCFBCTL_REG},
904 { "SUNXI_DEBE_WBCTL_REG", SUNXI_DEBE_WBCTL_REG},
905 { "SUNXI_DEBE_WBADD_REG", SUNXI_DEBE_WBADD_REG},
906 { "SUNXI_DEBE_WBLINEWIDTH_REG", SUNXI_DEBE_WBLINEWIDTH_REG},
907 { "SUNXI_DEBE_IYUVCTL_REG", SUNXI_DEBE_IYUVCTL_REG},
908 { "SUNXI_DEBE_IYUVADD_REG", SUNXI_DEBE_IYUVADD_REG},
909 { "SUNXI_DEBE_IYUVLINEWIDTH_REG", SUNXI_DEBE_IYUVLINEWIDTH_REG},
910 { "SUNXI_DEBE_YGCOEF_REG", SUNXI_DEBE_YGCOEF_REG},
911 { "SUNXI_DEBE_YGCONS_REG", SUNXI_DEBE_YGCONS_REG},
912 { "SUNXI_DEBE_URCOEF_REG", SUNXI_DEBE_URCOEF_REG},
913 { "SUNXI_DEBE_URCONS_REG", SUNXI_DEBE_URCONS_REG},
914 { "SUNXI_DEBE_VBCOEF_REG", SUNXI_DEBE_VBCOEF_REG},
915 { "SUNXI_DEBE_VBCONS_REG", SUNXI_DEBE_VBCONS_REG},
916 { "SUNXI_DEBE_OCCTL_REG", SUNXI_DEBE_OCCTL_REG},
917 { "SUNXI_DEBE_OCRCOEF_REG", SUNXI_DEBE_OCRCOEF_REG},
918 { "SUNXI_DEBE_OCRCONS_REG", SUNXI_DEBE_OCRCONS_REG},
919 { "SUNXI_DEBE_OCGCOEF_REG", SUNXI_DEBE_OCGCOEF_REG},
920 { "SUNXI_DEBE_OCGCONS_REG", SUNXI_DEBE_OCGCONS_REG},
921 { "SUNXI_DEBE_OCBCOEF_REG", SUNXI_DEBE_OCBCOEF_REG},
922 { "SUNXI_DEBE_OCBCONS_REG", SUNXI_DEBE_OCBCONS_REG},
923 };
924 struct sunxi_debe_softc *sc;
925 device_t dev;
926
927 dev = device_find_by_driver_unit("sunxidebe", u);
928 if (dev == NULL)
929 return;
930 sc = device_private(dev);
931
932 for (int i = 0; i < __arraycount(regs); i++) {
933 printf("%s: 0x%08x\n", regs[i].name,
934 DEBE_READ(sc, regs[i].reg));
935 }
936 }
937 #endif
938