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sunxi_debe.c revision 1.4
      1 /* $NetBSD: sunxi_debe.c,v 1.4 2018/04/03 13:38:13 bouyer Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2018 Manuel Bouyer <bouyer (at) antioche.eu.org>
      5  * All rights reserved.
      6  *
      7  * Copyright (c) 2014 Jared D. McNeill <jmcneill (at) invisible.ca>
      8  * All rights reserved.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     24  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     26  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     27  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  * SUCH DAMAGE.
     30  */
     31 
     32 #include "genfb.h"
     33 
     34 #ifndef SUNXI_DEBE_VIDEOMEM
     35 #define SUNXI_DEBE_VIDEOMEM	(16 * 1024 * 1024)
     36 #endif
     37 
     38 #define SUNXI_DEBE_CURMAX	64
     39 
     40 #include <sys/cdefs.h>
     41 __KERNEL_RCSID(0, "$NetBSD: sunxi_debe.c,v 1.4 2018/04/03 13:38:13 bouyer Exp $");
     42 
     43 #include <sys/param.h>
     44 #include <sys/bus.h>
     45 #include <sys/device.h>
     46 #include <sys/intr.h>
     47 #include <sys/systm.h>
     48 #include <sys/kernel.h>
     49 #include <sys/mutex.h>
     50 #include <sys/condvar.h>
     51 
     52 #include <dev/fdt/fdtvar.h>
     53 #include <dev/fdt/fdt_port.h>
     54 
     55 #include <dev/videomode/videomode.h>
     56 #include <dev/wscons/wsconsio.h>
     57 #include <dev/wsfb/genfbvar.h>
     58 
     59 #include <arm/sunxi/sunxi_debereg.h>
     60 #include <arm/sunxi/sunxi_display.h>
     61 
     62 enum sunxi_debe_type {
     63 	DEBE_A10 = 1,
     64 };
     65 
     66 struct sunxi_debe_softc {
     67 	device_t sc_dev;
     68 	device_t sc_fbdev;
     69 	enum sunxi_debe_type sc_type;
     70 	bus_space_tag_t sc_bst;
     71 	bus_space_handle_t sc_bsh;
     72 	bus_dma_tag_t sc_dmat;
     73 
     74 	struct clk *sc_clk_ahb;
     75 	struct clk *sc_clk_mod;
     76 	struct clk *sc_clk_ram;
     77 
     78 	bus_dma_segment_t sc_dmasegs[1];
     79 	bus_size_t sc_dmasize;
     80 	bus_dmamap_t sc_dmamap;
     81 	void *sc_dmap;
     82 
     83 	bool sc_cursor_enable;
     84 	int sc_cursor_x, sc_cursor_y;
     85 	int sc_hot_x, sc_hot_y;
     86 	uint8_t sc_cursor_bitmap[8 * SUNXI_DEBE_CURMAX];
     87 	uint8_t sc_cursor_mask[8 * SUNXI_DEBE_CURMAX];
     88 
     89 	int	sc_phandle;
     90 	struct fdt_device_ports sc_ports;
     91 	struct fdt_endpoint *sc_out_ep;
     92 	int sc_unit; /* debe0 or debe1 */
     93 };
     94 
     95 #define DEBE_READ(sc, reg) \
     96     bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
     97 #define DEBE_WRITE(sc, reg, val) \
     98     bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
     99 
    100 static const struct of_compat_data compat_data[] = {
    101 	{"allwinner,sun4i-a10-display-backend", DEBE_A10},
    102 	{"allwinner,sun7i-a20-display-backend", DEBE_A10},
    103 	{NULL}
    104 };
    105 
    106 struct sunxifb_attach_args {
    107 	void *afb_fb;
    108 	uint32_t afb_width;
    109 	uint32_t afb_height;
    110 	bus_dma_tag_t afb_dmat;
    111 	bus_dma_segment_t *afb_dmasegs;
    112 	int afb_ndmasegs;
    113 };
    114 
    115 static void	sunxi_debe_ep_connect(device_t, struct fdt_endpoint *, bool);
    116 static int	sunxi_debe_ep_enable(device_t, struct fdt_endpoint *, bool);
    117 static int	sunxi_debe_match(device_t, cfdata_t, void *);
    118 static void	sunxi_debe_attach(device_t, device_t, void *);
    119 
    120 static int	sunxi_debe_alloc_videomem(struct sunxi_debe_softc *);
    121 static void	sunxi_debe_setup_fbdev(struct sunxi_debe_softc *,
    122 				      const struct videomode *);
    123 
    124 static int	sunxi_debe_set_curpos(struct sunxi_debe_softc *, int, int);
    125 static int	sunxi_debe_set_cursor(struct sunxi_debe_softc *,
    126 				     struct wsdisplay_cursor *);
    127 static int	sunxi_debe_ioctl(device_t, u_long, void *);
    128 static void	sunxi_befb_set_videomode(device_t, u_int, u_int);
    129 void sunxi_debe_dump_regs(int);
    130 
    131 CFATTACH_DECL_NEW(sunxi_debe, sizeof(struct sunxi_debe_softc),
    132 	sunxi_debe_match, sunxi_debe_attach, NULL, NULL);
    133 
    134 static int
    135 sunxi_debe_match(device_t parent, cfdata_t cf, void *aux)
    136 {
    137 	struct fdt_attach_args * const faa = aux;
    138 
    139 	return of_match_compat_data(faa->faa_phandle, compat_data);
    140 }
    141 
    142 static void
    143 sunxi_debe_attach(device_t parent, device_t self, void *aux)
    144 {
    145 	struct sunxi_debe_softc *sc = device_private(self);
    146 	struct fdt_attach_args * const faa = aux;
    147 	const int phandle = faa->faa_phandle;
    148 	bus_addr_t addr;
    149 	bus_size_t size;
    150 	struct fdtbus_reset *rst;
    151 #if NAWIN_MP > 0
    152 	device_t mpdev;
    153 #endif
    154 #ifdef AWIN_DEBE_FWINIT
    155 	struct videomode mode;
    156 #endif
    157 	int error;
    158 
    159 	sc->sc_dev = self;
    160 	sc->sc_phandle = phandle;
    161 	sc->sc_bst = faa->faa_bst;
    162 	sc->sc_dmat = faa->faa_dmat;
    163 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
    164 		aprint_error(": couldn't get registers\n");
    165 	}
    166 	if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
    167 		aprint_error(": couldn't map registers\n");
    168 		return;
    169 	}
    170 
    171 	sc->sc_clk_ahb = fdtbus_clock_get(phandle, "ahb");
    172 	sc->sc_clk_mod = fdtbus_clock_get(phandle, "mod");
    173 	sc->sc_clk_ram = fdtbus_clock_get(phandle, "ram");
    174 
    175 	rst = fdtbus_reset_get_index(phandle, 0);
    176 	if (rst == NULL) {
    177 		aprint_error(": couldn't get reset\n");
    178 		return;
    179 	}
    180 	if (fdtbus_reset_assert(rst) != 0) {
    181 		aprint_error(": couldn't assert reset\n");
    182 		return;
    183 	}
    184 	delay(1);
    185 	if (fdtbus_reset_deassert(rst) != 0) {
    186 		aprint_error(": couldn't de-assert reset\n");
    187 		return;
    188 	}
    189 
    190 	if (sc->sc_clk_ahb == NULL || sc->sc_clk_mod == NULL
    191 	    || sc->sc_clk_ram == NULL) {
    192 		aprint_error(": couldn't get clocks\n");
    193 		aprint_debug_dev(self, "clk ahb %s mod %s ram %s\n",
    194 		    sc->sc_clk_ahb == NULL ? "missing" : "present",
    195 		    sc->sc_clk_mod == NULL ? "missing" : "present",
    196 		    sc->sc_clk_ram == NULL ? "missing" : "present");
    197 		return;
    198 	}
    199 
    200 	error = clk_set_rate(sc->sc_clk_mod, 300000000);
    201 	if (error) {
    202 		aprint_error("couln't set mod clock rate (%d)\n", error);
    203 		return;
    204 	}
    205 
    206 	if (clk_enable(sc->sc_clk_ahb) != 0 ||
    207 	    clk_enable(sc->sc_clk_mod) != 0 ||
    208 	    clk_enable(sc->sc_clk_ram) != 0) {
    209 		aprint_error(": couldn't enable clocks\n");
    210 		return;
    211 	}
    212 
    213 	sc->sc_type = of_search_compatible(faa->faa_phandle, compat_data)->data;
    214 
    215 	aprint_naive("\n");
    216 	aprint_normal(": Display Engine Backend (%s)\n",
    217 	    fdtbus_get_string(phandle, "name"));
    218 
    219 
    220 #ifdef AWIN_DEBE_FWINIT
    221 	const uint32_t modctl = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
    222 	const uint32_t dissize = DEBE_READ(sc, SUNXI_DEBE_DISSIZE_REG);
    223 	if ((modctl & SUNXI_DEBE_MODCTL_EN) == 0) {
    224 		aprint_error_dev(sc->sc_dev, "disabled\n");
    225 		return;
    226 	}
    227 	if ((modctl & SUNXI_DEBE_MODCTL_START_CTL) == 0) {
    228 		aprint_error_dev(sc->sc_dev, "stopped\n");
    229 		return;
    230 	}
    231 	memset(&mode, 0, sizeof(mode));
    232 	mode.hdisplay = (dissize & 0xffff) + 1;
    233 	mode.vdisplay = ((dissize >> 16) & 0xffff) + 1;
    234 
    235 	if (mode.hdisplay == 1 || mode.vdisplay == 1) {
    236 		aprint_error_dev(sc->sc_dev,
    237 		    "couldn't determine video mode\n");
    238 		return;
    239 	}
    240 
    241 	aprint_verbose_dev(sc->sc_dev, "using %dx%d mode from firmware\n",
    242 	    mode.hdisplay, mode.vdisplay);
    243 
    244 	sc->sc_dmasize = mode.hdisplay * mode.vdisplay * 4;
    245 #else
    246 	for (unsigned int reg = 0x800; reg < 0x1000; reg += 4) {
    247 		DEBE_WRITE(sc, reg, 0);
    248 	}
    249 
    250 	DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, SUNXI_DEBE_MODCTL_EN);
    251 
    252 	sc->sc_dmasize = SUNXI_DEBE_VIDEOMEM;
    253 #endif
    254 
    255 	DEBE_WRITE(sc, SUNXI_DEBE_HWC_PALETTE_TABLE, 0);
    256 
    257 	error = sunxi_debe_alloc_videomem(sc);
    258 	if (error) {
    259 		aprint_error_dev(sc->sc_dev,
    260 		    "couldn't allocate video memory, error = %d\n", error);
    261 		return;
    262 	}
    263 
    264 #if NAWIN_MP > 0
    265 	mpdev = device_find_by_driver_unit("sunximp", 0);
    266 	if (mpdev) {
    267 		paddr_t pa = sc->sc_dmamap->dm_segs[0].ds_addr;
    268 		if (pa >= SUNXI_SDRAM_PBASE)
    269 			pa -= SUNXI_SDRAM_PBASE;
    270 		sunxi_mp_setbase(mpdev, pa, sc->sc_dmasize);
    271 	}
    272 #endif
    273 	sc->sc_unit = -1;
    274 	sc->sc_ports.dp_ep_connect = sunxi_debe_ep_connect;
    275 	sc->sc_ports.dp_ep_enable = sunxi_debe_ep_enable;
    276 	fdt_ports_register(&sc->sc_ports, self, phandle, EP_OTHER);
    277 
    278 #ifdef AWIN_DEBE_FWINIT
    279 	sunxi_debe_set_videomode(device_unit(self), &mode);
    280 	sunxi_debe_enable(device_unit(self), true);
    281 #endif
    282 }
    283 
    284 
    285 
    286 static void
    287 sunxi_debe_ep_connect(device_t self, struct fdt_endpoint *ep, bool connect)
    288 {
    289 	struct sunxi_debe_softc *sc = device_private(self);
    290 	struct fdt_endpoint *rep = fdt_endpoint_remote(ep);
    291 	int rep_idx = fdt_endpoint_index(rep);
    292 
    293 	KASSERT(device_is_a(self, "sunxidebe"));
    294 	if (!connect) {
    295 		aprint_error_dev(self, "endpoint disconnect not supported\n");
    296 		return;
    297 	}
    298 
    299 	if (fdt_endpoint_port_index(ep) == 1) {
    300 		bool do_print = (sc->sc_unit == -1);
    301 		/*
    302 		 * one of our output endpoints has been connected.
    303 		 * the remote id is our unit number
    304 		 */
    305 		if (sc->sc_unit != -1 && rep_idx != -1 &&
    306 		    sc->sc_unit != rep_idx) {
    307 			aprint_error_dev(self, ": remote id %d doens't match"
    308 			    " discovered unit number %d\n",
    309 			    rep_idx, sc->sc_unit);
    310 			return;
    311 		}
    312 		if (!device_is_a(fdt_endpoint_device(rep), "sunxitcon")) {
    313 			aprint_error_dev(self,
    314 			    ": output %d connected to unknown device\n",
    315 			    fdt_endpoint_index(ep));
    316 			return;
    317 		}
    318 		if (rep_idx != -1)
    319 			sc->sc_unit = rep_idx;
    320 		else {
    321 			/* assume only one debe */
    322 			sc->sc_unit = 0;
    323 		}
    324 		if (do_print)
    325 			aprint_verbose_dev(self, "debe unit %d\n", sc->sc_unit);
    326 	}
    327 }
    328 
    329 static int
    330 sunxi_debe_alloc_videomem(struct sunxi_debe_softc *sc)
    331 {
    332 	int error, nsegs;
    333 
    334 	error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dmasize, 0x1000, 0,
    335 	    sc->sc_dmasegs, 1, &nsegs, BUS_DMA_WAITOK);
    336 	if (error)
    337 		return error;
    338 	error = bus_dmamem_map(sc->sc_dmat, sc->sc_dmasegs, nsegs,
    339 	    sc->sc_dmasize, &sc->sc_dmap, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
    340 	if (error)
    341 		goto free;
    342 	error = bus_dmamap_create(sc->sc_dmat, sc->sc_dmasize, 1,
    343 	    sc->sc_dmasize, 0, BUS_DMA_WAITOK, &sc->sc_dmamap);
    344 	if (error)
    345 		goto unmap;
    346 	error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_dmap,
    347 	    sc->sc_dmasize, NULL, BUS_DMA_WAITOK);
    348 	if (error)
    349 		goto destroy;
    350 
    351 	memset(sc->sc_dmap, 0, sc->sc_dmasize);
    352 
    353 	return 0;
    354 
    355 destroy:
    356 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap);
    357 unmap:
    358 	bus_dmamem_unmap(sc->sc_dmat, sc->sc_dmap, sc->sc_dmasize);
    359 free:
    360 	bus_dmamem_free(sc->sc_dmat, sc->sc_dmasegs, nsegs);
    361 
    362 	sc->sc_dmasize = 0;
    363 	sc->sc_dmap = NULL;
    364 
    365 	return error;
    366 }
    367 
    368 static void
    369 sunxi_debe_setup_fbdev(struct sunxi_debe_softc *sc, const struct videomode *mode)
    370 {
    371 	if (mode == NULL)
    372 		return;
    373 
    374 	const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
    375 	const u_int fb_width = mode->hdisplay;
    376 	const u_int fb_height = (mode->vdisplay << interlace_p);
    377 
    378 	if (mode && sc->sc_fbdev == NULL) {
    379 		struct sunxifb_attach_args afb = {
    380 			.afb_fb = sc->sc_dmap,
    381 			.afb_width = fb_width,
    382 			.afb_height = fb_height,
    383 			.afb_dmat = sc->sc_dmat,
    384 			.afb_dmasegs = sc->sc_dmasegs,
    385 			.afb_ndmasegs = 1
    386 		};
    387 		sc->sc_fbdev = config_found_ia(sc->sc_dev, "sunxidebe",
    388 		    &afb, NULL);
    389 	} else if (sc->sc_fbdev != NULL) {
    390 		sunxi_befb_set_videomode(sc->sc_fbdev, fb_width, fb_height);
    391 	}
    392 }
    393 
    394 static int
    395 sunxi_debe_set_curpos(struct sunxi_debe_softc *sc, int x, int y)
    396 {
    397 	int xx, yy;
    398 	u_int yoff, xoff;
    399 
    400 	xoff = yoff = 0;
    401 	xx = x - sc->sc_hot_x;
    402 	yy = y - sc->sc_hot_y;
    403 	if (xx < 0) {
    404 		xoff -= xx;
    405 		xx = 0;
    406 	}
    407 	if (yy < 0) {
    408 		yoff -= yy;
    409 		yy = 0;
    410 	}
    411 
    412 	DEBE_WRITE(sc, SUNXI_DEBE_HWCCTL_REG,
    413 	    __SHIFTIN(yy, SUNXI_DEBE_HWCCTL_YCOOR) |
    414 	    __SHIFTIN(xx, SUNXI_DEBE_HWCCTL_XCOOR));
    415 	DEBE_WRITE(sc, SUNXI_DEBE_HWCFBCTL_REG,
    416 #if SUNXI_DEBE_CURMAX == 32
    417 	    __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_32, SUNXI_DEBE_HWCFBCTL_YSIZE) |
    418 	    __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_32, SUNXI_DEBE_HWCFBCTL_XSIZE) |
    419 #else
    420 	    __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_64, SUNXI_DEBE_HWCFBCTL_YSIZE) |
    421 	    __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_64, SUNXI_DEBE_HWCFBCTL_XSIZE) |
    422 #endif
    423 	    __SHIFTIN(SUNXI_DEBE_HWCFBCTL_FBFMT_2BPP, SUNXI_DEBE_HWCFBCTL_FBFMT) |
    424 	    __SHIFTIN(yoff, SUNXI_DEBE_HWCFBCTL_YCOOROFF) |
    425 	    __SHIFTIN(xoff, SUNXI_DEBE_HWCFBCTL_XCOOROFF));
    426 
    427 	return 0;
    428 }
    429 
    430 static int
    431 sunxi_debe_set_cursor(struct sunxi_debe_softc *sc, struct wsdisplay_cursor *cur)
    432 {
    433 	uint32_t val;
    434 	uint8_t r[4], g[4], b[4];
    435 	u_int index, count, shift, off, pcnt;
    436 	int i, j, idx, error;
    437 	uint8_t mask;
    438 
    439 	if (cur->which & WSDISPLAY_CURSOR_DOCUR) {
    440 		val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
    441 		if (cur->enable)
    442 			val |= SUNXI_DEBE_MODCTL_HWC_EN;
    443 		else
    444 			val &= ~SUNXI_DEBE_MODCTL_HWC_EN;
    445 		DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
    446 
    447 		sc->sc_cursor_enable = cur->enable;
    448 	}
    449 
    450 	if (cur->which & WSDISPLAY_CURSOR_DOHOT) {
    451 		sc->sc_hot_x = cur->hot.x;
    452 		sc->sc_hot_y = cur->hot.y;
    453 		cur->which |= WSDISPLAY_CURSOR_DOPOS;
    454 	}
    455 
    456 	if (cur->which & WSDISPLAY_CURSOR_DOPOS) {
    457 		sunxi_debe_set_curpos(sc, cur->pos.x, cur->pos.y);
    458 	}
    459 
    460 	if (cur->which & WSDISPLAY_CURSOR_DOCMAP) {
    461 		index = cur->cmap.index;
    462 		count = cur->cmap.count;
    463 		if (index >= 2 || count > 2 - index)
    464 			return EINVAL;
    465 		error = copyin(cur->cmap.red, &r[index], count);
    466 		if (error)
    467 			return error;
    468 		error = copyin(cur->cmap.green, &g[index], count);
    469 		if (error)
    470 			return error;
    471 		error = copyin(cur->cmap.blue, &b[index], count);
    472 		if (error)
    473 			return error;
    474 
    475 		for (i = index; i < (index + count); i++) {
    476 			DEBE_WRITE(sc,
    477 			    SUNXI_DEBE_HWC_PALETTE_TABLE + (4 * (i + 2)),
    478 			    (r[i] << 16) | (g[i] << 8) | b[i] | 0xff000000);
    479 		}
    480 	}
    481 
    482 	if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) {
    483 		error = copyin(cur->mask, sc->sc_cursor_mask,
    484 		    SUNXI_DEBE_CURMAX * 8);
    485 		if (error)
    486 			return error;
    487 		error = copyin(cur->image, sc->sc_cursor_bitmap,
    488 		    SUNXI_DEBE_CURMAX * 8);
    489 		if (error)
    490 			return error;
    491 	}
    492 
    493 	if (cur->which & (WSDISPLAY_CURSOR_DOCMAP|WSDISPLAY_CURSOR_DOSHAPE)) {
    494 		for (i = 0, pcnt = 0; i < SUNXI_DEBE_CURMAX * 8; i++) {
    495 			for (j = 0, mask = 1; j < 8; j++, mask <<= 1, pcnt++) {
    496 				idx = ((sc->sc_cursor_mask[i] & mask) ? 2 : 0) |
    497 				    ((sc->sc_cursor_bitmap[i] & mask) ? 1 : 0);
    498 				off = (pcnt >> 4) * 4;
    499 				shift = (pcnt & 0xf) * 2;
    500 				val = DEBE_READ(sc,
    501 				    SUNXI_DEBE_HWC_PATTERN_BLOCK + off);
    502 				val &= ~(3 << shift);
    503 				val |= (idx << shift);
    504 				DEBE_WRITE(sc,
    505 				    SUNXI_DEBE_HWC_PATTERN_BLOCK + off, val);
    506 			}
    507 		}
    508 	}
    509 
    510 	return 0;
    511 }
    512 
    513 static int
    514 sunxi_debe_ep_enable(device_t dev, struct fdt_endpoint *ep, bool enable)
    515 {
    516 	struct sunxi_debe_softc *sc;
    517 	uint32_t val;
    518 
    519 	KASSERT(device_is_a(dev, "sunxidebe"));
    520 	sc = device_private(dev);
    521 
    522 	if (enable) {
    523 		val = DEBE_READ(sc, SUNXI_DEBE_REGBUFFCTL_REG);
    524 		val |= SUNXI_DEBE_REGBUFFCTL_REGLOADCTL;
    525 		DEBE_WRITE(sc, SUNXI_DEBE_REGBUFFCTL_REG, val);
    526 
    527 		val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
    528 		val |= SUNXI_DEBE_MODCTL_START_CTL;
    529 		DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
    530 #ifdef SUNXI_DEBE_DEBUG
    531 		sunxi_debe_dump_regs(sc->sc_unit);
    532 #endif
    533 	} else {
    534 		val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
    535 		val &= ~SUNXI_DEBE_MODCTL_START_CTL;
    536 		DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
    537 	}
    538 #if 0
    539 	for (int i = 0; i < 0x1000; i += 4) {
    540 		printf("DEBE 0x%04x: 0x%08x\n", i, DEBE_READ(sc, i));
    541 	}
    542 #endif
    543 	return 0;
    544 }
    545 
    546 void
    547 sunxi_debe_set_videomode(device_t dev, const struct videomode *mode)
    548 {
    549 	struct sunxi_debe_softc *sc;
    550 	uint32_t val;
    551 
    552 	KASSERT(device_is_a(dev, "sunxidebe"));
    553 	sc = device_private(dev);
    554 
    555 	if (mode) {
    556 		const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
    557 		const u_int width = mode->hdisplay;
    558 		const u_int height = (mode->vdisplay << interlace_p);
    559 		const u_int fb_width = width;
    560 		const u_int fb_height = height;
    561 		uint32_t vmem = width * height * 4;
    562 
    563 		if (vmem > sc->sc_dmasize) {
    564 			device_printf(sc->sc_dev,
    565 			    "not enough memory for %ux%u fb (req %u have %u)\n",
    566 			    width, height, vmem, (unsigned int)sc->sc_dmasize);
    567 			return;
    568 		}
    569 
    570 		paddr_t pa = sc->sc_dmamap->dm_segs[0].ds_addr;
    571 #if !defined(ALLWINNER_A80) && 0
    572 #define SUNXI_SDRAM_PBASE-0 0x40000000
    573 		/*
    574 		 * On 2GB systems, we need to subtract AWIN_SDRAM_PBASE from
    575 		 * the phys addr.
    576 		 */
    577 		if (pa >= SUNXI_SDRAM_PBASE)
    578 			pa -= SUNXI_SDRAM_PBASE;
    579 #endif
    580 
    581 		/* notify fb */
    582 		sunxi_debe_setup_fbdev(sc, mode);
    583 
    584 		DEBE_WRITE(sc, SUNXI_DEBE_DISSIZE_REG,
    585 		    ((height - 1) << 16) | (width - 1));
    586 		DEBE_WRITE(sc, SUNXI_DEBE_LAYSIZE_REG,
    587 		    ((fb_height - 1) << 16) | (fb_width - 1));
    588 		DEBE_WRITE(sc, SUNXI_DEBE_LAYCOOR_REG, 0);
    589 		DEBE_WRITE(sc, SUNXI_DEBE_LAYLINEWIDTH_REG, (fb_width << 5));
    590 		DEBE_WRITE(sc, SUNXI_DEBE_LAYFB_L32ADD_REG, pa << 3);
    591 		DEBE_WRITE(sc, SUNXI_DEBE_LAYFB_H4ADD_REG, pa >> 29);
    592 
    593 		val = DEBE_READ(sc, SUNXI_DEBE_ATTCTL1_REG);
    594 		val &= ~SUNXI_DEBE_ATTCTL1_LAY_FBFMT;
    595 		val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBFMT_XRGB8888,
    596 				 SUNXI_DEBE_ATTCTL1_LAY_FBFMT);
    597 		val &= ~SUNXI_DEBE_ATTCTL1_LAY_BRSWAPEN;
    598 		val &= ~SUNXI_DEBE_ATTCTL1_LAY_FBPS;
    599 #if __ARMEB__
    600 		val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBPS_32BPP_BGRA,
    601 				 SUNXI_DEBE_ATTCTL1_LAY_FBPS);
    602 #else
    603 		val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBPS_32BPP_ARGB,
    604 				 SUNXI_DEBE_ATTCTL1_LAY_FBPS);
    605 #endif
    606 		DEBE_WRITE(sc, SUNXI_DEBE_ATTCTL1_REG, val);
    607 
    608 		val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
    609 		val |= SUNXI_DEBE_MODCTL_LAY0_EN;
    610 		if (interlace_p) {
    611 			val |= SUNXI_DEBE_MODCTL_ITLMOD_EN;
    612 		} else {
    613 			val &= ~SUNXI_DEBE_MODCTL_ITLMOD_EN;
    614 		}
    615 		val &= ~SUNXI_DEBE_MODCTL_OUT_SEL;
    616 		if (sc->sc_unit == 1) {
    617 			val |= __SHIFTIN(SUNXI_DEBE_MODCTL_OUT_SEL_LCD1,
    618 			    SUNXI_DEBE_MODCTL_OUT_SEL);
    619 		}
    620 		DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
    621 	} else {
    622 		/* disable */
    623 		val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
    624 		val &= ~SUNXI_DEBE_MODCTL_LAY0_EN;
    625 		val &= ~SUNXI_DEBE_MODCTL_START_CTL;
    626 		DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val);
    627 
    628 		/* notify fb */
    629 		sunxi_debe_setup_fbdev(sc, mode);
    630 	}
    631 }
    632 
    633 static int
    634 sunxi_debe_ioctl(device_t self, u_long cmd, void *data)
    635 {
    636 	struct sunxi_debe_softc *sc = device_private(self);
    637 	struct wsdisplay_curpos *cp;
    638 	uint32_t val;
    639 	int enable;
    640 
    641 	switch (cmd) {
    642 	case WSDISPLAYIO_SVIDEO:
    643 		enable = *(int *)data;
    644 		val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
    645 		if (enable) {
    646 			if (val & SUNXI_DEBE_MODCTL_START_CTL) {
    647 				/* already enabled */
    648 				return 0;
    649 			}
    650 		} else {
    651 			if ((val & SUNXI_DEBE_MODCTL_START_CTL) == 0) {
    652 				/* already disabled */
    653 				return 0;
    654 			}
    655 		}
    656 		return fdt_endpoint_enable(sc->sc_out_ep, enable);
    657 	case WSDISPLAYIO_GVIDEO:
    658 		val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG);
    659 		*(int *)data = !!(val & SUNXI_DEBE_MODCTL_LAY0_EN);
    660 		return 0;
    661 	case WSDISPLAYIO_GCURPOS:
    662 		cp = data;
    663 		cp->x = sc->sc_cursor_x;
    664 		cp->y = sc->sc_cursor_y;
    665 		return 0;
    666 	case WSDISPLAYIO_SCURPOS:
    667 		cp = data;
    668 		return sunxi_debe_set_curpos(sc, cp->x, cp->y);
    669 	case WSDISPLAYIO_GCURMAX:
    670 		cp = data;
    671 		cp->x = SUNXI_DEBE_CURMAX;
    672 		cp->y = SUNXI_DEBE_CURMAX;
    673 		return 0;
    674 	case WSDISPLAYIO_SCURSOR:
    675 		return sunxi_debe_set_cursor(sc, data);
    676 	}
    677 
    678 	return EPASSTHROUGH;
    679 }
    680 
    681 /* genfb attachement */
    682 
    683 struct sunxi_befb_softc {
    684 	struct genfb_softc sc_gen;
    685 	device_t sc_debedev;
    686 	device_t sc_mpdev;
    687 
    688 	bus_dma_tag_t sc_dmat;
    689 	bus_dma_segment_t *sc_dmasegs;
    690 	int sc_ndmasegs;
    691 };
    692 
    693 static device_t	sunxi_befb_consoledev = NULL;
    694 
    695 static int	sunxi_befb_match(device_t, cfdata_t, void *);
    696 static void	sunxi_befb_attach(device_t, device_t, void *);
    697 
    698 static int	sunxi_befb_ioctl(void *, void *, u_long, void *, int, lwp_t *);
    699 static paddr_t	sunxi_befb_mmap(void *, void *, off_t, int);
    700 static bool	sunxi_befb_shutdown(device_t, int);
    701 
    702 CFATTACH_DECL_NEW(sunxi_befb, sizeof(struct sunxi_befb_softc),
    703 	sunxi_befb_match, sunxi_befb_attach, NULL, NULL);
    704 
    705 static int
    706 sunxi_befb_match(device_t parent, cfdata_t cf, void *aux)
    707 {
    708 	return 1;
    709 }
    710 
    711 static void
    712 sunxi_befb_attach(device_t parent, device_t self, void *aux)
    713 {
    714 	struct sunxi_befb_softc *sc = device_private(self);
    715 	struct sunxifb_attach_args * const afb = aux;
    716 	prop_dictionary_t cfg = device_properties(self);
    717 	struct genfb_ops ops;
    718 
    719 	if (sunxi_befb_consoledev == NULL)
    720 		sunxi_befb_consoledev = self;
    721 
    722 	sc->sc_gen.sc_dev = self;
    723 	sc->sc_debedev = parent;
    724 	sc->sc_dmat = afb->afb_dmat;
    725 	sc->sc_dmasegs = afb->afb_dmasegs;
    726 	sc->sc_ndmasegs = afb->afb_ndmasegs;
    727 	sc->sc_mpdev = device_find_by_driver_unit("sunximp", 0);
    728 
    729 	prop_dictionary_set_uint32(cfg, "width", afb->afb_width);
    730 	prop_dictionary_set_uint32(cfg, "height", afb->afb_height);
    731 	prop_dictionary_set_uint8(cfg, "depth", 32);
    732 	prop_dictionary_set_uint16(cfg, "linebytes", afb->afb_width * 4);
    733 	prop_dictionary_set_uint32(cfg, "address", 0);
    734 	prop_dictionary_set_uint32(cfg, "virtual_address",
    735 	    (uintptr_t)afb->afb_fb);
    736 
    737 	genfb_init(&sc->sc_gen);
    738 
    739 	if (sc->sc_gen.sc_width == 0 || sc->sc_gen.sc_fbsize == 0) {
    740 		aprint_normal(": disabled\n");
    741 		return;
    742 	}
    743 
    744 	pmf_device_register1(self, NULL, NULL, sunxi_befb_shutdown);
    745 
    746 	memset(&ops, 0, sizeof(ops));
    747 	ops.genfb_ioctl = sunxi_befb_ioctl;
    748 	ops.genfb_mmap = sunxi_befb_mmap;
    749 
    750 	aprint_naive("\n");
    751 
    752 	bool is_console = false;
    753 	prop_dictionary_set_bool(cfg, "is_console", is_console);
    754 
    755 	if (is_console)
    756 		aprint_normal(": switching to framebuffer console\n");
    757 	else
    758 		aprint_normal("\n");
    759 
    760 	genfb_attach(&sc->sc_gen, &ops);
    761 }
    762 
    763 static int
    764 sunxi_befb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l)
    765 {
    766 	struct sunxi_befb_softc *sc = v;
    767 	struct wsdisplayio_bus_id *busid;
    768 	struct wsdisplayio_fbinfo *fbi;
    769 	struct rasops_info *ri;
    770 	int error;
    771 
    772 	switch (cmd) {
    773 	case WSDISPLAYIO_GTYPE:
    774 		*(u_int *)data = WSDISPLAY_TYPE_ALLWINNER;
    775 		return 0;
    776 	case WSDISPLAYIO_GET_BUSID:
    777 		busid = data;
    778 		busid->bus_type = WSDISPLAYIO_BUS_SOC;
    779 		return 0;
    780 	case WSDISPLAYIO_GET_FBINFO:
    781 		fbi = data;
    782 		ri = &sc->sc_gen.vd.active->scr_ri;
    783 		error = wsdisplayio_get_fbinfo(ri, fbi);
    784 		if (error == 0) {
    785 			fbi->fbi_flags |= WSFB_VRAM_IS_RAM;
    786 			fbi->fbi_fbsize = sc->sc_dmasegs[0].ds_len;
    787 #if NAWIN_MP > 0
    788 			if (sc->sc_mpdev)
    789 				fbi->fbi_flags |= WSFB_ACCEL;
    790 #endif
    791 		}
    792 		return error;
    793 	case WSDISPLAYIO_SVIDEO:
    794 	case WSDISPLAYIO_GVIDEO:
    795 	case WSDISPLAYIO_GCURPOS:
    796 	case WSDISPLAYIO_SCURPOS:
    797 	case WSDISPLAYIO_GCURMAX:
    798 	case WSDISPLAYIO_SCURSOR:
    799 		return sunxi_debe_ioctl(sc->sc_debedev, cmd, data);
    800 #if NAWIN_MP > 0
    801 	case WSDISPLAYIO_FILL:
    802 	case WSDISPLAYIO_COPY:
    803 	case WSDISPLAYIO_SYNC:
    804 		if (sc->sc_mpdev == NULL)
    805 			return EPASSTHROUGH;
    806 		return sunxi_mp_ioctl(sc->sc_mpdev, cmd, data);
    807 #endif
    808 	default:
    809 		return EPASSTHROUGH;
    810 	}
    811 }
    812 
    813 static paddr_t
    814 sunxi_befb_mmap(void *v, void *vs, off_t off, int prot)
    815 {
    816 	struct sunxi_befb_softc *sc = v;
    817 
    818 	if (off < 0 || off >= sc->sc_dmasegs[0].ds_len)
    819 		return -1;
    820 
    821 	return bus_dmamem_mmap(sc->sc_dmat, sc->sc_dmasegs, sc->sc_ndmasegs,
    822 	    off, prot, BUS_DMA_PREFETCHABLE);
    823 }
    824 
    825 static bool
    826 sunxi_befb_shutdown(device_t self, int flags)
    827 {
    828 	genfb_enable_polling(self);
    829 	return true;
    830 }
    831 
    832 static void
    833 sunxi_befb_set_videomode(device_t dev, u_int width, u_int height)
    834 {
    835 	struct sunxi_befb_softc *sc = device_private(dev);
    836 
    837 	if (sc->sc_gen.sc_width != width || sc->sc_gen.sc_height != height) {
    838 		device_printf(sc->sc_gen.sc_dev,
    839 		    "mode switching not yet supported\n");
    840 	}
    841 }
    842 
    843 int
    844 sunxi_debe_pipeline(int phandle, bool active)
    845 {
    846 	device_t dev;
    847 	struct sunxi_debe_softc *sc;
    848 	struct fdt_endpoint *ep;
    849 	int i, error;
    850 
    851 	if (!active)
    852 		return EOPNOTSUPP;
    853 
    854 	for (i = 0;;i++) {
    855 		dev = device_find_by_driver_unit("sunxidebe", i);
    856 		if (dev == NULL)
    857 			return ENODEV;
    858 		sc = device_private(dev);
    859 		if (sc->sc_phandle == phandle)
    860 			break;
    861 	}
    862 	aprint_normal("activate %s\n", device_xname(dev));
    863 	/* connect debd0 to tcon0, debe1 to tcon1 */
    864 	ep = fdt_endpoint_get_from_index(&sc->sc_ports, SUNXI_PORT_OUTPUT,
    865 	    sc->sc_unit);
    866 	if (ep == NULL) {
    867 		aprint_error_dev(dev, "no output endpoint for %d\n",
    868 		    sc->sc_unit);
    869 		return ENODEV;
    870 	}
    871 	error = fdt_endpoint_activate(ep, true);
    872 	if (error == 0) {
    873 		sc->sc_out_ep = ep;
    874 		fdt_endpoint_enable(ep, true);
    875 	}
    876 	return error;
    877 }
    878 
    879 #if defined(SUNXI_DEBE_DEBUG)
    880 void
    881 sunxi_debe_dump_regs(int u)
    882 {
    883 	static const struct {
    884 		const char *name;
    885 		uint16_t reg;
    886 	} regs[] = {
    887 		{ "SUNXI_DEBE_MODCTL_REG", SUNXI_DEBE_MODCTL_REG},
    888 		{ "SUNXI_DEBE_BACKCOLOR_REG", SUNXI_DEBE_BACKCOLOR_REG},
    889 		{ "SUNXI_DEBE_DISSIZE_REG", SUNXI_DEBE_DISSIZE_REG},
    890 		{ "SUNXI_DEBE_LAYSIZE_REG", SUNXI_DEBE_LAYSIZE_REG},
    891 		{ "SUNXI_DEBE_LAYCOOR_REG", SUNXI_DEBE_LAYCOOR_REG},
    892 		{ "SUNXI_DEBE_LAYLINEWIDTH_REG", SUNXI_DEBE_LAYLINEWIDTH_REG},
    893 		{ "SUNXI_DEBE_LAYFB_L32ADD_REG", SUNXI_DEBE_LAYFB_L32ADD_REG},
    894 		{ "SUNXI_DEBE_LAYFB_H4ADD_REG", SUNXI_DEBE_LAYFB_H4ADD_REG},
    895 		{ "SUNXI_DEBE_REGBUFFCTL_REG", SUNXI_DEBE_REGBUFFCTL_REG},
    896 		{ "SUNXI_DEBE_CKMAX_REG", SUNXI_DEBE_CKMAX_REG},
    897 		{ "SUNXI_DEBE_CKMIN_REG", SUNXI_DEBE_CKMIN_REG},
    898 		{ "SUNXI_DEBE_CKCFG_REG", SUNXI_DEBE_CKCFG_REG},
    899 		{ "SUNXI_DEBE_ATTCTL0_REG", SUNXI_DEBE_ATTCTL0_REG},
    900 		{ "SUNXI_DEBE_ATTCTL1_REG", SUNXI_DEBE_ATTCTL1_REG},
    901 		{ "SUNXI_DEBE_HWCCTL_REG", SUNXI_DEBE_HWCCTL_REG},
    902 		{ "SUNXI_DEBE_HWCFBCTL_REG", SUNXI_DEBE_HWCFBCTL_REG},
    903 		{ "SUNXI_DEBE_WBCTL_REG", SUNXI_DEBE_WBCTL_REG},
    904 		{ "SUNXI_DEBE_WBADD_REG", SUNXI_DEBE_WBADD_REG},
    905 		{ "SUNXI_DEBE_WBLINEWIDTH_REG", SUNXI_DEBE_WBLINEWIDTH_REG},
    906 		{ "SUNXI_DEBE_IYUVCTL_REG", SUNXI_DEBE_IYUVCTL_REG},
    907 		{ "SUNXI_DEBE_IYUVADD_REG", SUNXI_DEBE_IYUVADD_REG},
    908 		{ "SUNXI_DEBE_IYUVLINEWIDTH_REG", SUNXI_DEBE_IYUVLINEWIDTH_REG},
    909 		{ "SUNXI_DEBE_YGCOEF_REG", SUNXI_DEBE_YGCOEF_REG},
    910 		{ "SUNXI_DEBE_YGCONS_REG", SUNXI_DEBE_YGCONS_REG},
    911 		{ "SUNXI_DEBE_URCOEF_REG", SUNXI_DEBE_URCOEF_REG},
    912 		{ "SUNXI_DEBE_URCONS_REG", SUNXI_DEBE_URCONS_REG},
    913 		{ "SUNXI_DEBE_VBCOEF_REG", SUNXI_DEBE_VBCOEF_REG},
    914 		{ "SUNXI_DEBE_VBCONS_REG", SUNXI_DEBE_VBCONS_REG},
    915 		{ "SUNXI_DEBE_OCCTL_REG", SUNXI_DEBE_OCCTL_REG},
    916 		{ "SUNXI_DEBE_OCRCOEF_REG", SUNXI_DEBE_OCRCOEF_REG},
    917 		{ "SUNXI_DEBE_OCRCONS_REG", SUNXI_DEBE_OCRCONS_REG},
    918 		{ "SUNXI_DEBE_OCGCOEF_REG", SUNXI_DEBE_OCGCOEF_REG},
    919 		{ "SUNXI_DEBE_OCGCONS_REG", SUNXI_DEBE_OCGCONS_REG},
    920 		{ "SUNXI_DEBE_OCBCOEF_REG", SUNXI_DEBE_OCBCOEF_REG},
    921 		{ "SUNXI_DEBE_OCBCONS_REG", SUNXI_DEBE_OCBCONS_REG},
    922 	};
    923 	struct sunxi_debe_softc *sc;
    924 	device_t dev;
    925 
    926 	dev = device_find_by_driver_unit("sunxidebe", u);
    927 	if (dev == NULL)
    928 		return;
    929 	sc = device_private(dev);
    930 
    931 	for (int i = 0; i < __arraycount(regs); i++) {
    932 		printf("%s: 0x%08x\n", regs[i].name,
    933 		    DEBE_READ(sc, regs[i].reg));
    934 	}
    935 }
    936 #endif
    937