sunxi_gmac.c revision 1.1 1 /* $NetBSD: sunxi_gmac.c,v 1.1 2017/10/07 13:28:59 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30
31 __KERNEL_RCSID(0, "$NetBSD: sunxi_gmac.c,v 1.1 2017/10/07 13:28:59 jmcneill Exp $");
32
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/intr.h>
37 #include <sys/systm.h>
38
39 #include <net/if.h>
40 #include <net/if_ether.h>
41 #include <net/if_media.h>
42
43 #include <dev/mii/miivar.h>
44
45 #include <dev/ic/dwc_gmac_var.h>
46 #include <dev/ic/dwc_gmac_reg.h>
47
48 #include <dev/fdt/fdtvar.h>
49
50 #define GMAC_TX_RATE_MII 25000000
51 #define GMAC_TX_RATE_RGMII 125000000
52
53 static const char * compatible[] = {
54 "allwinner,sun7i-a20-gmac",
55 NULL
56 };
57
58 static int
59 sunxi_gmac_intr(void *arg)
60 {
61 return dwc_gmac_intr(arg);
62 }
63
64 static int
65 sunxi_gmac_match(device_t parent, cfdata_t cf, void *aux)
66 {
67 struct fdt_attach_args * const faa = aux;
68
69 return of_match_compatible(faa->faa_phandle, compatible);
70 }
71
72 static void
73 sunxi_gmac_attach(device_t parent, device_t self, void *aux)
74 {
75 struct dwc_gmac_softc * const sc = device_private(self);
76 struct fdt_attach_args * const faa = aux;
77 const int phandle = faa->faa_phandle;
78 struct clk *clk_gmac, *clk_gmac_tx;
79 const char *phy_mode;
80 char intrstr[128];
81 bus_addr_t addr;
82 bus_size_t size;
83
84 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
85 aprint_error(": couldn't get registers\n");
86 return;
87 }
88
89 sc->sc_dev = self;
90 sc->sc_bst = faa->faa_bst;
91 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
92 aprint_error(": couldn't map registers\n");
93 return;
94 }
95 sc->sc_dmat = faa->faa_dmat;
96
97 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
98 aprint_error(": failed to decode interrupt\n");
99 return;
100 }
101
102 clk_gmac = fdtbus_clock_get(phandle, "stmmaceth");
103 clk_gmac_tx = fdtbus_clock_get(phandle, "allwinner_gmac_tx");
104 if (clk_gmac == NULL || clk_gmac_tx == NULL) {
105 aprint_error(": couldn't get clocks\n");
106 return;
107 }
108
109 phy_mode = fdtbus_get_string(phandle, "phy-mode");
110 if (phy_mode == NULL) {
111 aprint_error(": missing 'phy-mode' property\n");
112 return;
113 }
114 if (strcmp(phy_mode, "mii") == 0) {
115 if (clk_set_rate(clk_gmac_tx, GMAC_TX_RATE_MII) != 0) {
116 aprint_error(": failed to set TX clock rate (MII)\n");
117 return;
118 }
119 } else if (strcmp(phy_mode, "rgmii") == 0) {
120 if (clk_set_rate(clk_gmac_tx, GMAC_TX_RATE_RGMII) != 0) {
121 aprint_error(": failed to set TX clock rate (RGMII)\n");
122 return;
123 }
124 } else {
125 aprint_error(": unsupported phy-mode '%s'\n", phy_mode);
126 return;
127 }
128
129 if (clk_enable(clk_gmac_tx) != 0 || clk_enable(clk_gmac) != 0) {
130 aprint_error(": couldn't enable clocks\n");
131 return;
132 }
133
134 aprint_naive("\n");
135 aprint_normal(": GMAC\n");
136
137 if (fdtbus_intr_establish(phandle, 0, IPL_NET, 0, sunxi_gmac_intr, sc) == NULL) {
138 aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr);
139 return;
140 }
141 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
142
143 dwc_gmac_attach(sc, GMAC_MII_CLK_150_250M_DIV102);
144 }
145
146 CFATTACH_DECL_NEW(sunxi_gmac, sizeof(struct dwc_gmac_softc),
147 sunxi_gmac_match, sunxi_gmac_attach, NULL, NULL);
148