sunxi_i2s.c revision 1.2.2.3
1 1.2.2.3 pgoyette /* $NetBSD: sunxi_i2s.c,v 1.2.2.3 2018/11/26 01:52:20 pgoyette Exp $ */ 2 1.2.2.2 pgoyette 3 1.2.2.2 pgoyette /*- 4 1.2.2.2 pgoyette * Copyright (c) 2018 Jared McNeill <jmcneill (at) invisible.ca> 5 1.2.2.2 pgoyette * All rights reserved. 6 1.2.2.2 pgoyette * 7 1.2.2.2 pgoyette * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 pgoyette * modification, are permitted provided that the following conditions 9 1.2.2.2 pgoyette * are met: 10 1.2.2.2 pgoyette * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 pgoyette * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 pgoyette * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 pgoyette * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 pgoyette * documentation and/or other materials provided with the distribution. 15 1.2.2.2 pgoyette * 16 1.2.2.2 pgoyette * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.2.2.2 pgoyette * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.2.2.2 pgoyette * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.2.2.2 pgoyette * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.2.2.2 pgoyette * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.2.2.2 pgoyette * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.2.2.2 pgoyette * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.2.2.2 pgoyette * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.2.2.2 pgoyette * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.2.2.2 pgoyette * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.2.2.2 pgoyette * SUCH DAMAGE. 27 1.2.2.2 pgoyette */ 28 1.2.2.2 pgoyette 29 1.2.2.2 pgoyette #include <sys/cdefs.h> 30 1.2.2.3 pgoyette __KERNEL_RCSID(0, "$NetBSD: sunxi_i2s.c,v 1.2.2.3 2018/11/26 01:52:20 pgoyette Exp $"); 31 1.2.2.2 pgoyette 32 1.2.2.2 pgoyette #include <sys/param.h> 33 1.2.2.2 pgoyette #include <sys/bus.h> 34 1.2.2.2 pgoyette #include <sys/cpu.h> 35 1.2.2.2 pgoyette #include <sys/device.h> 36 1.2.2.2 pgoyette #include <sys/kmem.h> 37 1.2.2.2 pgoyette #include <sys/gpio.h> 38 1.2.2.2 pgoyette 39 1.2.2.2 pgoyette #include <sys/audioio.h> 40 1.2.2.2 pgoyette #include <dev/audio_if.h> 41 1.2.2.2 pgoyette #include <dev/auconv.h> 42 1.2.2.2 pgoyette 43 1.2.2.2 pgoyette #include <dev/fdt/fdtvar.h> 44 1.2.2.2 pgoyette 45 1.2.2.2 pgoyette #define SUNXI_I2S_CLK_RATE 24576000 46 1.2.2.2 pgoyette 47 1.2.2.2 pgoyette #define DA_CTL 0x00 48 1.2.2.2 pgoyette #define DA_CTL_SDO_EN __BIT(8) 49 1.2.2.2 pgoyette #define DA_CTL_MS __BIT(5) 50 1.2.2.2 pgoyette #define DA_CTL_PCM __BIT(4) 51 1.2.2.2 pgoyette #define DA_CTL_TXEN __BIT(2) 52 1.2.2.2 pgoyette #define DA_CTL_RXEN __BIT(1) 53 1.2.2.2 pgoyette #define DA_CTL_GEN __BIT(0) 54 1.2.2.2 pgoyette #define DA_FAT0 0x04 55 1.2.2.2 pgoyette #define DA_FAT0_LRCP __BIT(7) 56 1.2.2.2 pgoyette #define DA_LRCP_NORMAL 0 57 1.2.2.2 pgoyette #define DA_LRCP_INVERTED 1 58 1.2.2.2 pgoyette #define DA_FAT0_BCP __BIT(6) 59 1.2.2.2 pgoyette #define DA_BCP_NORMAL 0 60 1.2.2.2 pgoyette #define DA_BCP_INVERTED 1 61 1.2.2.2 pgoyette #define DA_FAT0_SR __BITS(5,4) 62 1.2.2.2 pgoyette #define DA_FAT0_WSS __BITS(3,2) 63 1.2.2.2 pgoyette #define DA_FAT0_FMT __BITS(1,0) 64 1.2.2.2 pgoyette #define DA_FMT_I2S 0 65 1.2.2.2 pgoyette #define DA_FMT_LJ 1 66 1.2.2.2 pgoyette #define DA_FMT_RJ 2 67 1.2.2.2 pgoyette #define DA_FAT1 0x08 68 1.2.2.2 pgoyette #define DA_ISTA 0x0c 69 1.2.2.2 pgoyette #define DA_RXFIFO 0x10 70 1.2.2.2 pgoyette #define DA_FCTL 0x14 71 1.2.2.2 pgoyette #define DA_FCTL_HUB_EN __BIT(31) 72 1.2.2.2 pgoyette #define DA_FCTL_FTX __BIT(25) 73 1.2.2.2 pgoyette #define DA_FCTL_FRX __BIT(24) 74 1.2.2.3 pgoyette #define DA_FCTL_TXIM __BIT(2) 75 1.2.2.3 pgoyette #define DA_FCTL_RXIM __BITS(1,0) 76 1.2.2.2 pgoyette #define DA_FSTA 0x18 77 1.2.2.2 pgoyette #define DA_INT 0x1c 78 1.2.2.2 pgoyette #define DA_INT_TX_DRQ __BIT(7) 79 1.2.2.2 pgoyette #define DA_INT_RX_DRQ __BIT(3) 80 1.2.2.2 pgoyette #define DA_TXFIFO 0x20 81 1.2.2.2 pgoyette #define DA_CLKD 0x24 82 1.2.2.2 pgoyette #define DA_CLKD_MCLKO_EN __BIT(7) 83 1.2.2.2 pgoyette #define DA_CLKD_BCLKDIV __BITS(6,4) 84 1.2.2.3 pgoyette #define DA_CLKD_BCLKDIV_8 3 85 1.2.2.2 pgoyette #define DA_CLKD_BCLKDIV_16 5 86 1.2.2.2 pgoyette #define DA_CLKD_MCLKDIV __BITS(3,0) 87 1.2.2.2 pgoyette #define DA_CLKD_MCLKDIV_1 0 88 1.2.2.2 pgoyette #define DA_TXCNT 0x28 89 1.2.2.2 pgoyette #define DA_RXCNT 0x2c 90 1.2.2.2 pgoyette 91 1.2.2.2 pgoyette #define DA_CHSEL_EN __BITS(11,4) 92 1.2.2.2 pgoyette #define DA_CHSEL_SEL __BITS(2,0) 93 1.2.2.2 pgoyette 94 1.2.2.2 pgoyette struct sunxi_i2s_config { 95 1.2.2.2 pgoyette const char *name; 96 1.2.2.2 pgoyette bus_size_t txchsel; 97 1.2.2.2 pgoyette bus_size_t txchmap; 98 1.2.2.2 pgoyette bus_size_t rxchsel; 99 1.2.2.2 pgoyette bus_size_t rxchmap; 100 1.2.2.2 pgoyette }; 101 1.2.2.2 pgoyette 102 1.2.2.2 pgoyette static const struct sunxi_i2s_config sun50i_a64_codec_config = { 103 1.2.2.2 pgoyette .name = "Audio Codec (digital part)", 104 1.2.2.2 pgoyette .txchsel = 0x30, 105 1.2.2.2 pgoyette .txchmap = 0x34, 106 1.2.2.2 pgoyette .rxchsel = 0x38, 107 1.2.2.2 pgoyette .rxchmap = 0x3c, 108 1.2.2.2 pgoyette }; 109 1.2.2.2 pgoyette 110 1.2.2.2 pgoyette static const struct of_compat_data compat_data[] = { 111 1.2.2.2 pgoyette { "allwinner,sun50i-a64-acodec-i2s", 112 1.2.2.2 pgoyette (uintptr_t)&sun50i_a64_codec_config }, 113 1.2.2.2 pgoyette 114 1.2.2.2 pgoyette { NULL } 115 1.2.2.2 pgoyette }; 116 1.2.2.2 pgoyette 117 1.2.2.2 pgoyette struct sunxi_i2s_softc; 118 1.2.2.2 pgoyette 119 1.2.2.2 pgoyette struct sunxi_i2s_chan { 120 1.2.2.2 pgoyette struct sunxi_i2s_softc *ch_sc; 121 1.2.2.2 pgoyette u_int ch_mode; 122 1.2.2.2 pgoyette 123 1.2.2.2 pgoyette struct fdtbus_dma *ch_dma; 124 1.2.2.2 pgoyette struct fdtbus_dma_req ch_req; 125 1.2.2.2 pgoyette 126 1.2.2.2 pgoyette audio_params_t ch_params; 127 1.2.2.2 pgoyette 128 1.2.2.2 pgoyette bus_addr_t ch_start_phys; 129 1.2.2.2 pgoyette bus_addr_t ch_end_phys; 130 1.2.2.2 pgoyette bus_addr_t ch_cur_phys; 131 1.2.2.2 pgoyette int ch_blksize; 132 1.2.2.2 pgoyette 133 1.2.2.2 pgoyette void (*ch_intr)(void *); 134 1.2.2.2 pgoyette void *ch_intrarg; 135 1.2.2.2 pgoyette }; 136 1.2.2.2 pgoyette 137 1.2.2.2 pgoyette struct sunxi_i2s_dma { 138 1.2.2.2 pgoyette LIST_ENTRY(sunxi_i2s_dma) dma_list; 139 1.2.2.2 pgoyette bus_dmamap_t dma_map; 140 1.2.2.2 pgoyette void *dma_addr; 141 1.2.2.2 pgoyette size_t dma_size; 142 1.2.2.2 pgoyette bus_dma_segment_t dma_segs[1]; 143 1.2.2.2 pgoyette int dma_nsegs; 144 1.2.2.2 pgoyette }; 145 1.2.2.2 pgoyette 146 1.2.2.2 pgoyette struct sunxi_i2s_softc { 147 1.2.2.2 pgoyette device_t sc_dev; 148 1.2.2.2 pgoyette bus_space_tag_t sc_bst; 149 1.2.2.2 pgoyette bus_space_handle_t sc_bsh; 150 1.2.2.2 pgoyette bus_dma_tag_t sc_dmat; 151 1.2.2.2 pgoyette int sc_phandle; 152 1.2.2.2 pgoyette bus_addr_t sc_baseaddr; 153 1.2.2.2 pgoyette 154 1.2.2.2 pgoyette struct sunxi_i2s_config *sc_cfg; 155 1.2.2.2 pgoyette 156 1.2.2.2 pgoyette LIST_HEAD(, sunxi_i2s_dma) sc_dmalist; 157 1.2.2.2 pgoyette 158 1.2.2.2 pgoyette kmutex_t sc_lock; 159 1.2.2.2 pgoyette kmutex_t sc_intr_lock; 160 1.2.2.2 pgoyette 161 1.2.2.2 pgoyette struct audio_format sc_format; 162 1.2.2.2 pgoyette struct audio_encoding_set *sc_encodings; 163 1.2.2.2 pgoyette 164 1.2.2.2 pgoyette struct sunxi_i2s_chan sc_pchan; 165 1.2.2.2 pgoyette struct sunxi_i2s_chan sc_rchan; 166 1.2.2.2 pgoyette 167 1.2.2.2 pgoyette struct audio_dai_device sc_dai; 168 1.2.2.2 pgoyette }; 169 1.2.2.2 pgoyette 170 1.2.2.2 pgoyette #define I2S_READ(sc, reg) \ 171 1.2.2.2 pgoyette bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 172 1.2.2.2 pgoyette #define I2S_WRITE(sc, reg, val) \ 173 1.2.2.2 pgoyette bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 174 1.2.2.2 pgoyette 175 1.2.2.2 pgoyette static int 176 1.2.2.2 pgoyette sunxi_i2s_allocdma(struct sunxi_i2s_softc *sc, size_t size, 177 1.2.2.2 pgoyette size_t align, struct sunxi_i2s_dma *dma) 178 1.2.2.2 pgoyette { 179 1.2.2.2 pgoyette int error; 180 1.2.2.2 pgoyette 181 1.2.2.2 pgoyette dma->dma_size = size; 182 1.2.2.2 pgoyette error = bus_dmamem_alloc(sc->sc_dmat, dma->dma_size, align, 0, 183 1.2.2.2 pgoyette dma->dma_segs, 1, &dma->dma_nsegs, BUS_DMA_WAITOK); 184 1.2.2.2 pgoyette if (error) 185 1.2.2.2 pgoyette return error; 186 1.2.2.2 pgoyette 187 1.2.2.2 pgoyette error = bus_dmamem_map(sc->sc_dmat, dma->dma_segs, dma->dma_nsegs, 188 1.2.2.2 pgoyette dma->dma_size, &dma->dma_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 189 1.2.2.2 pgoyette if (error) 190 1.2.2.2 pgoyette goto free; 191 1.2.2.2 pgoyette 192 1.2.2.2 pgoyette error = bus_dmamap_create(sc->sc_dmat, dma->dma_size, dma->dma_nsegs, 193 1.2.2.2 pgoyette dma->dma_size, 0, BUS_DMA_WAITOK, &dma->dma_map); 194 1.2.2.2 pgoyette if (error) 195 1.2.2.2 pgoyette goto unmap; 196 1.2.2.2 pgoyette 197 1.2.2.2 pgoyette error = bus_dmamap_load(sc->sc_dmat, dma->dma_map, dma->dma_addr, 198 1.2.2.2 pgoyette dma->dma_size, NULL, BUS_DMA_WAITOK); 199 1.2.2.2 pgoyette if (error) 200 1.2.2.2 pgoyette goto destroy; 201 1.2.2.2 pgoyette 202 1.2.2.2 pgoyette return 0; 203 1.2.2.2 pgoyette 204 1.2.2.2 pgoyette destroy: 205 1.2.2.2 pgoyette bus_dmamap_destroy(sc->sc_dmat, dma->dma_map); 206 1.2.2.2 pgoyette unmap: 207 1.2.2.2 pgoyette bus_dmamem_unmap(sc->sc_dmat, dma->dma_addr, dma->dma_size); 208 1.2.2.2 pgoyette free: 209 1.2.2.2 pgoyette bus_dmamem_free(sc->sc_dmat, dma->dma_segs, dma->dma_nsegs); 210 1.2.2.2 pgoyette 211 1.2.2.2 pgoyette return error; 212 1.2.2.2 pgoyette } 213 1.2.2.2 pgoyette 214 1.2.2.2 pgoyette static void 215 1.2.2.2 pgoyette sunxi_i2s_freedma(struct sunxi_i2s_softc *sc, struct sunxi_i2s_dma *dma) 216 1.2.2.2 pgoyette { 217 1.2.2.2 pgoyette bus_dmamap_unload(sc->sc_dmat, dma->dma_map); 218 1.2.2.2 pgoyette bus_dmamap_destroy(sc->sc_dmat, dma->dma_map); 219 1.2.2.2 pgoyette bus_dmamem_unmap(sc->sc_dmat, dma->dma_addr, dma->dma_size); 220 1.2.2.2 pgoyette bus_dmamem_free(sc->sc_dmat, dma->dma_segs, dma->dma_nsegs); 221 1.2.2.2 pgoyette } 222 1.2.2.2 pgoyette 223 1.2.2.2 pgoyette static int 224 1.2.2.2 pgoyette sunxi_i2s_transfer(struct sunxi_i2s_chan *ch) 225 1.2.2.2 pgoyette { 226 1.2.2.2 pgoyette bus_dma_segment_t seg; 227 1.2.2.2 pgoyette 228 1.2.2.2 pgoyette seg.ds_addr = ch->ch_cur_phys; 229 1.2.2.2 pgoyette seg.ds_len = ch->ch_blksize; 230 1.2.2.2 pgoyette ch->ch_req.dreq_segs = &seg; 231 1.2.2.2 pgoyette ch->ch_req.dreq_nsegs = 1; 232 1.2.2.2 pgoyette 233 1.2.2.2 pgoyette return fdtbus_dma_transfer(ch->ch_dma, &ch->ch_req); 234 1.2.2.2 pgoyette } 235 1.2.2.2 pgoyette 236 1.2.2.2 pgoyette static int 237 1.2.2.2 pgoyette sunxi_i2s_open(void *priv, int flags) 238 1.2.2.2 pgoyette { 239 1.2.2.2 pgoyette return 0; 240 1.2.2.2 pgoyette } 241 1.2.2.2 pgoyette 242 1.2.2.2 pgoyette static void 243 1.2.2.2 pgoyette sunxi_i2s_close(void *priv) 244 1.2.2.2 pgoyette { 245 1.2.2.2 pgoyette } 246 1.2.2.2 pgoyette 247 1.2.2.2 pgoyette static int 248 1.2.2.2 pgoyette sunxi_i2s_query_encoding(void *priv, struct audio_encoding *ae) 249 1.2.2.2 pgoyette { 250 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 251 1.2.2.2 pgoyette 252 1.2.2.2 pgoyette return auconv_query_encoding(sc->sc_encodings, ae); 253 1.2.2.2 pgoyette } 254 1.2.2.2 pgoyette 255 1.2.2.2 pgoyette static int 256 1.2.2.2 pgoyette sunxi_i2s_set_params(void *priv, int setmode, int usemode, 257 1.2.2.2 pgoyette audio_params_t *play, audio_params_t *rec, 258 1.2.2.2 pgoyette stream_filter_list_t *pfil, stream_filter_list_t *rfil) 259 1.2.2.2 pgoyette { 260 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 261 1.2.2.2 pgoyette int index; 262 1.2.2.2 pgoyette 263 1.2.2.2 pgoyette if (play && (setmode & AUMODE_PLAY)) { 264 1.2.2.2 pgoyette index = auconv_set_converter(&sc->sc_format, 1, 265 1.2.2.2 pgoyette AUMODE_PLAY, play, true, pfil); 266 1.2.2.2 pgoyette if (index < 0) 267 1.2.2.2 pgoyette return EINVAL; 268 1.2.2.2 pgoyette sc->sc_pchan.ch_params = pfil->req_size > 0 ? 269 1.2.2.2 pgoyette pfil->filters[0].param : *play; 270 1.2.2.3 pgoyette pfil->prepend(pfil, linear16_16_to_linear32, 271 1.2.2.3 pgoyette &sc->sc_pchan.ch_params); 272 1.2.2.2 pgoyette } 273 1.2.2.2 pgoyette if (rec && (setmode & AUMODE_RECORD)) { 274 1.2.2.2 pgoyette index = auconv_set_converter(&sc->sc_format, 1, 275 1.2.2.2 pgoyette AUMODE_RECORD, rec, true, rfil); 276 1.2.2.2 pgoyette if (index < 0) 277 1.2.2.2 pgoyette return EINVAL; 278 1.2.2.2 pgoyette sc->sc_rchan.ch_params = rfil->req_size > 0 ? 279 1.2.2.2 pgoyette rfil->filters[0].param : *rec; 280 1.2.2.3 pgoyette rfil->prepend(rfil, linear32_32_to_linear16, 281 1.2.2.3 pgoyette &sc->sc_rchan.ch_params); 282 1.2.2.2 pgoyette } 283 1.2.2.2 pgoyette 284 1.2.2.2 pgoyette return 0; 285 1.2.2.2 pgoyette } 286 1.2.2.2 pgoyette 287 1.2.2.2 pgoyette static void * 288 1.2.2.2 pgoyette sunxi_i2s_allocm(void *priv, int dir, size_t size) 289 1.2.2.2 pgoyette { 290 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 291 1.2.2.2 pgoyette struct sunxi_i2s_dma *dma; 292 1.2.2.2 pgoyette int error; 293 1.2.2.2 pgoyette 294 1.2.2.2 pgoyette dma = kmem_alloc(sizeof(*dma), KM_SLEEP); 295 1.2.2.2 pgoyette 296 1.2.2.2 pgoyette error = sunxi_i2s_allocdma(sc, size, 16, dma); 297 1.2.2.2 pgoyette if (error) { 298 1.2.2.2 pgoyette kmem_free(dma, sizeof(*dma)); 299 1.2.2.2 pgoyette device_printf(sc->sc_dev, "couldn't allocate DMA memory (%d)\n", 300 1.2.2.2 pgoyette error); 301 1.2.2.2 pgoyette return NULL; 302 1.2.2.2 pgoyette } 303 1.2.2.2 pgoyette 304 1.2.2.2 pgoyette LIST_INSERT_HEAD(&sc->sc_dmalist, dma, dma_list); 305 1.2.2.2 pgoyette 306 1.2.2.2 pgoyette return dma->dma_addr; 307 1.2.2.2 pgoyette } 308 1.2.2.2 pgoyette 309 1.2.2.2 pgoyette static void 310 1.2.2.2 pgoyette sunxi_i2s_freem(void *priv, void *addr, size_t size) 311 1.2.2.2 pgoyette { 312 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 313 1.2.2.2 pgoyette struct sunxi_i2s_dma *dma; 314 1.2.2.2 pgoyette 315 1.2.2.2 pgoyette LIST_FOREACH(dma, &sc->sc_dmalist, dma_list) 316 1.2.2.2 pgoyette if (dma->dma_addr == addr) { 317 1.2.2.2 pgoyette sunxi_i2s_freedma(sc, dma); 318 1.2.2.2 pgoyette LIST_REMOVE(dma, dma_list); 319 1.2.2.2 pgoyette kmem_free(dma, sizeof(*dma)); 320 1.2.2.2 pgoyette break; 321 1.2.2.2 pgoyette } 322 1.2.2.2 pgoyette } 323 1.2.2.2 pgoyette 324 1.2.2.2 pgoyette static paddr_t 325 1.2.2.2 pgoyette sunxi_i2s_mappage(void *priv, void *addr, off_t off, int prot) 326 1.2.2.2 pgoyette { 327 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 328 1.2.2.2 pgoyette struct sunxi_i2s_dma *dma; 329 1.2.2.2 pgoyette 330 1.2.2.2 pgoyette if (off < 0) 331 1.2.2.2 pgoyette return -1; 332 1.2.2.2 pgoyette 333 1.2.2.2 pgoyette LIST_FOREACH(dma, &sc->sc_dmalist, dma_list) 334 1.2.2.2 pgoyette if (dma->dma_addr == addr) { 335 1.2.2.2 pgoyette return bus_dmamem_mmap(sc->sc_dmat, dma->dma_segs, 336 1.2.2.2 pgoyette dma->dma_nsegs, off, prot, BUS_DMA_WAITOK); 337 1.2.2.2 pgoyette } 338 1.2.2.2 pgoyette 339 1.2.2.2 pgoyette return -1; 340 1.2.2.2 pgoyette } 341 1.2.2.2 pgoyette 342 1.2.2.2 pgoyette static int 343 1.2.2.2 pgoyette sunxi_i2s_get_props(void *priv) 344 1.2.2.2 pgoyette { 345 1.2.2.2 pgoyette return AUDIO_PROP_PLAYBACK|AUDIO_PROP_CAPTURE| 346 1.2.2.2 pgoyette AUDIO_PROP_MMAP|AUDIO_PROP_FULLDUPLEX|AUDIO_PROP_INDEPENDENT; 347 1.2.2.2 pgoyette } 348 1.2.2.2 pgoyette 349 1.2.2.2 pgoyette static int 350 1.2.2.2 pgoyette sunxi_i2s_round_blocksize(void *priv, int bs, int mode, 351 1.2.2.2 pgoyette const audio_params_t *params) 352 1.2.2.2 pgoyette { 353 1.2.2.2 pgoyette bs &= ~3; 354 1.2.2.2 pgoyette if (bs == 0) 355 1.2.2.2 pgoyette bs = 4; 356 1.2.2.2 pgoyette return bs; 357 1.2.2.2 pgoyette } 358 1.2.2.2 pgoyette 359 1.2.2.2 pgoyette static size_t 360 1.2.2.2 pgoyette sunxi_i2s_round_buffersize(void *priv, int dir, size_t bufsize) 361 1.2.2.2 pgoyette { 362 1.2.2.2 pgoyette return bufsize; 363 1.2.2.2 pgoyette } 364 1.2.2.2 pgoyette 365 1.2.2.2 pgoyette static int 366 1.2.2.2 pgoyette sunxi_i2s_trigger_output(void *priv, void *start, void *end, int blksize, 367 1.2.2.2 pgoyette void (*intr)(void *), void *intrarg, const audio_params_t *params) 368 1.2.2.2 pgoyette { 369 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 370 1.2.2.2 pgoyette struct sunxi_i2s_chan *ch = &sc->sc_pchan; 371 1.2.2.2 pgoyette struct sunxi_i2s_dma *dma; 372 1.2.2.2 pgoyette bus_addr_t pstart; 373 1.2.2.2 pgoyette bus_size_t psize; 374 1.2.2.2 pgoyette uint32_t val; 375 1.2.2.2 pgoyette int error; 376 1.2.2.2 pgoyette 377 1.2.2.2 pgoyette pstart = 0; 378 1.2.2.2 pgoyette psize = (uintptr_t)end - (uintptr_t)start; 379 1.2.2.2 pgoyette 380 1.2.2.2 pgoyette LIST_FOREACH(dma, &sc->sc_dmalist, dma_list) 381 1.2.2.2 pgoyette if (dma->dma_addr == start) { 382 1.2.2.2 pgoyette pstart = dma->dma_map->dm_segs[0].ds_addr; 383 1.2.2.2 pgoyette break; 384 1.2.2.2 pgoyette } 385 1.2.2.2 pgoyette if (pstart == 0) { 386 1.2.2.2 pgoyette device_printf(sc->sc_dev, "bad addr %p\n", start); 387 1.2.2.2 pgoyette return EINVAL; 388 1.2.2.2 pgoyette } 389 1.2.2.2 pgoyette 390 1.2.2.2 pgoyette ch->ch_intr = intr; 391 1.2.2.2 pgoyette ch->ch_intrarg = intrarg; 392 1.2.2.2 pgoyette ch->ch_start_phys = ch->ch_cur_phys = pstart; 393 1.2.2.2 pgoyette ch->ch_end_phys = pstart + psize; 394 1.2.2.2 pgoyette ch->ch_blksize = blksize; 395 1.2.2.2 pgoyette 396 1.2.2.2 pgoyette /* Flush FIFO */ 397 1.2.2.2 pgoyette val = I2S_READ(sc, DA_FCTL); 398 1.2.2.2 pgoyette I2S_WRITE(sc, DA_FCTL, val | DA_FCTL_FTX); 399 1.2.2.2 pgoyette I2S_WRITE(sc, DA_FCTL, val & ~DA_FCTL_FTX); 400 1.2.2.2 pgoyette 401 1.2.2.2 pgoyette /* Reset TX sample counter */ 402 1.2.2.2 pgoyette I2S_WRITE(sc, DA_TXCNT, 0); 403 1.2.2.2 pgoyette 404 1.2.2.2 pgoyette /* Enable transmitter block */ 405 1.2.2.2 pgoyette val = I2S_READ(sc, DA_CTL); 406 1.2.2.2 pgoyette I2S_WRITE(sc, DA_CTL, val | DA_CTL_TXEN); 407 1.2.2.2 pgoyette 408 1.2.2.2 pgoyette /* Enable TX DRQ */ 409 1.2.2.2 pgoyette val = I2S_READ(sc, DA_INT); 410 1.2.2.2 pgoyette I2S_WRITE(sc, DA_INT, val | DA_INT_TX_DRQ); 411 1.2.2.2 pgoyette 412 1.2.2.2 pgoyette /* Start DMA transfer */ 413 1.2.2.2 pgoyette error = sunxi_i2s_transfer(ch); 414 1.2.2.2 pgoyette if (error != 0) { 415 1.2.2.2 pgoyette aprint_error_dev(sc->sc_dev, 416 1.2.2.2 pgoyette "failed to start DMA transfer: %d\n", error); 417 1.2.2.2 pgoyette return error; 418 1.2.2.2 pgoyette } 419 1.2.2.2 pgoyette 420 1.2.2.2 pgoyette return 0; 421 1.2.2.2 pgoyette } 422 1.2.2.2 pgoyette 423 1.2.2.2 pgoyette static int 424 1.2.2.2 pgoyette sunxi_i2s_trigger_input(void *priv, void *start, void *end, int blksize, 425 1.2.2.2 pgoyette void (*intr)(void *), void *intrarg, const audio_params_t *params) 426 1.2.2.2 pgoyette { 427 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 428 1.2.2.2 pgoyette struct sunxi_i2s_chan *ch = &sc->sc_rchan; 429 1.2.2.2 pgoyette struct sunxi_i2s_dma *dma; 430 1.2.2.2 pgoyette bus_addr_t pstart; 431 1.2.2.2 pgoyette bus_size_t psize; 432 1.2.2.2 pgoyette uint32_t val; 433 1.2.2.2 pgoyette int error; 434 1.2.2.2 pgoyette 435 1.2.2.2 pgoyette pstart = 0; 436 1.2.2.2 pgoyette psize = (uintptr_t)end - (uintptr_t)start; 437 1.2.2.2 pgoyette 438 1.2.2.2 pgoyette LIST_FOREACH(dma, &sc->sc_dmalist, dma_list) 439 1.2.2.2 pgoyette if (dma->dma_addr == start) { 440 1.2.2.2 pgoyette pstart = dma->dma_map->dm_segs[0].ds_addr; 441 1.2.2.2 pgoyette break; 442 1.2.2.2 pgoyette } 443 1.2.2.2 pgoyette if (pstart == 0) { 444 1.2.2.2 pgoyette device_printf(sc->sc_dev, "bad addr %p\n", start); 445 1.2.2.2 pgoyette return EINVAL; 446 1.2.2.2 pgoyette } 447 1.2.2.2 pgoyette 448 1.2.2.2 pgoyette ch->ch_intr = intr; 449 1.2.2.2 pgoyette ch->ch_intrarg = intrarg; 450 1.2.2.2 pgoyette ch->ch_start_phys = ch->ch_cur_phys = pstart; 451 1.2.2.2 pgoyette ch->ch_end_phys = pstart + psize; 452 1.2.2.2 pgoyette ch->ch_blksize = blksize; 453 1.2.2.2 pgoyette 454 1.2.2.2 pgoyette /* Flush FIFO */ 455 1.2.2.2 pgoyette val = I2S_READ(sc, DA_FCTL); 456 1.2.2.2 pgoyette I2S_WRITE(sc, DA_FCTL, val | DA_FCTL_FRX); 457 1.2.2.2 pgoyette I2S_WRITE(sc, DA_FCTL, val & ~DA_FCTL_FRX); 458 1.2.2.2 pgoyette 459 1.2.2.2 pgoyette /* Reset RX sample counter */ 460 1.2.2.2 pgoyette I2S_WRITE(sc, DA_RXCNT, 0); 461 1.2.2.2 pgoyette 462 1.2.2.2 pgoyette /* Enable receiver block */ 463 1.2.2.2 pgoyette val = I2S_READ(sc, DA_CTL); 464 1.2.2.2 pgoyette I2S_WRITE(sc, DA_CTL, val | DA_CTL_RXEN); 465 1.2.2.2 pgoyette 466 1.2.2.2 pgoyette /* Enable RX DRQ */ 467 1.2.2.2 pgoyette val = I2S_READ(sc, DA_INT); 468 1.2.2.2 pgoyette I2S_WRITE(sc, DA_INT, val | DA_INT_RX_DRQ); 469 1.2.2.2 pgoyette 470 1.2.2.2 pgoyette /* Start DMA transfer */ 471 1.2.2.2 pgoyette error = sunxi_i2s_transfer(ch); 472 1.2.2.2 pgoyette if (error != 0) { 473 1.2.2.2 pgoyette aprint_error_dev(sc->sc_dev, 474 1.2.2.2 pgoyette "failed to start DMA transfer: %d\n", error); 475 1.2.2.2 pgoyette return error; 476 1.2.2.2 pgoyette } 477 1.2.2.2 pgoyette 478 1.2.2.2 pgoyette return 0; 479 1.2.2.2 pgoyette } 480 1.2.2.2 pgoyette 481 1.2.2.2 pgoyette static int 482 1.2.2.2 pgoyette sunxi_i2s_halt_output(void *priv) 483 1.2.2.2 pgoyette { 484 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 485 1.2.2.2 pgoyette struct sunxi_i2s_chan *ch = &sc->sc_pchan; 486 1.2.2.2 pgoyette uint32_t val; 487 1.2.2.2 pgoyette 488 1.2.2.2 pgoyette /* Disable DMA channel */ 489 1.2.2.2 pgoyette fdtbus_dma_halt(ch->ch_dma); 490 1.2.2.2 pgoyette 491 1.2.2.2 pgoyette /* Disable transmitter block */ 492 1.2.2.2 pgoyette val = I2S_READ(sc, DA_CTL); 493 1.2.2.2 pgoyette I2S_WRITE(sc, DA_CTL, val & ~DA_CTL_TXEN); 494 1.2.2.2 pgoyette 495 1.2.2.2 pgoyette /* Disable TX DRQ */ 496 1.2.2.2 pgoyette val = I2S_READ(sc, DA_INT); 497 1.2.2.2 pgoyette I2S_WRITE(sc, DA_INT, val & ~DA_INT_TX_DRQ); 498 1.2.2.2 pgoyette 499 1.2.2.2 pgoyette ch->ch_intr = NULL; 500 1.2.2.2 pgoyette ch->ch_intrarg = NULL; 501 1.2.2.2 pgoyette 502 1.2.2.2 pgoyette return 0; 503 1.2.2.2 pgoyette } 504 1.2.2.2 pgoyette 505 1.2.2.2 pgoyette static int 506 1.2.2.2 pgoyette sunxi_i2s_halt_input(void *priv) 507 1.2.2.2 pgoyette { 508 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 509 1.2.2.2 pgoyette struct sunxi_i2s_chan *ch = &sc->sc_rchan; 510 1.2.2.2 pgoyette uint32_t val; 511 1.2.2.2 pgoyette 512 1.2.2.2 pgoyette /* Disable DMA channel */ 513 1.2.2.2 pgoyette fdtbus_dma_halt(ch->ch_dma); 514 1.2.2.2 pgoyette 515 1.2.2.2 pgoyette /* Disable receiver block */ 516 1.2.2.2 pgoyette val = I2S_READ(sc, DA_CTL); 517 1.2.2.2 pgoyette I2S_WRITE(sc, DA_CTL, val & ~DA_CTL_RXEN); 518 1.2.2.2 pgoyette 519 1.2.2.2 pgoyette /* Disable RX DRQ */ 520 1.2.2.2 pgoyette val = I2S_READ(sc, DA_INT); 521 1.2.2.2 pgoyette I2S_WRITE(sc, DA_INT, val & ~DA_INT_RX_DRQ); 522 1.2.2.2 pgoyette 523 1.2.2.2 pgoyette return 0; 524 1.2.2.2 pgoyette } 525 1.2.2.2 pgoyette 526 1.2.2.2 pgoyette static void 527 1.2.2.2 pgoyette sunxi_i2s_get_locks(void *priv, kmutex_t **intr, kmutex_t **thread) 528 1.2.2.2 pgoyette { 529 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = priv; 530 1.2.2.2 pgoyette 531 1.2.2.2 pgoyette *intr = &sc->sc_intr_lock; 532 1.2.2.2 pgoyette *thread = &sc->sc_lock; 533 1.2.2.2 pgoyette } 534 1.2.2.2 pgoyette 535 1.2.2.2 pgoyette static const struct audio_hw_if sunxi_i2s_hw_if = { 536 1.2.2.2 pgoyette .open = sunxi_i2s_open, 537 1.2.2.2 pgoyette .close = sunxi_i2s_close, 538 1.2.2.2 pgoyette .drain = NULL, 539 1.2.2.2 pgoyette .query_encoding = sunxi_i2s_query_encoding, 540 1.2.2.2 pgoyette .set_params = sunxi_i2s_set_params, 541 1.2.2.2 pgoyette .allocm = sunxi_i2s_allocm, 542 1.2.2.2 pgoyette .freem = sunxi_i2s_freem, 543 1.2.2.2 pgoyette .mappage = sunxi_i2s_mappage, 544 1.2.2.2 pgoyette .get_props = sunxi_i2s_get_props, 545 1.2.2.2 pgoyette .round_blocksize = sunxi_i2s_round_blocksize, 546 1.2.2.2 pgoyette .round_buffersize = sunxi_i2s_round_buffersize, 547 1.2.2.2 pgoyette .trigger_output = sunxi_i2s_trigger_output, 548 1.2.2.2 pgoyette .trigger_input = sunxi_i2s_trigger_input, 549 1.2.2.2 pgoyette .halt_output = sunxi_i2s_halt_output, 550 1.2.2.2 pgoyette .halt_input = sunxi_i2s_halt_input, 551 1.2.2.2 pgoyette .get_locks = sunxi_i2s_get_locks, 552 1.2.2.2 pgoyette }; 553 1.2.2.2 pgoyette 554 1.2.2.2 pgoyette static void 555 1.2.2.2 pgoyette sunxi_i2s_dmaintr(void *priv) 556 1.2.2.2 pgoyette { 557 1.2.2.2 pgoyette struct sunxi_i2s_chan * const ch = priv; 558 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = ch->ch_sc; 559 1.2.2.2 pgoyette 560 1.2.2.2 pgoyette mutex_enter(&sc->sc_intr_lock); 561 1.2.2.2 pgoyette ch->ch_cur_phys += ch->ch_blksize; 562 1.2.2.2 pgoyette if (ch->ch_cur_phys >= ch->ch_end_phys) 563 1.2.2.2 pgoyette ch->ch_cur_phys = ch->ch_start_phys; 564 1.2.2.2 pgoyette 565 1.2.2.2 pgoyette if (ch->ch_intr) { 566 1.2.2.2 pgoyette ch->ch_intr(ch->ch_intrarg); 567 1.2.2.2 pgoyette sunxi_i2s_transfer(ch); 568 1.2.2.2 pgoyette } 569 1.2.2.2 pgoyette mutex_exit(&sc->sc_intr_lock); 570 1.2.2.2 pgoyette } 571 1.2.2.2 pgoyette 572 1.2.2.2 pgoyette static int 573 1.2.2.2 pgoyette sunxi_i2s_chan_init(struct sunxi_i2s_softc *sc, 574 1.2.2.2 pgoyette struct sunxi_i2s_chan *ch, u_int mode, const char *dmaname) 575 1.2.2.2 pgoyette { 576 1.2.2.2 pgoyette ch->ch_sc = sc; 577 1.2.2.2 pgoyette ch->ch_mode = mode; 578 1.2.2.2 pgoyette ch->ch_dma = fdtbus_dma_get(sc->sc_phandle, dmaname, sunxi_i2s_dmaintr, ch); 579 1.2.2.2 pgoyette if (ch->ch_dma == NULL) { 580 1.2.2.2 pgoyette aprint_error(": couldn't get dma channel \"%s\"\n", dmaname); 581 1.2.2.2 pgoyette return ENXIO; 582 1.2.2.2 pgoyette } 583 1.2.2.2 pgoyette 584 1.2.2.2 pgoyette if (mode == AUMODE_PLAY) { 585 1.2.2.2 pgoyette ch->ch_req.dreq_dir = FDT_DMA_WRITE; 586 1.2.2.2 pgoyette ch->ch_req.dreq_dev_phys = 587 1.2.2.2 pgoyette sc->sc_baseaddr + DA_TXFIFO; 588 1.2.2.2 pgoyette } else { 589 1.2.2.2 pgoyette ch->ch_req.dreq_dir = FDT_DMA_READ; 590 1.2.2.2 pgoyette ch->ch_req.dreq_dev_phys = 591 1.2.2.2 pgoyette sc->sc_baseaddr + DA_RXFIFO; 592 1.2.2.2 pgoyette } 593 1.2.2.2 pgoyette ch->ch_req.dreq_mem_opt.opt_bus_width = 32; 594 1.2.2.2 pgoyette ch->ch_req.dreq_mem_opt.opt_burst_len = 8; 595 1.2.2.2 pgoyette ch->ch_req.dreq_dev_opt.opt_bus_width = 32; 596 1.2.2.2 pgoyette ch->ch_req.dreq_dev_opt.opt_burst_len = 8; 597 1.2.2.2 pgoyette 598 1.2.2.2 pgoyette return 0; 599 1.2.2.2 pgoyette } 600 1.2.2.2 pgoyette 601 1.2.2.2 pgoyette static int 602 1.2.2.2 pgoyette sunxi_i2s_dai_set_sysclk(audio_dai_tag_t dai, u_int rate, int dir) 603 1.2.2.2 pgoyette { 604 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = audio_dai_private(dai); 605 1.2.2.2 pgoyette uint32_t val; 606 1.2.2.2 pgoyette 607 1.2.2.2 pgoyette /* XXX */ 608 1.2.2.2 pgoyette 609 1.2.2.2 pgoyette val = DA_CLKD_MCLKO_EN; 610 1.2.2.3 pgoyette val |= __SHIFTIN(DA_CLKD_BCLKDIV_8, DA_CLKD_BCLKDIV); 611 1.2.2.2 pgoyette val |= __SHIFTIN(DA_CLKD_MCLKDIV_1, DA_CLKD_MCLKDIV); 612 1.2.2.2 pgoyette 613 1.2.2.2 pgoyette I2S_WRITE(sc, DA_CLKD, val); 614 1.2.2.2 pgoyette 615 1.2.2.2 pgoyette return 0; 616 1.2.2.2 pgoyette } 617 1.2.2.2 pgoyette 618 1.2.2.2 pgoyette static int 619 1.2.2.2 pgoyette sunxi_i2s_dai_set_format(audio_dai_tag_t dai, u_int format) 620 1.2.2.2 pgoyette { 621 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = audio_dai_private(dai); 622 1.2.2.2 pgoyette uint32_t ctl, fat0; 623 1.2.2.2 pgoyette 624 1.2.2.2 pgoyette const u_int fmt = __SHIFTOUT(format, AUDIO_DAI_FORMAT_MASK); 625 1.2.2.2 pgoyette const u_int pol = __SHIFTOUT(format, AUDIO_DAI_POLARITY_MASK); 626 1.2.2.2 pgoyette const u_int clk = __SHIFTOUT(format, AUDIO_DAI_CLOCK_MASK); 627 1.2.2.2 pgoyette 628 1.2.2.2 pgoyette ctl = I2S_READ(sc, DA_CTL); 629 1.2.2.2 pgoyette fat0 = I2S_READ(sc, DA_FAT0); 630 1.2.2.2 pgoyette 631 1.2.2.2 pgoyette fat0 &= ~DA_FAT0_FMT; 632 1.2.2.2 pgoyette switch (fmt) { 633 1.2.2.2 pgoyette case AUDIO_DAI_FORMAT_I2S: 634 1.2.2.2 pgoyette fat0 |= __SHIFTIN(DA_FMT_I2S, DA_FAT0_FMT); 635 1.2.2.2 pgoyette break; 636 1.2.2.2 pgoyette case AUDIO_DAI_FORMAT_RJ: 637 1.2.2.2 pgoyette fat0 |= __SHIFTIN(DA_FMT_RJ, DA_FAT0_FMT); 638 1.2.2.2 pgoyette break; 639 1.2.2.2 pgoyette case AUDIO_DAI_FORMAT_LJ: 640 1.2.2.2 pgoyette fat0 |= __SHIFTIN(DA_FMT_LJ, DA_FAT0_FMT); 641 1.2.2.2 pgoyette break; 642 1.2.2.2 pgoyette default: 643 1.2.2.2 pgoyette return EINVAL; 644 1.2.2.2 pgoyette } 645 1.2.2.2 pgoyette 646 1.2.2.2 pgoyette fat0 &= ~(DA_FAT0_LRCP|DA_FAT0_BCP); 647 1.2.2.2 pgoyette if (AUDIO_DAI_POLARITY_B(pol)) 648 1.2.2.2 pgoyette fat0 |= __SHIFTIN(DA_BCP_INVERTED, DA_FAT0_BCP); 649 1.2.2.2 pgoyette if (AUDIO_DAI_POLARITY_F(pol)) 650 1.2.2.2 pgoyette fat0 |= __SHIFTIN(DA_LRCP_INVERTED, DA_FAT0_LRCP); 651 1.2.2.2 pgoyette 652 1.2.2.2 pgoyette switch (clk) { 653 1.2.2.2 pgoyette case AUDIO_DAI_CLOCK_CBM_CFM: 654 1.2.2.2 pgoyette ctl |= DA_CTL_MS; /* codec is master */ 655 1.2.2.2 pgoyette break; 656 1.2.2.2 pgoyette case AUDIO_DAI_CLOCK_CBS_CFS: 657 1.2.2.2 pgoyette ctl &= ~DA_CTL_MS; /* codec is slave */ 658 1.2.2.2 pgoyette break; 659 1.2.2.2 pgoyette default: 660 1.2.2.2 pgoyette return EINVAL; 661 1.2.2.2 pgoyette } 662 1.2.2.2 pgoyette 663 1.2.2.2 pgoyette ctl &= ~DA_CTL_PCM; 664 1.2.2.2 pgoyette 665 1.2.2.2 pgoyette I2S_WRITE(sc, DA_CTL, ctl); 666 1.2.2.2 pgoyette I2S_WRITE(sc, DA_FAT0, fat0); 667 1.2.2.2 pgoyette 668 1.2.2.2 pgoyette return 0; 669 1.2.2.2 pgoyette } 670 1.2.2.2 pgoyette 671 1.2.2.2 pgoyette static audio_dai_tag_t 672 1.2.2.2 pgoyette sunxi_i2s_dai_get_tag(device_t dev, const void *data, size_t len) 673 1.2.2.2 pgoyette { 674 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = device_private(dev); 675 1.2.2.2 pgoyette 676 1.2.2.2 pgoyette if (len != 4) 677 1.2.2.2 pgoyette return NULL; 678 1.2.2.2 pgoyette 679 1.2.2.2 pgoyette return &sc->sc_dai; 680 1.2.2.2 pgoyette } 681 1.2.2.2 pgoyette 682 1.2.2.2 pgoyette static struct fdtbus_dai_controller_func sunxi_i2s_dai_funcs = { 683 1.2.2.2 pgoyette .get_tag = sunxi_i2s_dai_get_tag 684 1.2.2.2 pgoyette }; 685 1.2.2.2 pgoyette 686 1.2.2.2 pgoyette static int 687 1.2.2.2 pgoyette sunxi_i2s_clock_init(int phandle) 688 1.2.2.2 pgoyette { 689 1.2.2.2 pgoyette struct fdtbus_reset *rst; 690 1.2.2.2 pgoyette struct clk *clk; 691 1.2.2.2 pgoyette int error; 692 1.2.2.2 pgoyette 693 1.2.2.2 pgoyette /* Set module clock to 24.576MHz, suitable for 48 kHz sampling rates */ 694 1.2.2.2 pgoyette clk = fdtbus_clock_get(phandle, "mod"); 695 1.2.2.2 pgoyette if (clk == NULL) { 696 1.2.2.2 pgoyette aprint_error(": couldn't find mod clock\n"); 697 1.2.2.2 pgoyette return ENXIO; 698 1.2.2.2 pgoyette } 699 1.2.2.2 pgoyette error = clk_set_rate(clk, SUNXI_I2S_CLK_RATE); 700 1.2.2.2 pgoyette if (error != 0) { 701 1.2.2.2 pgoyette aprint_error(": couldn't set mod clock rate: %d\n", error); 702 1.2.2.2 pgoyette return error; 703 1.2.2.2 pgoyette } 704 1.2.2.2 pgoyette error = clk_enable(clk); 705 1.2.2.2 pgoyette if (error != 0) { 706 1.2.2.2 pgoyette aprint_error(": couldn't enable mod clock: %d\n", error); 707 1.2.2.2 pgoyette return error; 708 1.2.2.2 pgoyette } 709 1.2.2.2 pgoyette 710 1.2.2.2 pgoyette /* Enable APB clock */ 711 1.2.2.2 pgoyette clk = fdtbus_clock_get(phandle, "apb"); 712 1.2.2.2 pgoyette if (clk == NULL) { 713 1.2.2.2 pgoyette aprint_error(": couldn't find apb clock\n"); 714 1.2.2.2 pgoyette return ENXIO; 715 1.2.2.2 pgoyette } 716 1.2.2.2 pgoyette error = clk_enable(clk); 717 1.2.2.2 pgoyette if (error != 0) { 718 1.2.2.2 pgoyette aprint_error(": couldn't enable apb clock: %d\n", error); 719 1.2.2.2 pgoyette return error; 720 1.2.2.2 pgoyette } 721 1.2.2.2 pgoyette 722 1.2.2.2 pgoyette /* De-assert reset */ 723 1.2.2.2 pgoyette rst = fdtbus_reset_get(phandle, "rst"); 724 1.2.2.2 pgoyette if (rst == NULL) { 725 1.2.2.2 pgoyette aprint_error(": couldn't find reset\n"); 726 1.2.2.2 pgoyette return ENXIO; 727 1.2.2.2 pgoyette } 728 1.2.2.2 pgoyette error = fdtbus_reset_deassert(rst); 729 1.2.2.2 pgoyette if (error != 0) { 730 1.2.2.2 pgoyette aprint_error(": couldn't de-assert reset: %d\n", error); 731 1.2.2.2 pgoyette return error; 732 1.2.2.2 pgoyette } 733 1.2.2.2 pgoyette 734 1.2.2.2 pgoyette return 0; 735 1.2.2.2 pgoyette } 736 1.2.2.2 pgoyette 737 1.2.2.2 pgoyette static int 738 1.2.2.2 pgoyette sunxi_i2s_match(device_t parent, cfdata_t cf, void *aux) 739 1.2.2.2 pgoyette { 740 1.2.2.2 pgoyette struct fdt_attach_args * const faa = aux; 741 1.2.2.2 pgoyette 742 1.2.2.2 pgoyette return of_match_compat_data(faa->faa_phandle, compat_data); 743 1.2.2.2 pgoyette } 744 1.2.2.2 pgoyette 745 1.2.2.2 pgoyette static void 746 1.2.2.2 pgoyette sunxi_i2s_attach(device_t parent, device_t self, void *aux) 747 1.2.2.2 pgoyette { 748 1.2.2.2 pgoyette struct sunxi_i2s_softc * const sc = device_private(self); 749 1.2.2.2 pgoyette struct fdt_attach_args * const faa = aux; 750 1.2.2.2 pgoyette const int phandle = faa->faa_phandle; 751 1.2.2.2 pgoyette bus_addr_t addr; 752 1.2.2.2 pgoyette bus_size_t size; 753 1.2.2.2 pgoyette uint32_t val; 754 1.2.2.2 pgoyette int error; 755 1.2.2.2 pgoyette 756 1.2.2.2 pgoyette if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 757 1.2.2.2 pgoyette aprint_error(": couldn't get registers\n"); 758 1.2.2.2 pgoyette return; 759 1.2.2.2 pgoyette } 760 1.2.2.2 pgoyette 761 1.2.2.2 pgoyette if (sunxi_i2s_clock_init(phandle) != 0) 762 1.2.2.2 pgoyette return; 763 1.2.2.2 pgoyette 764 1.2.2.2 pgoyette sc->sc_dev = self; 765 1.2.2.2 pgoyette sc->sc_phandle = phandle; 766 1.2.2.2 pgoyette sc->sc_baseaddr = addr; 767 1.2.2.2 pgoyette sc->sc_bst = faa->faa_bst; 768 1.2.2.2 pgoyette if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 769 1.2.2.2 pgoyette aprint_error(": couldn't map registers\n"); 770 1.2.2.2 pgoyette return; 771 1.2.2.2 pgoyette } 772 1.2.2.2 pgoyette sc->sc_dmat = faa->faa_dmat; 773 1.2.2.2 pgoyette LIST_INIT(&sc->sc_dmalist); 774 1.2.2.2 pgoyette sc->sc_cfg = (void *)of_search_compatible(phandle, compat_data)->data; 775 1.2.2.2 pgoyette mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 776 1.2.2.2 pgoyette mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED); 777 1.2.2.2 pgoyette 778 1.2.2.2 pgoyette if (sunxi_i2s_chan_init(sc, &sc->sc_pchan, AUMODE_PLAY, "tx") != 0 || 779 1.2.2.2 pgoyette sunxi_i2s_chan_init(sc, &sc->sc_rchan, AUMODE_RECORD, "rx") != 0) { 780 1.2.2.2 pgoyette aprint_error(": couldn't setup channels\n"); 781 1.2.2.2 pgoyette return; 782 1.2.2.2 pgoyette } 783 1.2.2.2 pgoyette 784 1.2.2.2 pgoyette aprint_naive("\n"); 785 1.2.2.2 pgoyette aprint_normal(": %s\n", sc->sc_cfg->name); 786 1.2.2.2 pgoyette 787 1.2.2.2 pgoyette /* Reset */ 788 1.2.2.2 pgoyette val = I2S_READ(sc, DA_CTL); 789 1.2.2.2 pgoyette val &= ~(DA_CTL_TXEN|DA_CTL_RXEN|DA_CTL_GEN); 790 1.2.2.2 pgoyette I2S_WRITE(sc, DA_CTL, val); 791 1.2.2.2 pgoyette 792 1.2.2.2 pgoyette val = I2S_READ(sc, DA_FCTL); 793 1.2.2.2 pgoyette val &= ~(DA_FCTL_FTX|DA_FCTL_FRX); 794 1.2.2.2 pgoyette I2S_WRITE(sc, DA_FCTL, val); 795 1.2.2.2 pgoyette 796 1.2.2.2 pgoyette I2S_WRITE(sc, DA_TXCNT, 0); 797 1.2.2.2 pgoyette I2S_WRITE(sc, DA_RXCNT, 0); 798 1.2.2.2 pgoyette 799 1.2.2.2 pgoyette /* Enable */ 800 1.2.2.2 pgoyette I2S_WRITE(sc, DA_CTL, DA_CTL_GEN | DA_CTL_SDO_EN); 801 1.2.2.2 pgoyette 802 1.2.2.2 pgoyette /* Setup channels */ 803 1.2.2.2 pgoyette I2S_WRITE(sc, sc->sc_cfg->txchmap, 0x76543210); 804 1.2.2.2 pgoyette I2S_WRITE(sc, sc->sc_cfg->txchsel, __SHIFTIN(1, DA_CHSEL_SEL) | 805 1.2.2.2 pgoyette __SHIFTIN(3, DA_CHSEL_EN)); 806 1.2.2.2 pgoyette I2S_WRITE(sc, sc->sc_cfg->rxchmap, 0x76543210); 807 1.2.2.2 pgoyette I2S_WRITE(sc, sc->sc_cfg->rxchsel, __SHIFTIN(1, DA_CHSEL_SEL) | 808 1.2.2.2 pgoyette __SHIFTIN(3, DA_CHSEL_EN)); 809 1.2.2.2 pgoyette 810 1.2.2.2 pgoyette sc->sc_format.mode = AUMODE_PLAY|AUMODE_RECORD; 811 1.2.2.2 pgoyette sc->sc_format.encoding = AUDIO_ENCODING_SLINEAR_LE; 812 1.2.2.2 pgoyette sc->sc_format.validbits = 16; 813 1.2.2.2 pgoyette sc->sc_format.precision = 16; 814 1.2.2.2 pgoyette sc->sc_format.channels = 2; 815 1.2.2.2 pgoyette sc->sc_format.channel_mask = AUFMT_STEREO; 816 1.2.2.2 pgoyette sc->sc_format.frequency_type = 0; 817 1.2.2.2 pgoyette sc->sc_format.frequency[0] = sc->sc_format.frequency[1] = 48000; 818 1.2.2.2 pgoyette 819 1.2.2.2 pgoyette error = auconv_create_encodings(&sc->sc_format, 1, &sc->sc_encodings); 820 1.2.2.2 pgoyette if (error) { 821 1.2.2.2 pgoyette aprint_error_dev(self, "couldn't create encodings\n"); 822 1.2.2.2 pgoyette return; 823 1.2.2.2 pgoyette } 824 1.2.2.2 pgoyette 825 1.2.2.2 pgoyette sc->sc_dai.dai_set_sysclk = sunxi_i2s_dai_set_sysclk; 826 1.2.2.2 pgoyette sc->sc_dai.dai_set_format = sunxi_i2s_dai_set_format; 827 1.2.2.2 pgoyette sc->sc_dai.dai_hw_if = &sunxi_i2s_hw_if; 828 1.2.2.2 pgoyette sc->sc_dai.dai_dev = self; 829 1.2.2.2 pgoyette sc->sc_dai.dai_priv = sc; 830 1.2.2.2 pgoyette fdtbus_register_dai_controller(self, phandle, &sunxi_i2s_dai_funcs); 831 1.2.2.2 pgoyette } 832 1.2.2.2 pgoyette 833 1.2.2.2 pgoyette CFATTACH_DECL_NEW(sunxi_i2s, sizeof(struct sunxi_i2s_softc), 834 1.2.2.2 pgoyette sunxi_i2s_match, sunxi_i2s_attach, NULL, NULL); 835
Indexes created Sun Oct 12 20:09:57 GMT 2025