1 1.6 thorpej /* $NetBSD: sunxi_lradc.c,v 1.6 2021/01/27 03:10:20 thorpej Exp $ */ 2 1.1 bouyer 3 1.1 bouyer /*- 4 1.1 bouyer * Copyright (c) 2016, 2018 Manuel Bouyer 5 1.1 bouyer * All rights reserved. 6 1.1 bouyer * 7 1.1 bouyer * Redistribution and use in source and binary forms, with or without 8 1.1 bouyer * modification, are permitted provided that the following conditions 9 1.1 bouyer * are met: 10 1.1 bouyer * 1. Redistributions of source code must retain the above copyright 11 1.1 bouyer * notice, this list of conditions and the following disclaimer. 12 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 bouyer * notice, this list of conditions and the following disclaimer in the 14 1.1 bouyer * documentation and/or other materials provided with the distribution. 15 1.1 bouyer * 16 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 bouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 bouyer * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 bouyer * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 bouyer * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 bouyer * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 bouyer * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 bouyer * SUCH DAMAGE. 27 1.1 bouyer */ 28 1.1 bouyer 29 1.1 bouyer #include <sys/cdefs.h> 30 1.6 thorpej __KERNEL_RCSID(0, "$NetBSD: sunxi_lradc.c,v 1.6 2021/01/27 03:10:20 thorpej Exp $"); 31 1.1 bouyer 32 1.1 bouyer #include <sys/param.h> 33 1.1 bouyer #include <sys/bus.h> 34 1.1 bouyer #include <sys/device.h> 35 1.1 bouyer #include <sys/intr.h> 36 1.1 bouyer #include <sys/systm.h> 37 1.1 bouyer #include <sys/kernel.h> 38 1.1 bouyer #include <sys/select.h> 39 1.1 bouyer #include <sys/mutex.h> 40 1.1 bouyer #include <sys/kmem.h> 41 1.1 bouyer 42 1.1 bouyer #include <dev/sysmon/sysmonvar.h> 43 1.1 bouyer #include <dev/sysmon/sysmon_taskq.h> 44 1.1 bouyer 45 1.1 bouyer #include <dev/fdt/fdtvar.h> 46 1.1 bouyer 47 1.1 bouyer #include <arm/sunxi/sunxi_lradc.h> 48 1.1 bouyer 49 1.1 bouyer struct sunxi_lradc_softc { 50 1.1 bouyer device_t sc_dev; 51 1.1 bouyer bus_space_tag_t sc_bst; 52 1.1 bouyer bus_space_handle_t sc_bsh; 53 1.1 bouyer kmutex_t sc_lock; 54 1.1 bouyer void *sc_ih; 55 1.1 bouyer struct fdtbus_regulator *sc_supply; 56 1.1 bouyer int sc_vref; 57 1.1 bouyer uint8_t sc_chans; 58 1.1 bouyer uint8_t sc_level[2][32]; 59 1.1 bouyer const char *sc_name[2][32]; 60 1.1 bouyer int sc_nlevels[2]; 61 1.1 bouyer int sc_lastlevel[2]; 62 1.1 bouyer struct sysmon_pswitch *sc_switches[2]; 63 1.1 bouyer uint32_t sc_ints; /* pending interrupts */ 64 1.1 bouyer }; 65 1.1 bouyer 66 1.1 bouyer #define ADC_READ(sc, reg) \ 67 1.1 bouyer bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 68 1.1 bouyer #define ADC_WRITE(sc, reg, val) \ 69 1.1 bouyer bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 70 1.1 bouyer 71 1.1 bouyer static int sunxi_lradc_match(device_t, cfdata_t, void *); 72 1.1 bouyer static void sunxi_lradc_attach(device_t, device_t, void *); 73 1.1 bouyer static int sunxi_lradc_intr(void *); 74 1.1 bouyer static void sunxi_lradc_get_levels(struct sunxi_lradc_softc *, int, int); 75 1.1 bouyer static void sunxi_lradc_print_levels(struct sunxi_lradc_softc *, int); 76 1.1 bouyer static bool sunxi_lradc_register_switches(struct sunxi_lradc_softc *, int); 77 1.1 bouyer 78 1.3 thorpej static const struct device_compatible_entry compat_data[] = { 79 1.3 thorpej { .compat = "allwinner,sun4i-a10-lradc-keys" }, 80 1.5 thorpej DEVICE_COMPAT_EOL 81 1.1 bouyer }; 82 1.1 bouyer 83 1.1 bouyer 84 1.1 bouyer CFATTACH_DECL_NEW(sunxi_lradc, sizeof(struct sunxi_lradc_softc), 85 1.1 bouyer sunxi_lradc_match, sunxi_lradc_attach, NULL, NULL); 86 1.1 bouyer 87 1.1 bouyer static int 88 1.1 bouyer sunxi_lradc_match(device_t parent, cfdata_t cf, void *aux) 89 1.1 bouyer { 90 1.1 bouyer struct fdt_attach_args * const faa = aux; 91 1.1 bouyer 92 1.6 thorpej return of_compatible_match(faa->faa_phandle, compat_data); 93 1.1 bouyer } 94 1.1 bouyer 95 1.1 bouyer static void 96 1.1 bouyer sunxi_lradc_attach(device_t parent, device_t self, void *aux) 97 1.1 bouyer { 98 1.1 bouyer struct sunxi_lradc_softc *sc = device_private(self); 99 1.1 bouyer struct fdt_attach_args * const faa = aux; 100 1.1 bouyer const int phandle = faa->faa_phandle; 101 1.1 bouyer int i, error; 102 1.1 bouyer uint32_t intc = 0; 103 1.1 bouyer bus_addr_t addr; 104 1.1 bouyer bus_size_t size; 105 1.1 bouyer char intrstr[128]; 106 1.1 bouyer struct clk *clk; 107 1.1 bouyer struct fdtbus_reset *rst; 108 1.1 bouyer 109 1.1 bouyer sc->sc_dev = self; 110 1.1 bouyer mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM); 111 1.1 bouyer 112 1.1 bouyer sc->sc_bst = faa->faa_bst; 113 1.1 bouyer if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 114 1.1 bouyer aprint_error(": couldn't get registers\n"); 115 1.1 bouyer return; 116 1.1 bouyer } 117 1.1 bouyer 118 1.1 bouyer if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 119 1.1 bouyer aprint_error(": couldn't map registers\n"); 120 1.1 bouyer return; 121 1.1 bouyer } 122 1.1 bouyer 123 1.1 bouyer if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 124 1.1 bouyer aprint_error(": failed to decode interrupt\n"); 125 1.1 bouyer return; 126 1.1 bouyer } 127 1.1 bouyer 128 1.1 bouyer if ((clk = fdtbus_clock_get_index(phandle, 0)) != NULL) { 129 1.1 bouyer if (clk_enable(clk) != 0) { 130 1.1 bouyer aprint_error(": couldn't enable clock\n"); 131 1.1 bouyer return; 132 1.1 bouyer } 133 1.1 bouyer } 134 1.1 bouyer 135 1.1 bouyer if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL) { 136 1.1 bouyer if (fdtbus_reset_deassert(rst) != 0) { 137 1.1 bouyer aprint_error(": couldn't de-assert reset\n"); 138 1.1 bouyer return; 139 1.1 bouyer } 140 1.1 bouyer } 141 1.1 bouyer 142 1.1 bouyer sc->sc_chans = -1; 143 1.1 bouyer aprint_naive("\n"); 144 1.1 bouyer aprint_normal(": LRADC, "); 145 1.1 bouyer if (of_hasprop(phandle, "vref-supply")) { 146 1.1 bouyer sc->sc_supply = 147 1.1 bouyer fdtbus_regulator_acquire(phandle, "vref-supply"); 148 1.1 bouyer if (sc->sc_supply == NULL) { 149 1.1 bouyer aprint_error(": couldn't acquire vref-supply\n"); 150 1.1 bouyer return; 151 1.1 bouyer } 152 1.1 bouyer } else { 153 1.1 bouyer aprint_normal("disabled (no vref-supply)\n"); 154 1.1 bouyer return; 155 1.1 bouyer } 156 1.1 bouyer error = fdtbus_regulator_get_voltage(sc->sc_supply, &sc->sc_vref); 157 1.1 bouyer if (error) { 158 1.1 bouyer aprint_error(": couldn't get vref (%d)\n", error); 159 1.1 bouyer return; 160 1.1 bouyer } 161 1.1 bouyer 162 1.1 bouyer for (i = 0; i < 2; i++) 163 1.1 bouyer sunxi_lradc_get_levels(sc, phandle, i); 164 1.1 bouyer 165 1.1 bouyer switch (sc->sc_chans) { 166 1.1 bouyer case 0: 167 1.1 bouyer aprint_normal("channel 0 enabled\n"); 168 1.1 bouyer break; 169 1.1 bouyer case 1: 170 1.1 bouyer aprint_normal("channel 1 enabled\n"); 171 1.1 bouyer break; 172 1.1 bouyer case 2: 173 1.1 bouyer aprint_normal("channel 0 & 1 enabled\n"); 174 1.1 bouyer break; 175 1.1 bouyer default: 176 1.1 bouyer aprint_normal("no channel enabled\n"); 177 1.1 bouyer break; 178 1.1 bouyer } 179 1.1 bouyer 180 1.1 bouyer if (sc->sc_chans == 0 || sc->sc_chans == 2) { 181 1.1 bouyer sunxi_lradc_print_levels(sc, 0); 182 1.1 bouyer } 183 1.1 bouyer if (sc->sc_chans == 1 || sc->sc_chans == 2) { 184 1.1 bouyer sunxi_lradc_print_levels(sc, 1); 185 1.1 bouyer } 186 1.2 jmcneill 187 1.2 jmcneill sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 188 1.2 jmcneill FDT_INTR_MPSAFE, sunxi_lradc_intr, sc, device_xname(self)); 189 1.1 bouyer if (sc->sc_ih == NULL) { 190 1.1 bouyer aprint_error_dev(self, "couldn't establish interrupt on %s\n", 191 1.1 bouyer intrstr); 192 1.1 bouyer return; 193 1.1 bouyer } 194 1.2 jmcneill aprint_normal_dev(self, "interrupting on %s\n", intrstr); 195 1.1 bouyer if (sc->sc_chans == 0 || sc->sc_chans == 2) { 196 1.1 bouyer if (!sunxi_lradc_register_switches(sc, 0)) { 197 1.2 jmcneill aprint_error_dev(self, "can't register switches\n"); 198 1.1 bouyer return; 199 1.1 bouyer } 200 1.1 bouyer } 201 1.1 bouyer if (sc->sc_chans == 1 || sc->sc_chans == 2) { 202 1.1 bouyer if (!sunxi_lradc_register_switches(sc, 1)) { 203 1.2 jmcneill aprint_error_dev(self, "can't register switches\n"); 204 1.1 bouyer return; 205 1.1 bouyer } 206 1.1 bouyer } 207 1.1 bouyer 208 1.1 bouyer /* 209 1.1 bouyer * init and enable LRADC 210 1.1 bouyer * 250Hz, wait 2 cycles (8ms) on key press and release 211 1.1 bouyer */ 212 1.1 bouyer bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_LRADC_CTRL_REG, 213 1.1 bouyer (2 << AWIN_LRADC_CTRL_FIRSTCONV_SHIFT) | 214 1.2 jmcneill (1 << AWIN_LRADC_CTRL_LV_A_B_CNT_SHIFT) | 215 1.1 bouyer AWIN_LRADC_CTRL_HOLD_EN | 216 1.1 bouyer AWIN_LRADC_CTRL_RATE_250 | 217 1.1 bouyer (sc->sc_chans << AWIN_LRADC_CTRL_CHAN_SHIFT) | 218 1.1 bouyer AWIN_LRADC_CTRL_EN); 219 1.1 bouyer switch(sc->sc_chans) { 220 1.1 bouyer case 0: 221 1.1 bouyer intc = AWIN_LRADC_INT_KEY0 | AWIN_LRADC_INT_KEYUP0; 222 1.1 bouyer break; 223 1.1 bouyer case 1: 224 1.1 bouyer intc = AWIN_LRADC_INT_KEY1 | AWIN_LRADC_INT_KEYUP1; 225 1.1 bouyer break; 226 1.1 bouyer case 2: 227 1.1 bouyer intc = AWIN_LRADC_INT_KEY0 | AWIN_LRADC_INT_KEYUP0 | 228 1.1 bouyer AWIN_LRADC_INT_KEY1 | AWIN_LRADC_INT_KEYUP1; 229 1.1 bouyer break; 230 1.1 bouyer } 231 1.1 bouyer bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_LRADC_INTC_REG, intc); 232 1.1 bouyer } 233 1.1 bouyer 234 1.1 bouyer static void 235 1.1 bouyer sunxi_lradc_get_levels(struct sunxi_lradc_softc *sc, int phandle, int chan) 236 1.1 bouyer { 237 1.1 bouyer int i; 238 1.1 bouyer int this_chan; 239 1.1 bouyer int child; 240 1.1 bouyer int32_t level; 241 1.1 bouyer const char *name; 242 1.1 bouyer const int vref = sc->sc_vref * 2 / 3; 243 1.1 bouyer 244 1.1 bouyer for (child = OF_child(phandle), i = 0; child; child = OF_peer(child)) { 245 1.1 bouyer if (of_getprop_uint32(child, "channel", &this_chan) != 0) 246 1.1 bouyer continue; 247 1.1 bouyer if (this_chan != chan) 248 1.1 bouyer continue; 249 1.1 bouyer if (of_getprop_uint32(child, "voltage", &level) != 0) 250 1.1 bouyer continue; 251 1.1 bouyer name = fdtbus_get_string(child, "label"); 252 1.1 bouyer if (name == NULL) 253 1.1 bouyer continue; 254 1.1 bouyer sc->sc_level[chan][i] = level * 63 / vref; 255 1.1 bouyer sc->sc_name[chan][i] = name; 256 1.1 bouyer i++; 257 1.1 bouyer } 258 1.1 bouyer if (i > 0) { 259 1.1 bouyer switch(chan) { 260 1.1 bouyer case 0: 261 1.1 bouyer if (sc->sc_chans == 1) 262 1.1 bouyer sc->sc_chans = 2; 263 1.1 bouyer else 264 1.1 bouyer sc->sc_chans = 0; 265 1.1 bouyer break; 266 1.1 bouyer case 1: 267 1.1 bouyer if (sc->sc_chans == 0) 268 1.1 bouyer sc->sc_chans = 2; 269 1.1 bouyer else 270 1.1 bouyer sc->sc_chans = 1; 271 1.1 bouyer break; 272 1.1 bouyer default: 273 1.1 bouyer panic("lradc: chan %d", chan); 274 1.1 bouyer } 275 1.1 bouyer sc->sc_nlevels[chan] = i; 276 1.1 bouyer } 277 1.1 bouyer } 278 1.1 bouyer 279 1.1 bouyer static void 280 1.1 bouyer sunxi_lradc_print_levels(struct sunxi_lradc_softc *sc, int chan) 281 1.1 bouyer { 282 1.1 bouyer int i; 283 1.1 bouyer 284 1.1 bouyer aprint_verbose_dev(sc->sc_dev, ": channel %d levels", chan); 285 1.1 bouyer for (i = 0; i < 32; i++) { 286 1.1 bouyer if (sc->sc_name[chan][i] == NULL) 287 1.1 bouyer break; 288 1.1 bouyer aprint_verbose(" %d(%s)", 289 1.1 bouyer sc->sc_level[chan][i], sc->sc_name[chan][i]); 290 1.1 bouyer } 291 1.1 bouyer aprint_verbose("\n"); 292 1.1 bouyer } 293 1.1 bouyer 294 1.1 bouyer static bool 295 1.1 bouyer sunxi_lradc_register_switches(struct sunxi_lradc_softc *sc, int chan) 296 1.1 bouyer { 297 1.1 bouyer 298 1.1 bouyer KASSERT(sc->sc_nlevels[chan] > 0); 299 1.1 bouyer sc->sc_switches[chan] = kmem_zalloc( 300 1.1 bouyer sizeof(struct sysmon_pswitch) * sc->sc_nlevels[chan] , KM_SLEEP); 301 1.1 bouyer 302 1.1 bouyer if (sc->sc_switches[chan] == NULL) 303 1.1 bouyer return false; 304 1.1 bouyer 305 1.1 bouyer for (int i = 0; i < sc->sc_nlevels[chan]; i++) { 306 1.1 bouyer struct sysmon_pswitch *sw = &sc->sc_switches[chan][i]; 307 1.1 bouyer sw->smpsw_name = sc->sc_name[chan][i]; 308 1.1 bouyer sw->smpsw_type = PSWITCH_TYPE_HOTKEY; 309 1.1 bouyer sysmon_pswitch_register(sw); 310 1.1 bouyer } 311 1.1 bouyer return true; 312 1.1 bouyer } 313 1.1 bouyer 314 1.1 bouyer static void 315 1.1 bouyer sunxi_lradc_intr_ev(struct sunxi_lradc_softc *sc, int chan, int event) 316 1.1 bouyer { 317 1.1 bouyer int32_t val; 318 1.1 bouyer int diff = 64; 319 1.1 bouyer 320 1.1 bouyer 321 1.1 bouyer if (event == PSWITCH_EVENT_RELEASED) { 322 1.1 bouyer sysmon_pswitch_event( 323 1.1 bouyer &sc->sc_switches[chan][sc->sc_lastlevel[chan]], event); 324 1.1 bouyer return; 325 1.1 bouyer } 326 1.1 bouyer 327 1.1 bouyer val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 328 1.1 bouyer chan == 0 ? AWIN_LRADC_DATA0_REG : AWIN_LRADC_DATA1_REG); 329 1.1 bouyer 330 1.1 bouyer KASSERT(sc->sc_nlevels[chan] > 0); 331 1.1 bouyer for (int i = 0; i < sc->sc_nlevels[chan]; i++) { 332 1.1 bouyer int curdiff; 333 1.1 bouyer curdiff = val - sc->sc_level[chan][i]; 334 1.1 bouyer if (curdiff < 0) 335 1.1 bouyer curdiff = -curdiff; 336 1.1 bouyer if (diff > curdiff) { 337 1.1 bouyer diff = curdiff; 338 1.1 bouyer sc->sc_lastlevel[chan] = i; 339 1.1 bouyer } 340 1.1 bouyer } 341 1.1 bouyer sysmon_pswitch_event( 342 1.1 bouyer &sc->sc_switches[chan][sc->sc_lastlevel[chan]], event); 343 1.1 bouyer } 344 1.1 bouyer 345 1.1 bouyer static void 346 1.1 bouyer sunxi_lradc_intr_task(void *arg) 347 1.1 bouyer { 348 1.1 bouyer struct sunxi_lradc_softc *sc = arg; 349 1.1 bouyer mutex_enter(&sc->sc_lock); 350 1.1 bouyer if (sc->sc_chans == 0 || sc->sc_chans == 2) { 351 1.1 bouyer if (sc->sc_ints & AWIN_LRADC_INT_KEY0) { 352 1.1 bouyer sunxi_lradc_intr_ev(sc, 0, PSWITCH_EVENT_PRESSED); 353 1.1 bouyer } 354 1.1 bouyer if (sc->sc_ints & AWIN_LRADC_INT_KEYUP0) { 355 1.1 bouyer sunxi_lradc_intr_ev(sc, 0, PSWITCH_EVENT_RELEASED); 356 1.1 bouyer } 357 1.1 bouyer } 358 1.1 bouyer if (sc->sc_chans == 1 || sc->sc_chans == 2) { 359 1.1 bouyer if (sc->sc_ints & AWIN_LRADC_INT_KEY1) { 360 1.1 bouyer sunxi_lradc_intr_ev(sc, 1, PSWITCH_EVENT_PRESSED); 361 1.1 bouyer } 362 1.1 bouyer if (sc->sc_ints & AWIN_LRADC_INT_KEYUP1) { 363 1.1 bouyer sunxi_lradc_intr_ev(sc, 1, PSWITCH_EVENT_RELEASED); 364 1.1 bouyer } 365 1.1 bouyer } 366 1.1 bouyer sc->sc_ints = 0; 367 1.1 bouyer mutex_exit(&sc->sc_lock); 368 1.1 bouyer } 369 1.1 bouyer 370 1.1 bouyer static int 371 1.1 bouyer sunxi_lradc_intr(void *arg) 372 1.1 bouyer { 373 1.1 bouyer struct sunxi_lradc_softc *sc = arg; 374 1.1 bouyer int error; 375 1.1 bouyer 376 1.1 bouyer mutex_enter(&sc->sc_lock); 377 1.1 bouyer sc->sc_ints = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 378 1.1 bouyer AWIN_LRADC_INTS_REG); 379 1.1 bouyer bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_LRADC_INTS_REG, 380 1.1 bouyer sc->sc_ints); 381 1.1 bouyer mutex_exit(&sc->sc_lock); 382 1.1 bouyer error = sysmon_task_queue_sched(0, sunxi_lradc_intr_task, sc); 383 1.1 bouyer if (error != 0) { 384 1.1 bouyer printf("%s: sysmon_task_queue_sched failed (%d)\n", 385 1.1 bouyer device_xname(sc->sc_dev), error); 386 1.1 bouyer } 387 1.1 bouyer return 1; 388 1.1 bouyer } 389