sunxi_lradc.c revision 1.3
1 /* $NetBSD: sunxi_lradc.c,v 1.3 2021/01/18 02:35:49 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2016, 2018 Manuel Bouyer 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: sunxi_lradc.c,v 1.3 2021/01/18 02:35:49 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/select.h> 39 #include <sys/mutex.h> 40 #include <sys/kmem.h> 41 42 #include <dev/sysmon/sysmonvar.h> 43 #include <dev/sysmon/sysmon_taskq.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #include <arm/sunxi/sunxi_lradc.h> 48 49 struct sunxi_lradc_softc { 50 device_t sc_dev; 51 bus_space_tag_t sc_bst; 52 bus_space_handle_t sc_bsh; 53 kmutex_t sc_lock; 54 void *sc_ih; 55 struct fdtbus_regulator *sc_supply; 56 int sc_vref; 57 uint8_t sc_chans; 58 uint8_t sc_level[2][32]; 59 const char *sc_name[2][32]; 60 int sc_nlevels[2]; 61 int sc_lastlevel[2]; 62 struct sysmon_pswitch *sc_switches[2]; 63 uint32_t sc_ints; /* pending interrupts */ 64 }; 65 66 #define ADC_READ(sc, reg) \ 67 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 68 #define ADC_WRITE(sc, reg, val) \ 69 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 70 71 static int sunxi_lradc_match(device_t, cfdata_t, void *); 72 static void sunxi_lradc_attach(device_t, device_t, void *); 73 static int sunxi_lradc_intr(void *); 74 static void sunxi_lradc_get_levels(struct sunxi_lradc_softc *, int, int); 75 static void sunxi_lradc_print_levels(struct sunxi_lradc_softc *, int); 76 static bool sunxi_lradc_register_switches(struct sunxi_lradc_softc *, int); 77 78 static const struct device_compatible_entry compat_data[] = { 79 { .compat = "allwinner,sun4i-a10-lradc-keys" }, 80 81 { 0 } 82 }; 83 84 85 CFATTACH_DECL_NEW(sunxi_lradc, sizeof(struct sunxi_lradc_softc), 86 sunxi_lradc_match, sunxi_lradc_attach, NULL, NULL); 87 88 static int 89 sunxi_lradc_match(device_t parent, cfdata_t cf, void *aux) 90 { 91 struct fdt_attach_args * const faa = aux; 92 93 return of_match_compat_data(faa->faa_phandle, compat_data); 94 } 95 96 static void 97 sunxi_lradc_attach(device_t parent, device_t self, void *aux) 98 { 99 struct sunxi_lradc_softc *sc = device_private(self); 100 struct fdt_attach_args * const faa = aux; 101 const int phandle = faa->faa_phandle; 102 int i, error; 103 uint32_t intc = 0; 104 bus_addr_t addr; 105 bus_size_t size; 106 char intrstr[128]; 107 struct clk *clk; 108 struct fdtbus_reset *rst; 109 110 sc->sc_dev = self; 111 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM); 112 113 sc->sc_bst = faa->faa_bst; 114 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 115 aprint_error(": couldn't get registers\n"); 116 return; 117 } 118 119 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 120 aprint_error(": couldn't map registers\n"); 121 return; 122 } 123 124 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 125 aprint_error(": failed to decode interrupt\n"); 126 return; 127 } 128 129 if ((clk = fdtbus_clock_get_index(phandle, 0)) != NULL) { 130 if (clk_enable(clk) != 0) { 131 aprint_error(": couldn't enable clock\n"); 132 return; 133 } 134 } 135 136 if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL) { 137 if (fdtbus_reset_deassert(rst) != 0) { 138 aprint_error(": couldn't de-assert reset\n"); 139 return; 140 } 141 } 142 143 sc->sc_chans = -1; 144 aprint_naive("\n"); 145 aprint_normal(": LRADC, "); 146 if (of_hasprop(phandle, "vref-supply")) { 147 sc->sc_supply = 148 fdtbus_regulator_acquire(phandle, "vref-supply"); 149 if (sc->sc_supply == NULL) { 150 aprint_error(": couldn't acquire vref-supply\n"); 151 return; 152 } 153 } else { 154 aprint_normal("disabled (no vref-supply)\n"); 155 return; 156 } 157 error = fdtbus_regulator_get_voltage(sc->sc_supply, &sc->sc_vref); 158 if (error) { 159 aprint_error(": couldn't get vref (%d)\n", error); 160 return; 161 } 162 163 for (i = 0; i < 2; i++) 164 sunxi_lradc_get_levels(sc, phandle, i); 165 166 switch (sc->sc_chans) { 167 case 0: 168 aprint_normal("channel 0 enabled\n"); 169 break; 170 case 1: 171 aprint_normal("channel 1 enabled\n"); 172 break; 173 case 2: 174 aprint_normal("channel 0 & 1 enabled\n"); 175 break; 176 default: 177 aprint_normal("no channel enabled\n"); 178 break; 179 } 180 181 if (sc->sc_chans == 0 || sc->sc_chans == 2) { 182 sunxi_lradc_print_levels(sc, 0); 183 } 184 if (sc->sc_chans == 1 || sc->sc_chans == 2) { 185 sunxi_lradc_print_levels(sc, 1); 186 } 187 188 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 189 FDT_INTR_MPSAFE, sunxi_lradc_intr, sc, device_xname(self)); 190 if (sc->sc_ih == NULL) { 191 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 192 intrstr); 193 return; 194 } 195 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 196 if (sc->sc_chans == 0 || sc->sc_chans == 2) { 197 if (!sunxi_lradc_register_switches(sc, 0)) { 198 aprint_error_dev(self, "can't register switches\n"); 199 return; 200 } 201 } 202 if (sc->sc_chans == 1 || sc->sc_chans == 2) { 203 if (!sunxi_lradc_register_switches(sc, 1)) { 204 aprint_error_dev(self, "can't register switches\n"); 205 return; 206 } 207 } 208 209 /* 210 * init and enable LRADC 211 * 250Hz, wait 2 cycles (8ms) on key press and release 212 */ 213 bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_LRADC_CTRL_REG, 214 (2 << AWIN_LRADC_CTRL_FIRSTCONV_SHIFT) | 215 (1 << AWIN_LRADC_CTRL_LV_A_B_CNT_SHIFT) | 216 AWIN_LRADC_CTRL_HOLD_EN | 217 AWIN_LRADC_CTRL_RATE_250 | 218 (sc->sc_chans << AWIN_LRADC_CTRL_CHAN_SHIFT) | 219 AWIN_LRADC_CTRL_EN); 220 switch(sc->sc_chans) { 221 case 0: 222 intc = AWIN_LRADC_INT_KEY0 | AWIN_LRADC_INT_KEYUP0; 223 break; 224 case 1: 225 intc = AWIN_LRADC_INT_KEY1 | AWIN_LRADC_INT_KEYUP1; 226 break; 227 case 2: 228 intc = AWIN_LRADC_INT_KEY0 | AWIN_LRADC_INT_KEYUP0 | 229 AWIN_LRADC_INT_KEY1 | AWIN_LRADC_INT_KEYUP1; 230 break; 231 } 232 bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_LRADC_INTC_REG, intc); 233 } 234 235 static void 236 sunxi_lradc_get_levels(struct sunxi_lradc_softc *sc, int phandle, int chan) 237 { 238 int i; 239 int this_chan; 240 int child; 241 int32_t level; 242 const char *name; 243 const int vref = sc->sc_vref * 2 / 3; 244 245 for (child = OF_child(phandle), i = 0; child; child = OF_peer(child)) { 246 if (of_getprop_uint32(child, "channel", &this_chan) != 0) 247 continue; 248 if (this_chan != chan) 249 continue; 250 if (of_getprop_uint32(child, "voltage", &level) != 0) 251 continue; 252 name = fdtbus_get_string(child, "label"); 253 if (name == NULL) 254 continue; 255 sc->sc_level[chan][i] = level * 63 / vref; 256 sc->sc_name[chan][i] = name; 257 i++; 258 } 259 if (i > 0) { 260 switch(chan) { 261 case 0: 262 if (sc->sc_chans == 1) 263 sc->sc_chans = 2; 264 else 265 sc->sc_chans = 0; 266 break; 267 case 1: 268 if (sc->sc_chans == 0) 269 sc->sc_chans = 2; 270 else 271 sc->sc_chans = 1; 272 break; 273 default: 274 panic("lradc: chan %d", chan); 275 } 276 sc->sc_nlevels[chan] = i; 277 } 278 } 279 280 static void 281 sunxi_lradc_print_levels(struct sunxi_lradc_softc *sc, int chan) 282 { 283 int i; 284 285 aprint_verbose_dev(sc->sc_dev, ": channel %d levels", chan); 286 for (i = 0; i < 32; i++) { 287 if (sc->sc_name[chan][i] == NULL) 288 break; 289 aprint_verbose(" %d(%s)", 290 sc->sc_level[chan][i], sc->sc_name[chan][i]); 291 } 292 aprint_verbose("\n"); 293 } 294 295 static bool 296 sunxi_lradc_register_switches(struct sunxi_lradc_softc *sc, int chan) 297 { 298 299 KASSERT(sc->sc_nlevels[chan] > 0); 300 sc->sc_switches[chan] = kmem_zalloc( 301 sizeof(struct sysmon_pswitch) * sc->sc_nlevels[chan] , KM_SLEEP); 302 303 if (sc->sc_switches[chan] == NULL) 304 return false; 305 306 for (int i = 0; i < sc->sc_nlevels[chan]; i++) { 307 struct sysmon_pswitch *sw = &sc->sc_switches[chan][i]; 308 sw->smpsw_name = sc->sc_name[chan][i]; 309 sw->smpsw_type = PSWITCH_TYPE_HOTKEY; 310 sysmon_pswitch_register(sw); 311 } 312 return true; 313 } 314 315 static void 316 sunxi_lradc_intr_ev(struct sunxi_lradc_softc *sc, int chan, int event) 317 { 318 int32_t val; 319 int diff = 64; 320 321 322 if (event == PSWITCH_EVENT_RELEASED) { 323 sysmon_pswitch_event( 324 &sc->sc_switches[chan][sc->sc_lastlevel[chan]], event); 325 return; 326 } 327 328 val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 329 chan == 0 ? AWIN_LRADC_DATA0_REG : AWIN_LRADC_DATA1_REG); 330 331 KASSERT(sc->sc_nlevels[chan] > 0); 332 for (int i = 0; i < sc->sc_nlevels[chan]; i++) { 333 int curdiff; 334 curdiff = val - sc->sc_level[chan][i]; 335 if (curdiff < 0) 336 curdiff = -curdiff; 337 if (diff > curdiff) { 338 diff = curdiff; 339 sc->sc_lastlevel[chan] = i; 340 } 341 } 342 sysmon_pswitch_event( 343 &sc->sc_switches[chan][sc->sc_lastlevel[chan]], event); 344 } 345 346 static void 347 sunxi_lradc_intr_task(void *arg) 348 { 349 struct sunxi_lradc_softc *sc = arg; 350 mutex_enter(&sc->sc_lock); 351 if (sc->sc_chans == 0 || sc->sc_chans == 2) { 352 if (sc->sc_ints & AWIN_LRADC_INT_KEY0) { 353 sunxi_lradc_intr_ev(sc, 0, PSWITCH_EVENT_PRESSED); 354 } 355 if (sc->sc_ints & AWIN_LRADC_INT_KEYUP0) { 356 sunxi_lradc_intr_ev(sc, 0, PSWITCH_EVENT_RELEASED); 357 } 358 } 359 if (sc->sc_chans == 1 || sc->sc_chans == 2) { 360 if (sc->sc_ints & AWIN_LRADC_INT_KEY1) { 361 sunxi_lradc_intr_ev(sc, 1, PSWITCH_EVENT_PRESSED); 362 } 363 if (sc->sc_ints & AWIN_LRADC_INT_KEYUP1) { 364 sunxi_lradc_intr_ev(sc, 1, PSWITCH_EVENT_RELEASED); 365 } 366 } 367 sc->sc_ints = 0; 368 mutex_exit(&sc->sc_lock); 369 } 370 371 static int 372 sunxi_lradc_intr(void *arg) 373 { 374 struct sunxi_lradc_softc *sc = arg; 375 int error; 376 377 mutex_enter(&sc->sc_lock); 378 sc->sc_ints = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 379 AWIN_LRADC_INTS_REG); 380 bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_LRADC_INTS_REG, 381 sc->sc_ints); 382 mutex_exit(&sc->sc_lock); 383 error = sysmon_task_queue_sched(0, sunxi_lradc_intr_task, sc); 384 if (error != 0) { 385 printf("%s: sysmon_task_queue_sched failed (%d)\n", 386 device_xname(sc->sc_dev), error); 387 } 388 return 1; 389 } 390
Indexes created Thu Sep 25 16:09:42 GMT 2025