sunxi_platform.c revision 1.30 1 1.30 skrll /* $NetBSD: sunxi_platform.c,v 1.30 2018/10/28 13:56:21 skrll Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include "opt_soc.h"
30 1.1 jmcneill #include "opt_multiprocessor.h"
31 1.28 skrll #include "opt_console.h"
32 1.1 jmcneill
33 1.1 jmcneill #include <sys/cdefs.h>
34 1.30 skrll __KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.30 2018/10/28 13:56:21 skrll Exp $");
35 1.1 jmcneill
36 1.1 jmcneill #include <sys/param.h>
37 1.1 jmcneill #include <sys/bus.h>
38 1.1 jmcneill #include <sys/cpu.h>
39 1.1 jmcneill #include <sys/device.h>
40 1.1 jmcneill #include <sys/termios.h>
41 1.1 jmcneill
42 1.1 jmcneill #include <dev/fdt/fdtvar.h>
43 1.1 jmcneill #include <arm/fdt/arm_fdtvar.h>
44 1.1 jmcneill
45 1.1 jmcneill #include <uvm/uvm_extern.h>
46 1.1 jmcneill
47 1.1 jmcneill #include <machine/bootconfig.h>
48 1.1 jmcneill #include <arm/cpufunc.h>
49 1.1 jmcneill
50 1.1 jmcneill #include <arm/cortex/gtmr_var.h>
51 1.1 jmcneill #include <arm/cortex/gic_reg.h>
52 1.1 jmcneill
53 1.1 jmcneill #include <dev/ic/ns16550reg.h>
54 1.1 jmcneill #include <dev/ic/comreg.h>
55 1.1 jmcneill
56 1.1 jmcneill #include <arm/arm/psci.h>
57 1.26 ryo #include <arm/fdt/psci_fdtvar.h>
58 1.1 jmcneill
59 1.1 jmcneill #include <arm/sunxi/sunxi_platform.h>
60 1.1 jmcneill
61 1.8 jmcneill #include <libfdt.h>
62 1.8 jmcneill
63 1.1 jmcneill #define SUNXI_REF_FREQ 24000000
64 1.1 jmcneill
65 1.7 jmcneill #define SUN4I_TIMER_BASE 0x01c20c00
66 1.7 jmcneill #define SUN4I_TIMER_SIZE 0x90
67 1.15 jmcneill #define SUN4I_TIMER_1_CTRL 0x20
68 1.15 jmcneill #define SUN4I_TIMER_1_CTRL_CLK_SRC __BITS(3,2)
69 1.15 jmcneill #define SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M 1
70 1.15 jmcneill #define SUN4I_TIMER_1_CTRL_RELOAD __BIT(1)
71 1.15 jmcneill #define SUN4I_TIMER_1_CTRL_EN __BIT(0)
72 1.15 jmcneill #define SUN4I_TIMER_1_INTV_VALUE 0x24
73 1.15 jmcneill #define SUN4I_TIMER_1_VAL 0x28
74 1.7 jmcneill
75 1.7 jmcneill #define SUN4I_WDT_BASE 0x01c20c90
76 1.7 jmcneill #define SUN4I_WDT_SIZE 0x10
77 1.7 jmcneill #define SUN4I_WDT_CTRL 0x00
78 1.7 jmcneill #define SUN4I_WDT_CTRL_KEY (0x333 << 1)
79 1.7 jmcneill #define SUN4I_WDT_CTRL_RESTART __BIT(0)
80 1.7 jmcneill #define SUN4I_WDT_MODE 0x04
81 1.7 jmcneill #define SUN4I_WDT_MODE_RST_EN __BIT(1)
82 1.7 jmcneill #define SUN4I_WDT_MODE_EN __BIT(0)
83 1.7 jmcneill
84 1.3 jmcneill #define SUN6I_WDT_BASE 0x01c20ca0
85 1.3 jmcneill #define SUN6I_WDT_SIZE 0x20
86 1.3 jmcneill #define SUN6I_WDT_CFG 0x14
87 1.7 jmcneill #define SUN6I_WDT_CFG_SYS __BIT(0)
88 1.3 jmcneill #define SUN6I_WDT_MODE 0x18
89 1.7 jmcneill #define SUN6I_WDT_MODE_EN __BIT(0)
90 1.1 jmcneill
91 1.10 jmcneill #define SUN9I_WDT_BASE 0x06000ca0
92 1.10 jmcneill #define SUN9I_WDT_SIZE 0x20
93 1.10 jmcneill #define SUN9I_WDT_CFG 0x14
94 1.10 jmcneill #define SUN9I_WDT_CFG_SYS __BIT(0)
95 1.10 jmcneill #define SUN9I_WDT_MODE 0x18
96 1.10 jmcneill #define SUN9I_WDT_MODE_EN __BIT(0)
97 1.10 jmcneill
98 1.20 jmcneill #define SUN50I_H6_WDT_BASE 0x01c20ca0
99 1.20 jmcneill #define SUN50I_H6_WDT_SIZE 0x20
100 1.20 jmcneill #define SUN50I_H6_WDT_CFG 0x14
101 1.20 jmcneill #define SUN50I_H6_WDT_CFG_SYS __BIT(0)
102 1.20 jmcneill #define SUN50I_H6_WDT_MODE 0x18
103 1.20 jmcneill #define SUN50I_H6_WDT_MODE_EN __BIT(0)
104 1.20 jmcneill
105 1.21 ryo extern struct arm32_bus_dma_tag arm_generic_dma_tag;
106 1.22 ryo extern struct bus_space arm_generic_bs_tag;
107 1.22 ryo extern struct bus_space arm_generic_a4x_bs_tag;
108 1.22 ryo
109 1.22 ryo #define sunxi_dma_tag arm_generic_dma_tag
110 1.22 ryo #define sunxi_bs_tag arm_generic_bs_tag
111 1.22 ryo #define sunxi_a4x_bs_tag arm_generic_a4x_bs_tag
112 1.1 jmcneill
113 1.1 jmcneill static const struct pmap_devmap *
114 1.1 jmcneill sunxi_platform_devmap(void)
115 1.1 jmcneill {
116 1.1 jmcneill static const struct pmap_devmap devmap[] = {
117 1.1 jmcneill DEVMAP_ENTRY(SUNXI_CORE_VBASE,
118 1.1 jmcneill SUNXI_CORE_PBASE,
119 1.1 jmcneill SUNXI_CORE_SIZE),
120 1.1 jmcneill DEVMAP_ENTRY_END
121 1.17 skrll };
122 1.1 jmcneill
123 1.1 jmcneill return devmap;
124 1.1 jmcneill }
125 1.1 jmcneill
126 1.1 jmcneill static void
127 1.1 jmcneill sunxi_platform_init_attach_args(struct fdt_attach_args *faa)
128 1.1 jmcneill {
129 1.22 ryo faa->faa_bst = &sunxi_bs_tag;
130 1.22 ryo faa->faa_a4x_bst = &sunxi_a4x_bs_tag;
131 1.22 ryo faa->faa_dmat = &sunxi_dma_tag;
132 1.1 jmcneill }
133 1.1 jmcneill
134 1.22 ryo void sunxi_platform_early_putchar(char);
135 1.22 ryo
136 1.22 ryo void
137 1.1 jmcneill sunxi_platform_early_putchar(char c)
138 1.1 jmcneill {
139 1.1 jmcneill #ifdef CONSADDR
140 1.22 ryo #define CONSADDR_VA ((CONSADDR - SUNXI_CORE_PBASE) + SUNXI_CORE_VBASE)
141 1.22 ryo volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
142 1.22 ryo (volatile uint32_t *)CONSADDR_VA :
143 1.22 ryo (volatile uint32_t *)CONSADDR;
144 1.1 jmcneill
145 1.14 jakllsch while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
146 1.1 jmcneill ;
147 1.1 jmcneill
148 1.14 jakllsch uartaddr[com_data] = htole32(c);
149 1.1 jmcneill #endif
150 1.1 jmcneill }
151 1.1 jmcneill
152 1.1 jmcneill static void
153 1.1 jmcneill sunxi_platform_device_register(device_t self, void *aux)
154 1.1 jmcneill {
155 1.18 jmcneill prop_dictionary_t prop = device_properties(self);
156 1.18 jmcneill
157 1.18 jmcneill if (device_is_a(self, "rgephy")) {
158 1.19 jmcneill /* Pine64+ and NanoPi NEO Plus2 gigabit ethernet workaround */
159 1.19 jmcneill const char * compat[] = {
160 1.19 jmcneill "pine64,pine64-plus",
161 1.19 jmcneill "friendlyarm,nanopi-neo-plus2",
162 1.19 jmcneill NULL
163 1.19 jmcneill };
164 1.18 jmcneill if (of_match_compatible(OF_finddevice("/"), compat)) {
165 1.18 jmcneill prop_dictionary_set_bool(prop, "no-rx-delay", true);
166 1.18 jmcneill }
167 1.18 jmcneill }
168 1.27 jmcneill
169 1.27 jmcneill if (device_is_a(self, "armgtmr")) {
170 1.27 jmcneill /* Allwinner A64 has an unstable architectural timer */
171 1.27 jmcneill const char * compat[] = {
172 1.27 jmcneill "allwinner,sun50i-a64",
173 1.27 jmcneill NULL
174 1.27 jmcneill };
175 1.27 jmcneill if (of_match_compatible(OF_finddevice("/"), compat)) {
176 1.27 jmcneill prop_dictionary_set_bool(prop, "sun50i-a64-unstable-timer", true);
177 1.27 jmcneill }
178 1.27 jmcneill }
179 1.1 jmcneill }
180 1.1 jmcneill
181 1.3 jmcneill static u_int
182 1.3 jmcneill sunxi_platform_uart_freq(void)
183 1.3 jmcneill {
184 1.3 jmcneill return SUNXI_REF_FREQ;
185 1.3 jmcneill }
186 1.3 jmcneill
187 1.1 jmcneill static void
188 1.8 jmcneill sunxi_platform_bootstrap(void)
189 1.8 jmcneill {
190 1.30 skrll arm_fdt_cpu_bootstrap();
191 1.30 skrll
192 1.23 bouyer void *fdt_data = __UNCONST(fdtbus_get_data());
193 1.23 bouyer const int chosen_off = fdt_path_offset(fdt_data, "/chosen");
194 1.23 bouyer if (chosen_off < 0)
195 1.23 bouyer return;
196 1.23 bouyer
197 1.8 jmcneill if (match_bootconf_option(boot_args, "console", "fb")) {
198 1.8 jmcneill const int framebuffer_off =
199 1.8 jmcneill fdt_path_offset(fdt_data, "/chosen/framebuffer");
200 1.23 bouyer if (framebuffer_off >= 0) {
201 1.22 ryo const char *status = fdt_getprop(fdt_data,
202 1.22 ryo framebuffer_off, "status", NULL);
203 1.22 ryo if (status == NULL || strncmp(status, "ok", 2) == 0) {
204 1.22 ryo fdt_setprop_string(fdt_data, chosen_off,
205 1.22 ryo "stdout-path", "/chosen/framebuffer");
206 1.22 ryo }
207 1.22 ryo }
208 1.23 bouyer } else if (match_bootconf_option(boot_args, "console", "serial")) {
209 1.23 bouyer fdt_setprop_string(fdt_data, chosen_off,
210 1.23 bouyer "stdout-path", "serial0:115200n8");
211 1.8 jmcneill }
212 1.7 jmcneill }
213 1.7 jmcneill
214 1.29 skrll
215 1.7 jmcneill static void
216 1.7 jmcneill sun4i_platform_reset(void)
217 1.7 jmcneill {
218 1.22 ryo bus_space_tag_t bst = &sunxi_bs_tag;
219 1.7 jmcneill bus_space_handle_t bsh;
220 1.7 jmcneill
221 1.7 jmcneill bus_space_map(bst, SUN4I_WDT_BASE, SUN4I_WDT_SIZE, 0, &bsh);
222 1.7 jmcneill
223 1.7 jmcneill bus_space_write_4(bst, bsh, SUN4I_WDT_CTRL,
224 1.7 jmcneill SUN4I_WDT_CTRL_KEY | SUN4I_WDT_CTRL_RESTART);
225 1.7 jmcneill for (;;) {
226 1.7 jmcneill bus_space_write_4(bst, bsh, SUN4I_WDT_MODE,
227 1.7 jmcneill SUN4I_WDT_MODE_EN | SUN4I_WDT_MODE_RST_EN);
228 1.7 jmcneill }
229 1.7 jmcneill }
230 1.7 jmcneill
231 1.7 jmcneill static void
232 1.7 jmcneill sun4i_platform_delay(u_int n)
233 1.7 jmcneill {
234 1.22 ryo static bus_space_tag_t bst = &sunxi_bs_tag;
235 1.7 jmcneill static bus_space_handle_t bsh = 0;
236 1.12 jmcneill const long incs_per_us = SUNXI_REF_FREQ / 1000000;
237 1.12 jmcneill long ticks = n * incs_per_us;
238 1.7 jmcneill uint32_t cur, prev;
239 1.7 jmcneill
240 1.15 jmcneill if (bsh == 0) {
241 1.7 jmcneill bus_space_map(bst, SUN4I_TIMER_BASE, SUN4I_TIMER_SIZE, 0, &bsh);
242 1.7 jmcneill
243 1.15 jmcneill /* Enable Timer 1 */
244 1.15 jmcneill bus_space_write_4(bst, bsh, SUN4I_TIMER_1_INTV_VALUE, ~0U);
245 1.15 jmcneill bus_space_write_4(bst, bsh, SUN4I_TIMER_1_CTRL,
246 1.15 jmcneill SUN4I_TIMER_1_CTRL_EN |
247 1.15 jmcneill SUN4I_TIMER_1_CTRL_RELOAD |
248 1.15 jmcneill __SHIFTIN(SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M,
249 1.15 jmcneill SUN4I_TIMER_1_CTRL_CLK_SRC));
250 1.15 jmcneill }
251 1.15 jmcneill
252 1.15 jmcneill prev = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL);
253 1.7 jmcneill while (ticks > 0) {
254 1.15 jmcneill cur = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL);
255 1.7 jmcneill if (cur > prev)
256 1.7 jmcneill ticks -= (cur - prev);
257 1.7 jmcneill else
258 1.7 jmcneill ticks -= (~0U - cur + prev);
259 1.7 jmcneill prev = cur;
260 1.7 jmcneill }
261 1.7 jmcneill }
262 1.7 jmcneill
263 1.7 jmcneill static void
264 1.3 jmcneill sun6i_platform_reset(void)
265 1.1 jmcneill {
266 1.22 ryo bus_space_tag_t bst = &sunxi_bs_tag;
267 1.1 jmcneill bus_space_handle_t bsh;
268 1.1 jmcneill
269 1.3 jmcneill bus_space_map(bst, SUN6I_WDT_BASE, SUN6I_WDT_SIZE, 0, &bsh);
270 1.1 jmcneill
271 1.3 jmcneill bus_space_write_4(bst, bsh, SUN6I_WDT_CFG, SUN6I_WDT_CFG_SYS);
272 1.3 jmcneill bus_space_write_4(bst, bsh, SUN6I_WDT_MODE, SUN6I_WDT_MODE_EN);
273 1.1 jmcneill }
274 1.1 jmcneill
275 1.10 jmcneill static void
276 1.10 jmcneill sun9i_platform_reset(void)
277 1.10 jmcneill {
278 1.22 ryo bus_space_tag_t bst = &sunxi_bs_tag;
279 1.10 jmcneill bus_space_handle_t bsh;
280 1.10 jmcneill
281 1.10 jmcneill bus_space_map(bst, SUN9I_WDT_BASE, SUN9I_WDT_SIZE, 0, &bsh);
282 1.10 jmcneill
283 1.10 jmcneill bus_space_write_4(bst, bsh, SUN9I_WDT_CFG, SUN9I_WDT_CFG_SYS);
284 1.10 jmcneill bus_space_write_4(bst, bsh, SUN9I_WDT_MODE, SUN9I_WDT_MODE_EN);
285 1.10 jmcneill }
286 1.10 jmcneill
287 1.20 jmcneill static void
288 1.20 jmcneill sun50i_h6_platform_reset(void)
289 1.20 jmcneill {
290 1.22 ryo bus_space_tag_t bst = &sunxi_bs_tag;
291 1.20 jmcneill bus_space_handle_t bsh;
292 1.20 jmcneill
293 1.20 jmcneill bus_space_map(bst, SUN50I_H6_WDT_BASE, SUN50I_H6_WDT_SIZE, 0, &bsh);
294 1.20 jmcneill
295 1.20 jmcneill bus_space_write_4(bst, bsh, SUN50I_H6_WDT_CFG, SUN50I_H6_WDT_CFG_SYS);
296 1.20 jmcneill bus_space_write_4(bst, bsh, SUN50I_H6_WDT_MODE, SUN50I_H6_WDT_MODE_EN);
297 1.20 jmcneill }
298 1.20 jmcneill
299 1.9 jmcneill static const struct arm_platform sun4i_platform = {
300 1.25 skrll .ap_devmap = sunxi_platform_devmap,
301 1.25 skrll .ap_bootstrap = sunxi_platform_bootstrap,
302 1.25 skrll .ap_init_attach_args = sunxi_platform_init_attach_args,
303 1.25 skrll .ap_early_putchar = sunxi_platform_early_putchar,
304 1.25 skrll .ap_device_register = sunxi_platform_device_register,
305 1.25 skrll .ap_reset = sun4i_platform_reset,
306 1.25 skrll .ap_delay = sun4i_platform_delay,
307 1.25 skrll .ap_uart_freq = sunxi_platform_uart_freq,
308 1.9 jmcneill };
309 1.9 jmcneill
310 1.9 jmcneill ARM_PLATFORM(sun4i_a10, "allwinner,sun4i-a10", &sun4i_platform);
311 1.9 jmcneill
312 1.7 jmcneill static const struct arm_platform sun5i_platform = {
313 1.25 skrll .ap_devmap = sunxi_platform_devmap,
314 1.25 skrll .ap_bootstrap = sunxi_platform_bootstrap,
315 1.25 skrll .ap_init_attach_args = sunxi_platform_init_attach_args,
316 1.25 skrll .ap_early_putchar = sunxi_platform_early_putchar,
317 1.25 skrll .ap_device_register = sunxi_platform_device_register,
318 1.25 skrll .ap_reset = sun4i_platform_reset,
319 1.25 skrll .ap_delay = sun4i_platform_delay,
320 1.25 skrll .ap_uart_freq = sunxi_platform_uart_freq,
321 1.7 jmcneill };
322 1.7 jmcneill
323 1.7 jmcneill ARM_PLATFORM(sun5i_a13, "allwinner,sun5i-a13", &sun5i_platform);
324 1.16 jmcneill ARM_PLATFORM(sun5i_gr8, "nextthing,gr8", &sun5i_platform);
325 1.6 jmcneill
326 1.6 jmcneill static const struct arm_platform sun6i_platform = {
327 1.25 skrll .ap_devmap = sunxi_platform_devmap,
328 1.29 skrll .ap_bootstrap = sunxi_platform_bootstrap,
329 1.25 skrll .ap_init_attach_args = sunxi_platform_init_attach_args,
330 1.25 skrll .ap_early_putchar = sunxi_platform_early_putchar,
331 1.25 skrll .ap_device_register = sunxi_platform_device_register,
332 1.25 skrll .ap_reset = sun6i_platform_reset,
333 1.25 skrll .ap_delay = gtmr_delay,
334 1.25 skrll .ap_uart_freq = sunxi_platform_uart_freq,
335 1.29 skrll .ap_mpstart = arm_fdt_cpu_mpstart,
336 1.6 jmcneill };
337 1.6 jmcneill
338 1.6 jmcneill ARM_PLATFORM(sun6i_a31, "allwinner,sun6i-a31", &sun6i_platform);
339 1.6 jmcneill
340 1.9 jmcneill static const struct arm_platform sun7i_platform = {
341 1.25 skrll .ap_devmap = sunxi_platform_devmap,
342 1.29 skrll .ap_bootstrap = sunxi_platform_bootstrap,
343 1.25 skrll .ap_init_attach_args = sunxi_platform_init_attach_args,
344 1.25 skrll .ap_early_putchar = sunxi_platform_early_putchar,
345 1.25 skrll .ap_device_register = sunxi_platform_device_register,
346 1.25 skrll .ap_reset = sun4i_platform_reset,
347 1.25 skrll .ap_delay = sun4i_platform_delay,
348 1.25 skrll .ap_uart_freq = sunxi_platform_uart_freq,
349 1.29 skrll .ap_mpstart = arm_fdt_cpu_mpstart,
350 1.9 jmcneill };
351 1.9 jmcneill
352 1.9 jmcneill ARM_PLATFORM(sun7i_a20, "allwinner,sun7i-a20", &sun7i_platform);
353 1.9 jmcneill
354 1.3 jmcneill static const struct arm_platform sun8i_platform = {
355 1.25 skrll .ap_devmap = sunxi_platform_devmap,
356 1.29 skrll .ap_bootstrap = sunxi_platform_bootstrap,
357 1.25 skrll .ap_init_attach_args = sunxi_platform_init_attach_args,
358 1.25 skrll .ap_early_putchar = sunxi_platform_early_putchar,
359 1.25 skrll .ap_device_register = sunxi_platform_device_register,
360 1.25 skrll .ap_reset = sun6i_platform_reset,
361 1.25 skrll .ap_delay = gtmr_delay,
362 1.25 skrll .ap_uart_freq = sunxi_platform_uart_freq,
363 1.29 skrll .ap_mpstart = arm_fdt_cpu_mpstart,
364 1.3 jmcneill };
365 1.3 jmcneill
366 1.5 jmcneill ARM_PLATFORM(sun8i_h2plus, "allwinner,sun8i-h2-plus", &sun8i_platform);
367 1.3 jmcneill ARM_PLATFORM(sun8i_h3, "allwinner,sun8i-h3", &sun8i_platform);
368 1.4 jmcneill ARM_PLATFORM(sun8i_a83t, "allwinner,sun8i-a83t", &sun8i_platform);
369 1.1 jmcneill
370 1.10 jmcneill static const struct arm_platform sun9i_platform = {
371 1.25 skrll .ap_devmap = sunxi_platform_devmap,
372 1.25 skrll .ap_bootstrap = sunxi_platform_bootstrap,
373 1.25 skrll .ap_init_attach_args = sunxi_platform_init_attach_args,
374 1.25 skrll .ap_early_putchar = sunxi_platform_early_putchar,
375 1.25 skrll .ap_device_register = sunxi_platform_device_register,
376 1.25 skrll .ap_reset = sun9i_platform_reset,
377 1.25 skrll .ap_delay = gtmr_delay,
378 1.25 skrll .ap_uart_freq = sunxi_platform_uart_freq,
379 1.29 skrll .ap_mpstart = arm_fdt_cpu_mpstart,
380 1.10 jmcneill };
381 1.10 jmcneill
382 1.10 jmcneill ARM_PLATFORM(sun9i_a80, "allwinner,sun9i-a80", &sun9i_platform);
383 1.10 jmcneill
384 1.6 jmcneill static const struct arm_platform sun50i_platform = {
385 1.25 skrll .ap_devmap = sunxi_platform_devmap,
386 1.29 skrll .ap_bootstrap = sunxi_platform_bootstrap,
387 1.25 skrll .ap_init_attach_args = sunxi_platform_init_attach_args,
388 1.25 skrll .ap_early_putchar = sunxi_platform_early_putchar,
389 1.25 skrll .ap_device_register = sunxi_platform_device_register,
390 1.25 skrll .ap_reset = sun6i_platform_reset,
391 1.25 skrll .ap_delay = gtmr_delay,
392 1.25 skrll .ap_uart_freq = sunxi_platform_uart_freq,
393 1.29 skrll .ap_mpstart = arm_fdt_cpu_mpstart,
394 1.1 jmcneill };
395 1.1 jmcneill
396 1.6 jmcneill ARM_PLATFORM(sun50i_a64, "allwinner,sun50i-a64", &sun50i_platform);
397 1.11 jmcneill ARM_PLATFORM(sun50i_h5, "allwinner,sun50i-h5", &sun50i_platform);
398 1.20 jmcneill
399 1.20 jmcneill static const struct arm_platform sun50i_h6_platform = {
400 1.25 skrll .ap_devmap = sunxi_platform_devmap,
401 1.29 skrll .ap_bootstrap = sunxi_platform_bootstrap,
402 1.25 skrll .ap_init_attach_args = sunxi_platform_init_attach_args,
403 1.25 skrll .ap_early_putchar = sunxi_platform_early_putchar,
404 1.25 skrll .ap_device_register = sunxi_platform_device_register,
405 1.25 skrll .ap_reset = sun50i_h6_platform_reset,
406 1.25 skrll .ap_delay = gtmr_delay,
407 1.25 skrll .ap_uart_freq = sunxi_platform_uart_freq,
408 1.29 skrll .ap_mpstart = arm_fdt_cpu_mpstart,
409 1.20 jmcneill };
410 1.20 jmcneill
411 1.20 jmcneill ARM_PLATFORM(sun50i_h6, "allwinner,sun50i-h6", &sun50i_h6_platform);
412