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sunxi_platform.c revision 1.35
      1  1.35  jmcneill /* $NetBSD: sunxi_platform.c,v 1.35 2019/02/03 15:43:57 jmcneill Exp $ */
      2   1.1  jmcneill 
      3   1.1  jmcneill /*-
      4   1.1  jmcneill  * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
      5   1.1  jmcneill  * All rights reserved.
      6   1.1  jmcneill  *
      7   1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8   1.1  jmcneill  * modification, are permitted provided that the following conditions
      9   1.1  jmcneill  * are met:
     10   1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11   1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12   1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14   1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15   1.1  jmcneill  *
     16   1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17   1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18   1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19   1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20   1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21   1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22   1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23   1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24   1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25   1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26   1.1  jmcneill  * SUCH DAMAGE.
     27   1.1  jmcneill  */
     28   1.1  jmcneill 
     29   1.1  jmcneill #include "opt_soc.h"
     30   1.1  jmcneill #include "opt_multiprocessor.h"
     31  1.28     skrll #include "opt_console.h"
     32   1.1  jmcneill 
     33   1.1  jmcneill #include <sys/cdefs.h>
     34  1.35  jmcneill __KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.35 2019/02/03 15:43:57 jmcneill Exp $");
     35   1.1  jmcneill 
     36   1.1  jmcneill #include <sys/param.h>
     37   1.1  jmcneill #include <sys/bus.h>
     38   1.1  jmcneill #include <sys/cpu.h>
     39   1.1  jmcneill #include <sys/device.h>
     40   1.1  jmcneill #include <sys/termios.h>
     41   1.1  jmcneill 
     42   1.1  jmcneill #include <dev/fdt/fdtvar.h>
     43   1.1  jmcneill #include <arm/fdt/arm_fdtvar.h>
     44   1.1  jmcneill 
     45   1.1  jmcneill #include <uvm/uvm_extern.h>
     46   1.1  jmcneill 
     47   1.1  jmcneill #include <machine/bootconfig.h>
     48   1.1  jmcneill #include <arm/cpufunc.h>
     49   1.1  jmcneill 
     50   1.1  jmcneill #include <arm/cortex/gtmr_var.h>
     51   1.1  jmcneill #include <arm/cortex/gic_reg.h>
     52   1.1  jmcneill 
     53   1.1  jmcneill #include <dev/ic/ns16550reg.h>
     54   1.1  jmcneill #include <dev/ic/comreg.h>
     55   1.1  jmcneill 
     56   1.1  jmcneill #include <arm/arm/psci.h>
     57  1.26       ryo #include <arm/fdt/psci_fdtvar.h>
     58   1.1  jmcneill 
     59   1.1  jmcneill #include <arm/sunxi/sunxi_platform.h>
     60   1.1  jmcneill 
     61  1.32  jmcneill #if defined(SOC_SUNXI_MC)
     62  1.32  jmcneill #include <arm/sunxi/sunxi_mc_smp.h>
     63  1.32  jmcneill #endif
     64  1.32  jmcneill 
     65   1.8  jmcneill #include <libfdt.h>
     66   1.8  jmcneill 
     67   1.1  jmcneill #define	SUNXI_REF_FREQ	24000000
     68   1.1  jmcneill 
     69   1.7  jmcneill #define	SUN4I_TIMER_BASE	0x01c20c00
     70   1.7  jmcneill #define	SUN4I_TIMER_SIZE	0x90
     71  1.15  jmcneill #define	SUN4I_TIMER_1_CTRL	0x20
     72  1.15  jmcneill #define	 SUN4I_TIMER_1_CTRL_CLK_SRC	__BITS(3,2)
     73  1.15  jmcneill #define	 SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M	1
     74  1.15  jmcneill #define	 SUN4I_TIMER_1_CTRL_RELOAD	__BIT(1)
     75  1.15  jmcneill #define	 SUN4I_TIMER_1_CTRL_EN		__BIT(0)
     76  1.15  jmcneill #define	SUN4I_TIMER_1_INTV_VALUE 0x24
     77  1.15  jmcneill #define	SUN4I_TIMER_1_VAL	0x28
     78   1.7  jmcneill 
     79   1.7  jmcneill #define	SUN4I_WDT_BASE		0x01c20c90
     80   1.7  jmcneill #define	SUN4I_WDT_SIZE		0x10
     81   1.7  jmcneill #define	SUN4I_WDT_CTRL		0x00
     82   1.7  jmcneill #define	 SUN4I_WDT_CTRL_KEY	(0x333 << 1)
     83   1.7  jmcneill #define	 SUN4I_WDT_CTRL_RESTART	__BIT(0)
     84   1.7  jmcneill #define	SUN4I_WDT_MODE		0x04
     85   1.7  jmcneill #define	 SUN4I_WDT_MODE_RST_EN	__BIT(1)
     86   1.7  jmcneill #define	 SUN4I_WDT_MODE_EN	__BIT(0)
     87   1.7  jmcneill 
     88   1.3  jmcneill #define	SUN6I_WDT_BASE		0x01c20ca0
     89   1.3  jmcneill #define	SUN6I_WDT_SIZE		0x20
     90   1.3  jmcneill #define	SUN6I_WDT_CFG		0x14
     91   1.7  jmcneill #define	 SUN6I_WDT_CFG_SYS	__BIT(0)
     92   1.3  jmcneill #define	SUN6I_WDT_MODE		0x18
     93   1.7  jmcneill #define	 SUN6I_WDT_MODE_EN	__BIT(0)
     94   1.1  jmcneill 
     95  1.10  jmcneill #define	SUN9I_WDT_BASE		0x06000ca0
     96  1.10  jmcneill #define	SUN9I_WDT_SIZE		0x20
     97  1.10  jmcneill #define	SUN9I_WDT_CFG		0x14
     98  1.10  jmcneill #define	 SUN9I_WDT_CFG_SYS	__BIT(0)
     99  1.10  jmcneill #define	SUN9I_WDT_MODE		0x18
    100  1.10  jmcneill #define	 SUN9I_WDT_MODE_EN	__BIT(0)
    101  1.10  jmcneill 
    102  1.20  jmcneill #define	SUN50I_H6_WDT_BASE	0x01c20ca0
    103  1.20  jmcneill #define	SUN50I_H6_WDT_SIZE	0x20
    104  1.20  jmcneill #define	SUN50I_H6_WDT_CFG	0x14
    105  1.20  jmcneill #define	 SUN50I_H6_WDT_CFG_SYS	__BIT(0)
    106  1.20  jmcneill #define	SUN50I_H6_WDT_MODE	0x18
    107  1.20  jmcneill #define	 SUN50I_H6_WDT_MODE_EN	__BIT(0)
    108  1.20  jmcneill 
    109  1.21       ryo extern struct arm32_bus_dma_tag arm_generic_dma_tag;
    110  1.22       ryo extern struct bus_space arm_generic_bs_tag;
    111  1.22       ryo extern struct bus_space arm_generic_a4x_bs_tag;
    112  1.22       ryo 
    113  1.22       ryo #define	sunxi_dma_tag		arm_generic_dma_tag
    114  1.22       ryo #define	sunxi_bs_tag		arm_generic_bs_tag
    115  1.22       ryo #define	sunxi_a4x_bs_tag	arm_generic_a4x_bs_tag
    116   1.1  jmcneill 
    117   1.1  jmcneill static const struct pmap_devmap *
    118   1.1  jmcneill sunxi_platform_devmap(void)
    119   1.1  jmcneill {
    120   1.1  jmcneill 	static const struct pmap_devmap devmap[] = {
    121   1.1  jmcneill 		DEVMAP_ENTRY(SUNXI_CORE_VBASE,
    122   1.1  jmcneill 			     SUNXI_CORE_PBASE,
    123   1.1  jmcneill 			     SUNXI_CORE_SIZE),
    124   1.1  jmcneill 		DEVMAP_ENTRY_END
    125  1.17     skrll 	};
    126   1.1  jmcneill 
    127   1.1  jmcneill 	return devmap;
    128   1.1  jmcneill }
    129   1.1  jmcneill 
    130  1.34  jmcneill #define	SUNXI_MC_CPU_VBASE	(SUNXI_CORE_VBASE + SUNXI_CORE_SIZE)
    131  1.34  jmcneill #define	SUNXI_MC_CPU_PBASE	0x01700000
    132  1.34  jmcneill #define	SUNXI_MC_CPU_SIZE	0x00100000
    133  1.32  jmcneill 
    134  1.32  jmcneill static const struct pmap_devmap *
    135  1.32  jmcneill sun8i_a83t_platform_devmap(void)
    136  1.32  jmcneill {
    137  1.32  jmcneill 	static const struct pmap_devmap devmap[] = {
    138  1.32  jmcneill 		DEVMAP_ENTRY(SUNXI_CORE_VBASE,
    139  1.32  jmcneill 			     SUNXI_CORE_PBASE,
    140  1.32  jmcneill 			     SUNXI_CORE_SIZE),
    141  1.34  jmcneill 		DEVMAP_ENTRY(SUNXI_MC_CPU_VBASE,
    142  1.34  jmcneill 			     SUNXI_MC_CPU_PBASE,
    143  1.34  jmcneill 			     SUNXI_MC_CPU_SIZE),
    144  1.32  jmcneill 		DEVMAP_ENTRY_END
    145  1.32  jmcneill 	};
    146  1.32  jmcneill 
    147  1.32  jmcneill 	return devmap;
    148  1.32  jmcneill }
    149  1.32  jmcneill 
    150  1.34  jmcneill #define	SUN9I_A80_PRCM_VBASE	(SUNXI_MC_CPU_VBASE + SUNXI_MC_CPU_PBASE)
    151  1.34  jmcneill #define	SUN9I_A80_PRCM_PBASE	0x08000000
    152  1.34  jmcneill #define	SUN9I_A80_PRCM_SIZE	0x00100000
    153  1.34  jmcneill 
    154  1.34  jmcneill static const struct pmap_devmap *
    155  1.34  jmcneill sun9i_a80_platform_devmap(void)
    156  1.34  jmcneill {
    157  1.34  jmcneill 	static const struct pmap_devmap devmap[] = {
    158  1.34  jmcneill 		DEVMAP_ENTRY(SUNXI_CORE_VBASE,
    159  1.34  jmcneill 			     SUNXI_CORE_PBASE,
    160  1.34  jmcneill 			     SUNXI_CORE_SIZE),
    161  1.34  jmcneill 		DEVMAP_ENTRY(SUNXI_MC_CPU_VBASE,
    162  1.34  jmcneill 			     SUNXI_MC_CPU_PBASE,
    163  1.34  jmcneill 			     SUNXI_MC_CPU_SIZE),
    164  1.34  jmcneill 		DEVMAP_ENTRY(SUN9I_A80_PRCM_VBASE,
    165  1.34  jmcneill 			     SUN9I_A80_PRCM_PBASE,
    166  1.34  jmcneill 			     SUN9I_A80_PRCM_SIZE),
    167  1.34  jmcneill 		DEVMAP_ENTRY_END
    168  1.34  jmcneill 	};
    169  1.34  jmcneill 
    170  1.34  jmcneill 	return devmap;
    171  1.34  jmcneill }
    172  1.34  jmcneill 
    173  1.34  jmcneill 
    174   1.1  jmcneill static void
    175   1.1  jmcneill sunxi_platform_init_attach_args(struct fdt_attach_args *faa)
    176   1.1  jmcneill {
    177  1.22       ryo 	faa->faa_bst = &sunxi_bs_tag;
    178  1.22       ryo 	faa->faa_a4x_bst = &sunxi_a4x_bs_tag;
    179  1.22       ryo 	faa->faa_dmat = &sunxi_dma_tag;
    180   1.1  jmcneill }
    181   1.1  jmcneill 
    182  1.22       ryo void sunxi_platform_early_putchar(char);
    183  1.22       ryo 
    184  1.22       ryo void
    185   1.1  jmcneill sunxi_platform_early_putchar(char c)
    186   1.1  jmcneill {
    187   1.1  jmcneill #ifdef CONSADDR
    188  1.22       ryo #define CONSADDR_VA	((CONSADDR - SUNXI_CORE_PBASE) + SUNXI_CORE_VBASE)
    189  1.22       ryo 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
    190  1.22       ryo 	    (volatile uint32_t *)CONSADDR_VA :
    191  1.22       ryo 	    (volatile uint32_t *)CONSADDR;
    192   1.1  jmcneill 
    193  1.14  jakllsch 	while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
    194   1.1  jmcneill 		;
    195   1.1  jmcneill 
    196  1.14  jakllsch 	uartaddr[com_data] = htole32(c);
    197   1.1  jmcneill #endif
    198   1.1  jmcneill }
    199   1.1  jmcneill 
    200   1.1  jmcneill static void
    201   1.1  jmcneill sunxi_platform_device_register(device_t self, void *aux)
    202   1.1  jmcneill {
    203  1.18  jmcneill 	prop_dictionary_t prop = device_properties(self);
    204  1.35  jmcneill 	int val;
    205  1.18  jmcneill 
    206  1.18  jmcneill 	if (device_is_a(self, "rgephy")) {
    207  1.19  jmcneill 		/* Pine64+ and NanoPi NEO Plus2 gigabit ethernet workaround */
    208  1.19  jmcneill 		const char * compat[] = {
    209  1.19  jmcneill 			"pine64,pine64-plus",
    210  1.19  jmcneill 			"friendlyarm,nanopi-neo-plus2",
    211  1.19  jmcneill 			NULL
    212  1.19  jmcneill 		};
    213  1.18  jmcneill 		if (of_match_compatible(OF_finddevice("/"), compat)) {
    214  1.18  jmcneill 			prop_dictionary_set_bool(prop, "no-rx-delay", true);
    215  1.18  jmcneill 		}
    216  1.18  jmcneill 	}
    217  1.27  jmcneill 
    218  1.27  jmcneill 	if (device_is_a(self, "armgtmr")) {
    219  1.27  jmcneill 		/* Allwinner A64 has an unstable architectural timer */
    220  1.27  jmcneill 		const char * compat[] = {
    221  1.27  jmcneill 			"allwinner,sun50i-a64",
    222  1.27  jmcneill 			NULL
    223  1.27  jmcneill 		};
    224  1.27  jmcneill 		if (of_match_compatible(OF_finddevice("/"), compat)) {
    225  1.27  jmcneill 			prop_dictionary_set_bool(prop, "sun50i-a64-unstable-timer", true);
    226  1.27  jmcneill 		}
    227  1.27  jmcneill 	}
    228  1.35  jmcneill 
    229  1.35  jmcneill 	if (device_is_a(self, "sunxidrm")) {
    230  1.35  jmcneill 		if (get_bootconf_option(boot_args, "nomodeset", BOOTOPT_TYPE_BOOLEAN, &val))
    231  1.35  jmcneill 			if (val)
    232  1.35  jmcneill 				prop_dictionary_set_bool(prop, "disabled", true);
    233  1.35  jmcneill 	}
    234   1.1  jmcneill }
    235   1.1  jmcneill 
    236   1.3  jmcneill static u_int
    237   1.3  jmcneill sunxi_platform_uart_freq(void)
    238   1.3  jmcneill {
    239   1.3  jmcneill 	return SUNXI_REF_FREQ;
    240   1.3  jmcneill }
    241   1.3  jmcneill 
    242   1.1  jmcneill static void
    243   1.8  jmcneill sunxi_platform_bootstrap(void)
    244   1.8  jmcneill {
    245  1.30     skrll 	arm_fdt_cpu_bootstrap();
    246  1.30     skrll 
    247  1.23    bouyer 	void *fdt_data = __UNCONST(fdtbus_get_data());
    248  1.23    bouyer 	const int chosen_off = fdt_path_offset(fdt_data, "/chosen");
    249  1.23    bouyer 	if (chosen_off < 0)
    250  1.23    bouyer 		return;
    251  1.23    bouyer 
    252   1.8  jmcneill 	if (match_bootconf_option(boot_args, "console", "fb")) {
    253   1.8  jmcneill 		const int framebuffer_off =
    254   1.8  jmcneill 		    fdt_path_offset(fdt_data, "/chosen/framebuffer");
    255  1.23    bouyer 		if (framebuffer_off >= 0) {
    256  1.22       ryo 			const char *status = fdt_getprop(fdt_data,
    257  1.22       ryo 			    framebuffer_off, "status", NULL);
    258  1.22       ryo 			if (status == NULL || strncmp(status, "ok", 2) == 0) {
    259  1.22       ryo 				fdt_setprop_string(fdt_data, chosen_off,
    260  1.22       ryo 				    "stdout-path", "/chosen/framebuffer");
    261  1.22       ryo 			}
    262  1.22       ryo 		}
    263  1.23    bouyer 	} else if (match_bootconf_option(boot_args, "console", "serial")) {
    264  1.23    bouyer 		fdt_setprop_string(fdt_data, chosen_off,
    265  1.23    bouyer 		    "stdout-path", "serial0:115200n8");
    266   1.8  jmcneill 	}
    267   1.7  jmcneill }
    268   1.7  jmcneill 
    269  1.33  jmcneill #if defined(SOC_SUNXI_MC)
    270  1.33  jmcneill static int
    271  1.34  jmcneill cpu_enable_sun8i_a83t(int phandle)
    272  1.32  jmcneill {
    273  1.33  jmcneill 	uint64_t mpidr;
    274  1.32  jmcneill 
    275  1.33  jmcneill 	fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
    276  1.32  jmcneill 
    277  1.34  jmcneill 	return sun8i_a83t_smp_enable(mpidr);
    278  1.33  jmcneill }
    279  1.34  jmcneill ARM_CPU_METHOD(sun8i_a83t, "allwinner,sun8i-a83t-smp", cpu_enable_sun8i_a83t);
    280  1.34  jmcneill 
    281  1.34  jmcneill static int
    282  1.34  jmcneill cpu_enable_sun9i_a80(int phandle)
    283  1.34  jmcneill {
    284  1.34  jmcneill 	uint64_t mpidr;
    285  1.34  jmcneill 
    286  1.34  jmcneill 	fdtbus_get_reg64(phandle, 0, &mpidr, NULL);
    287  1.34  jmcneill 
    288  1.34  jmcneill 	return sun9i_a80_smp_enable(mpidr);
    289  1.34  jmcneill }
    290  1.34  jmcneill ARM_CPU_METHOD(sun9i_a80, "allwinner,sun9i-a80-smp", cpu_enable_sun9i_a80);
    291  1.32  jmcneill #endif
    292  1.32  jmcneill 
    293   1.7  jmcneill static void
    294   1.7  jmcneill sun4i_platform_reset(void)
    295   1.7  jmcneill {
    296  1.22       ryo 	bus_space_tag_t bst = &sunxi_bs_tag;
    297   1.7  jmcneill 	bus_space_handle_t bsh;
    298   1.7  jmcneill 
    299   1.7  jmcneill 	bus_space_map(bst, SUN4I_WDT_BASE, SUN4I_WDT_SIZE, 0, &bsh);
    300   1.7  jmcneill 
    301   1.7  jmcneill 	bus_space_write_4(bst, bsh, SUN4I_WDT_CTRL,
    302   1.7  jmcneill 	    SUN4I_WDT_CTRL_KEY | SUN4I_WDT_CTRL_RESTART);
    303   1.7  jmcneill 	for (;;) {
    304   1.7  jmcneill 		bus_space_write_4(bst, bsh, SUN4I_WDT_MODE,
    305   1.7  jmcneill 		    SUN4I_WDT_MODE_EN | SUN4I_WDT_MODE_RST_EN);
    306   1.7  jmcneill 	}
    307   1.7  jmcneill }
    308   1.7  jmcneill 
    309   1.7  jmcneill static void
    310   1.7  jmcneill sun4i_platform_delay(u_int n)
    311   1.7  jmcneill {
    312  1.22       ryo 	static bus_space_tag_t bst = &sunxi_bs_tag;
    313   1.7  jmcneill 	static bus_space_handle_t bsh = 0;
    314  1.12  jmcneill 	const long incs_per_us = SUNXI_REF_FREQ / 1000000;
    315  1.12  jmcneill 	long ticks = n * incs_per_us;
    316   1.7  jmcneill 	uint32_t cur, prev;
    317   1.7  jmcneill 
    318  1.15  jmcneill 	if (bsh == 0) {
    319   1.7  jmcneill 		bus_space_map(bst, SUN4I_TIMER_BASE, SUN4I_TIMER_SIZE, 0, &bsh);
    320   1.7  jmcneill 
    321  1.15  jmcneill 		/* Enable Timer 1 */
    322  1.15  jmcneill 		bus_space_write_4(bst, bsh, SUN4I_TIMER_1_INTV_VALUE, ~0U);
    323  1.15  jmcneill 		bus_space_write_4(bst, bsh, SUN4I_TIMER_1_CTRL,
    324  1.15  jmcneill 		    SUN4I_TIMER_1_CTRL_EN |
    325  1.15  jmcneill 		    SUN4I_TIMER_1_CTRL_RELOAD |
    326  1.15  jmcneill 		    __SHIFTIN(SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M,
    327  1.15  jmcneill 			      SUN4I_TIMER_1_CTRL_CLK_SRC));
    328  1.15  jmcneill 	}
    329  1.15  jmcneill 
    330  1.15  jmcneill 	prev = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL);
    331   1.7  jmcneill 	while (ticks > 0) {
    332  1.15  jmcneill 		cur = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL);
    333   1.7  jmcneill 		if (cur > prev)
    334   1.7  jmcneill 			ticks -= (cur - prev);
    335   1.7  jmcneill 		else
    336   1.7  jmcneill 			ticks -= (~0U - cur + prev);
    337   1.7  jmcneill 		prev = cur;
    338   1.7  jmcneill 	}
    339   1.7  jmcneill }
    340   1.7  jmcneill 
    341   1.7  jmcneill static void
    342   1.3  jmcneill sun6i_platform_reset(void)
    343   1.1  jmcneill {
    344  1.22       ryo 	bus_space_tag_t bst = &sunxi_bs_tag;
    345   1.1  jmcneill 	bus_space_handle_t bsh;
    346   1.1  jmcneill 
    347   1.3  jmcneill 	bus_space_map(bst, SUN6I_WDT_BASE, SUN6I_WDT_SIZE, 0, &bsh);
    348   1.1  jmcneill 
    349   1.3  jmcneill 	bus_space_write_4(bst, bsh, SUN6I_WDT_CFG, SUN6I_WDT_CFG_SYS);
    350   1.3  jmcneill 	bus_space_write_4(bst, bsh, SUN6I_WDT_MODE, SUN6I_WDT_MODE_EN);
    351   1.1  jmcneill }
    352   1.1  jmcneill 
    353  1.10  jmcneill static void
    354  1.10  jmcneill sun9i_platform_reset(void)
    355  1.10  jmcneill {
    356  1.22       ryo 	bus_space_tag_t bst = &sunxi_bs_tag;
    357  1.10  jmcneill 	bus_space_handle_t bsh;
    358  1.10  jmcneill 
    359  1.10  jmcneill 	bus_space_map(bst, SUN9I_WDT_BASE, SUN9I_WDT_SIZE, 0, &bsh);
    360  1.10  jmcneill 
    361  1.10  jmcneill 	bus_space_write_4(bst, bsh, SUN9I_WDT_CFG, SUN9I_WDT_CFG_SYS);
    362  1.10  jmcneill 	bus_space_write_4(bst, bsh, SUN9I_WDT_MODE, SUN9I_WDT_MODE_EN);
    363  1.10  jmcneill }
    364  1.10  jmcneill 
    365  1.20  jmcneill static void
    366  1.20  jmcneill sun50i_h6_platform_reset(void)
    367  1.20  jmcneill {
    368  1.22       ryo 	bus_space_tag_t bst = &sunxi_bs_tag;
    369  1.20  jmcneill 	bus_space_handle_t bsh;
    370  1.20  jmcneill 
    371  1.20  jmcneill 	bus_space_map(bst, SUN50I_H6_WDT_BASE, SUN50I_H6_WDT_SIZE, 0, &bsh);
    372  1.20  jmcneill 
    373  1.20  jmcneill 	bus_space_write_4(bst, bsh, SUN50I_H6_WDT_CFG, SUN50I_H6_WDT_CFG_SYS);
    374  1.20  jmcneill 	bus_space_write_4(bst, bsh, SUN50I_H6_WDT_MODE, SUN50I_H6_WDT_MODE_EN);
    375  1.20  jmcneill }
    376  1.20  jmcneill 
    377   1.9  jmcneill static const struct arm_platform sun4i_platform = {
    378  1.25     skrll 	.ap_devmap = sunxi_platform_devmap,
    379  1.25     skrll 	.ap_bootstrap = sunxi_platform_bootstrap,
    380  1.25     skrll 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    381  1.25     skrll 	.ap_device_register = sunxi_platform_device_register,
    382  1.25     skrll 	.ap_reset = sun4i_platform_reset,
    383  1.25     skrll 	.ap_delay = sun4i_platform_delay,
    384  1.25     skrll 	.ap_uart_freq = sunxi_platform_uart_freq,
    385   1.9  jmcneill };
    386   1.9  jmcneill 
    387   1.9  jmcneill ARM_PLATFORM(sun4i_a10, "allwinner,sun4i-a10", &sun4i_platform);
    388   1.9  jmcneill 
    389   1.7  jmcneill static const struct arm_platform sun5i_platform = {
    390  1.25     skrll 	.ap_devmap = sunxi_platform_devmap,
    391  1.25     skrll 	.ap_bootstrap = sunxi_platform_bootstrap,
    392  1.25     skrll 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    393  1.25     skrll 	.ap_device_register = sunxi_platform_device_register,
    394  1.25     skrll 	.ap_reset = sun4i_platform_reset,
    395  1.25     skrll 	.ap_delay = sun4i_platform_delay,
    396  1.25     skrll 	.ap_uart_freq = sunxi_platform_uart_freq,
    397   1.7  jmcneill };
    398   1.7  jmcneill 
    399   1.7  jmcneill ARM_PLATFORM(sun5i_a13, "allwinner,sun5i-a13", &sun5i_platform);
    400  1.16  jmcneill ARM_PLATFORM(sun5i_gr8, "nextthing,gr8", &sun5i_platform);
    401   1.6  jmcneill 
    402   1.6  jmcneill static const struct arm_platform sun6i_platform = {
    403  1.25     skrll 	.ap_devmap = sunxi_platform_devmap,
    404  1.29     skrll 	.ap_bootstrap = sunxi_platform_bootstrap,
    405  1.25     skrll 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    406  1.25     skrll 	.ap_device_register = sunxi_platform_device_register,
    407  1.25     skrll 	.ap_reset = sun6i_platform_reset,
    408  1.25     skrll 	.ap_delay = gtmr_delay,
    409  1.25     skrll 	.ap_uart_freq = sunxi_platform_uart_freq,
    410  1.29     skrll 	.ap_mpstart = arm_fdt_cpu_mpstart,
    411   1.6  jmcneill };
    412   1.6  jmcneill 
    413   1.6  jmcneill ARM_PLATFORM(sun6i_a31, "allwinner,sun6i-a31", &sun6i_platform);
    414   1.6  jmcneill 
    415   1.9  jmcneill static const struct arm_platform sun7i_platform = {
    416  1.25     skrll 	.ap_devmap = sunxi_platform_devmap,
    417  1.29     skrll 	.ap_bootstrap = sunxi_platform_bootstrap,
    418  1.25     skrll 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    419  1.25     skrll 	.ap_device_register = sunxi_platform_device_register,
    420  1.25     skrll 	.ap_reset = sun4i_platform_reset,
    421  1.25     skrll 	.ap_delay = sun4i_platform_delay,
    422  1.25     skrll 	.ap_uart_freq = sunxi_platform_uart_freq,
    423  1.29     skrll 	.ap_mpstart = arm_fdt_cpu_mpstart,
    424   1.9  jmcneill };
    425   1.9  jmcneill 
    426   1.9  jmcneill ARM_PLATFORM(sun7i_a20, "allwinner,sun7i-a20", &sun7i_platform);
    427   1.9  jmcneill 
    428   1.3  jmcneill static const struct arm_platform sun8i_platform = {
    429  1.25     skrll 	.ap_devmap = sunxi_platform_devmap,
    430  1.29     skrll 	.ap_bootstrap = sunxi_platform_bootstrap,
    431  1.25     skrll 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    432  1.25     skrll 	.ap_device_register = sunxi_platform_device_register,
    433  1.25     skrll 	.ap_reset = sun6i_platform_reset,
    434  1.25     skrll 	.ap_delay = gtmr_delay,
    435  1.25     skrll 	.ap_uart_freq = sunxi_platform_uart_freq,
    436  1.29     skrll 	.ap_mpstart = arm_fdt_cpu_mpstart,
    437   1.3  jmcneill };
    438   1.3  jmcneill 
    439   1.5  jmcneill ARM_PLATFORM(sun8i_h2plus, "allwinner,sun8i-h2-plus", &sun8i_platform);
    440   1.3  jmcneill ARM_PLATFORM(sun8i_h3, "allwinner,sun8i-h3", &sun8i_platform);
    441  1.32  jmcneill 
    442  1.32  jmcneill static const struct arm_platform sun8i_a83t_platform = {
    443  1.32  jmcneill 	.ap_devmap = sun8i_a83t_platform_devmap,
    444  1.32  jmcneill 	.ap_bootstrap = sunxi_platform_bootstrap,
    445  1.32  jmcneill 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    446  1.32  jmcneill 	.ap_device_register = sunxi_platform_device_register,
    447  1.32  jmcneill 	.ap_reset = sun6i_platform_reset,
    448  1.32  jmcneill 	.ap_delay = gtmr_delay,
    449  1.32  jmcneill 	.ap_uart_freq = sunxi_platform_uart_freq,
    450  1.33  jmcneill 	.ap_mpstart = arm_fdt_cpu_mpstart,
    451  1.32  jmcneill };
    452  1.32  jmcneill 
    453  1.32  jmcneill ARM_PLATFORM(sun8i_a83t, "allwinner,sun8i-a83t", &sun8i_a83t_platform);
    454   1.1  jmcneill 
    455  1.10  jmcneill static const struct arm_platform sun9i_platform = {
    456  1.34  jmcneill 	.ap_devmap = sun9i_a80_platform_devmap,
    457  1.25     skrll 	.ap_bootstrap = sunxi_platform_bootstrap,
    458  1.25     skrll 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    459  1.25     skrll 	.ap_device_register = sunxi_platform_device_register,
    460  1.25     skrll 	.ap_reset = sun9i_platform_reset,
    461  1.25     skrll 	.ap_delay = gtmr_delay,
    462  1.25     skrll 	.ap_uart_freq = sunxi_platform_uart_freq,
    463  1.29     skrll 	.ap_mpstart = arm_fdt_cpu_mpstart,
    464  1.10  jmcneill };
    465  1.10  jmcneill 
    466  1.10  jmcneill ARM_PLATFORM(sun9i_a80, "allwinner,sun9i-a80", &sun9i_platform);
    467  1.10  jmcneill 
    468   1.6  jmcneill static const struct arm_platform sun50i_platform = {
    469  1.25     skrll 	.ap_devmap = sunxi_platform_devmap,
    470  1.29     skrll 	.ap_bootstrap = sunxi_platform_bootstrap,
    471  1.25     skrll 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    472  1.25     skrll 	.ap_device_register = sunxi_platform_device_register,
    473  1.25     skrll 	.ap_reset = sun6i_platform_reset,
    474  1.25     skrll 	.ap_delay = gtmr_delay,
    475  1.25     skrll 	.ap_uart_freq = sunxi_platform_uart_freq,
    476  1.29     skrll 	.ap_mpstart = arm_fdt_cpu_mpstart,
    477   1.1  jmcneill };
    478   1.1  jmcneill 
    479   1.6  jmcneill ARM_PLATFORM(sun50i_a64, "allwinner,sun50i-a64", &sun50i_platform);
    480  1.11  jmcneill ARM_PLATFORM(sun50i_h5, "allwinner,sun50i-h5", &sun50i_platform);
    481  1.20  jmcneill 
    482  1.20  jmcneill static const struct arm_platform sun50i_h6_platform = {
    483  1.25     skrll 	.ap_devmap = sunxi_platform_devmap,
    484  1.29     skrll 	.ap_bootstrap = sunxi_platform_bootstrap,
    485  1.25     skrll 	.ap_init_attach_args = sunxi_platform_init_attach_args,
    486  1.25     skrll 	.ap_device_register = sunxi_platform_device_register,
    487  1.25     skrll 	.ap_reset = sun50i_h6_platform_reset,
    488  1.25     skrll 	.ap_delay = gtmr_delay,
    489  1.25     skrll 	.ap_uart_freq = sunxi_platform_uart_freq,
    490  1.29     skrll 	.ap_mpstart = arm_fdt_cpu_mpstart,
    491  1.20  jmcneill };
    492  1.20  jmcneill 
    493  1.20  jmcneill ARM_PLATFORM(sun50i_h6, "allwinner,sun50i-h6", &sun50i_h6_platform);
    494