sunxi_platform.c revision 1.16 1 /* $NetBSD: sunxi_platform.c,v 1.16 2017/11/06 21:03:58 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include "opt_soc.h"
30 #include "opt_multiprocessor.h"
31 #include "opt_fdt_arm.h"
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.16 2017/11/06 21:03:58 jmcneill Exp $");
35
36 #include <sys/param.h>
37 #include <sys/bus.h>
38 #include <sys/cpu.h>
39 #include <sys/device.h>
40 #include <sys/termios.h>
41
42 #include <dev/fdt/fdtvar.h>
43 #include <arm/fdt/arm_fdtvar.h>
44
45 #include <uvm/uvm_extern.h>
46
47 #include <machine/bootconfig.h>
48 #include <arm/cpufunc.h>
49
50 #include <arm/cortex/gtmr_var.h>
51 #include <arm/cortex/gic_reg.h>
52
53 #include <dev/ic/ns16550reg.h>
54 #include <dev/ic/comreg.h>
55
56 #include <arm/arm/psci.h>
57 #include <arm/fdt/psci_fdt.h>
58
59 #include <arm/sunxi/sunxi_platform.h>
60
61 #include <libfdt.h>
62
63 #define SUNXI_REF_FREQ 24000000
64
65 #define SUN4I_TIMER_BASE 0x01c20c00
66 #define SUN4I_TIMER_SIZE 0x90
67 #define SUN4I_TIMER_1_CTRL 0x20
68 #define SUN4I_TIMER_1_CTRL_CLK_SRC __BITS(3,2)
69 #define SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M 1
70 #define SUN4I_TIMER_1_CTRL_RELOAD __BIT(1)
71 #define SUN4I_TIMER_1_CTRL_EN __BIT(0)
72 #define SUN4I_TIMER_1_INTV_VALUE 0x24
73 #define SUN4I_TIMER_1_VAL 0x28
74
75 #define SUN4I_WDT_BASE 0x01c20c90
76 #define SUN4I_WDT_SIZE 0x10
77 #define SUN4I_WDT_CTRL 0x00
78 #define SUN4I_WDT_CTRL_KEY (0x333 << 1)
79 #define SUN4I_WDT_CTRL_RESTART __BIT(0)
80 #define SUN4I_WDT_MODE 0x04
81 #define SUN4I_WDT_MODE_RST_EN __BIT(1)
82 #define SUN4I_WDT_MODE_EN __BIT(0)
83
84 #define SUN6I_WDT_BASE 0x01c20ca0
85 #define SUN6I_WDT_SIZE 0x20
86 #define SUN6I_WDT_CFG 0x14
87 #define SUN6I_WDT_CFG_SYS __BIT(0)
88 #define SUN6I_WDT_MODE 0x18
89 #define SUN6I_WDT_MODE_EN __BIT(0)
90
91 #define SUN9I_WDT_BASE 0x06000ca0
92 #define SUN9I_WDT_SIZE 0x20
93 #define SUN9I_WDT_CFG 0x14
94 #define SUN9I_WDT_CFG_SYS __BIT(0)
95 #define SUN9I_WDT_MODE 0x18
96 #define SUN9I_WDT_MODE_EN __BIT(0)
97
98 extern struct bus_space armv7_generic_bs_tag;
99 extern struct bus_space armv7_generic_a4x_bs_tag;
100 extern struct arm32_bus_dma_tag armv7_generic_dma_tag;
101
102 static const struct pmap_devmap *
103 sunxi_platform_devmap(void)
104 {
105 static const struct pmap_devmap devmap[] = {
106 DEVMAP_ENTRY(SUNXI_CORE_VBASE,
107 SUNXI_CORE_PBASE,
108 SUNXI_CORE_SIZE),
109 DEVMAP_ENTRY_END
110 };
111
112 return devmap;
113 }
114
115 static void
116 sunxi_platform_init_attach_args(struct fdt_attach_args *faa)
117 {
118 faa->faa_bst = &armv7_generic_bs_tag;
119 faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
120 faa->faa_dmat = &armv7_generic_dma_tag;
121 }
122
123 static void
124 sunxi_platform_early_putchar(char c)
125 {
126 #ifdef CONSADDR
127 #define CONSADDR_VA ((CONSADDR - SUNXI_CORE_PBASE) + SUNXI_CORE_VBASE)
128 volatile uint32_t *uartaddr = (volatile uint32_t *)CONSADDR_VA;
129
130 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
131 ;
132
133 uartaddr[com_data] = htole32(c);
134 #endif
135 }
136
137 static void
138 sunxi_platform_device_register(device_t self, void *aux)
139 {
140 }
141
142 static u_int
143 sunxi_platform_uart_freq(void)
144 {
145 return SUNXI_REF_FREQ;
146 }
147
148 static void
149 sunxi_platform_bootstrap(void)
150 {
151 if (match_bootconf_option(boot_args, "console", "fb")) {
152 void *fdt_data = __UNCONST(fdtbus_get_data());
153 const int chosen_off = fdt_path_offset(fdt_data, "/chosen");
154 const int framebuffer_off =
155 fdt_path_offset(fdt_data, "/chosen/framebuffer");
156 if (chosen_off >= 0 && framebuffer_off >= 0)
157 fdt_setprop_string(fdt_data, chosen_off, "stdout-path",
158 "/chosen/framebuffer");
159 }
160 }
161
162 static void
163 sunxi_platform_psci_bootstrap(void)
164 {
165 psci_fdt_bootstrap();
166 sunxi_platform_bootstrap();
167 }
168
169 static void
170 sun4i_platform_reset(void)
171 {
172 bus_space_tag_t bst = &armv7_generic_bs_tag;
173 bus_space_handle_t bsh;
174
175 bus_space_map(bst, SUN4I_WDT_BASE, SUN4I_WDT_SIZE, 0, &bsh);
176
177 bus_space_write_4(bst, bsh, SUN4I_WDT_CTRL,
178 SUN4I_WDT_CTRL_KEY | SUN4I_WDT_CTRL_RESTART);
179 for (;;) {
180 bus_space_write_4(bst, bsh, SUN4I_WDT_MODE,
181 SUN4I_WDT_MODE_EN | SUN4I_WDT_MODE_RST_EN);
182 }
183 }
184
185 static void
186 sun4i_platform_delay(u_int n)
187 {
188 static bus_space_tag_t bst = &armv7_generic_bs_tag;
189 static bus_space_handle_t bsh = 0;
190 const long incs_per_us = SUNXI_REF_FREQ / 1000000;
191 long ticks = n * incs_per_us;
192 uint32_t cur, prev;
193
194 if (bsh == 0) {
195 bus_space_map(bst, SUN4I_TIMER_BASE, SUN4I_TIMER_SIZE, 0, &bsh);
196
197 /* Enable Timer 1 */
198 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_INTV_VALUE, ~0U);
199 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_CTRL,
200 SUN4I_TIMER_1_CTRL_EN |
201 SUN4I_TIMER_1_CTRL_RELOAD |
202 __SHIFTIN(SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M,
203 SUN4I_TIMER_1_CTRL_CLK_SRC));
204 }
205
206 prev = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL);
207 while (ticks > 0) {
208 cur = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL);
209 if (cur > prev)
210 ticks -= (cur - prev);
211 else
212 ticks -= (~0U - cur + prev);
213 prev = cur;
214 }
215 }
216
217 static void
218 sun6i_platform_reset(void)
219 {
220 bus_space_tag_t bst = &armv7_generic_bs_tag;
221 bus_space_handle_t bsh;
222
223 bus_space_map(bst, SUN6I_WDT_BASE, SUN6I_WDT_SIZE, 0, &bsh);
224
225 bus_space_write_4(bst, bsh, SUN6I_WDT_CFG, SUN6I_WDT_CFG_SYS);
226 bus_space_write_4(bst, bsh, SUN6I_WDT_MODE, SUN6I_WDT_MODE_EN);
227 }
228
229 static void
230 sun9i_platform_reset(void)
231 {
232 bus_space_tag_t bst = &armv7_generic_bs_tag;
233 bus_space_handle_t bsh;
234
235 bus_space_map(bst, SUN9I_WDT_BASE, SUN9I_WDT_SIZE, 0, &bsh);
236
237 bus_space_write_4(bst, bsh, SUN9I_WDT_CFG, SUN9I_WDT_CFG_SYS);
238 bus_space_write_4(bst, bsh, SUN9I_WDT_MODE, SUN9I_WDT_MODE_EN);
239 }
240
241 static const struct arm_platform sun4i_platform = {
242 .devmap = sunxi_platform_devmap,
243 .bootstrap = sunxi_platform_bootstrap,
244 .init_attach_args = sunxi_platform_init_attach_args,
245 .early_putchar = sunxi_platform_early_putchar,
246 .device_register = sunxi_platform_device_register,
247 .reset = sun4i_platform_reset,
248 .delay = sun4i_platform_delay,
249 .uart_freq = sunxi_platform_uart_freq,
250 };
251
252 ARM_PLATFORM(sun4i_a10, "allwinner,sun4i-a10", &sun4i_platform);
253
254 static const struct arm_platform sun5i_platform = {
255 .devmap = sunxi_platform_devmap,
256 .bootstrap = sunxi_platform_bootstrap,
257 .init_attach_args = sunxi_platform_init_attach_args,
258 .early_putchar = sunxi_platform_early_putchar,
259 .device_register = sunxi_platform_device_register,
260 .reset = sun4i_platform_reset,
261 .delay = sun4i_platform_delay,
262 .uart_freq = sunxi_platform_uart_freq,
263 };
264
265 ARM_PLATFORM(sun5i_a13, "allwinner,sun5i-a13", &sun5i_platform);
266 ARM_PLATFORM(sun5i_gr8, "nextthing,gr8", &sun5i_platform);
267
268 static const struct arm_platform sun6i_platform = {
269 .devmap = sunxi_platform_devmap,
270 .bootstrap = sunxi_platform_psci_bootstrap,
271 .init_attach_args = sunxi_platform_init_attach_args,
272 .early_putchar = sunxi_platform_early_putchar,
273 .device_register = sunxi_platform_device_register,
274 .reset = sun6i_platform_reset,
275 .delay = gtmr_delay,
276 .uart_freq = sunxi_platform_uart_freq,
277 };
278
279 ARM_PLATFORM(sun6i_a31, "allwinner,sun6i-a31", &sun6i_platform);
280
281 static const struct arm_platform sun7i_platform = {
282 .devmap = sunxi_platform_devmap,
283 .bootstrap = sunxi_platform_psci_bootstrap,
284 .init_attach_args = sunxi_platform_init_attach_args,
285 .early_putchar = sunxi_platform_early_putchar,
286 .device_register = sunxi_platform_device_register,
287 .reset = sun4i_platform_reset,
288 .delay = sun4i_platform_delay,
289 .uart_freq = sunxi_platform_uart_freq,
290 };
291
292 ARM_PLATFORM(sun7i_a20, "allwinner,sun7i-a20", &sun7i_platform);
293
294 static const struct arm_platform sun8i_platform = {
295 .devmap = sunxi_platform_devmap,
296 .bootstrap = sunxi_platform_psci_bootstrap,
297 .init_attach_args = sunxi_platform_init_attach_args,
298 .early_putchar = sunxi_platform_early_putchar,
299 .device_register = sunxi_platform_device_register,
300 .reset = sun6i_platform_reset,
301 .delay = gtmr_delay,
302 .uart_freq = sunxi_platform_uart_freq,
303 };
304
305 ARM_PLATFORM(sun8i_h2plus, "allwinner,sun8i-h2-plus", &sun8i_platform);
306 ARM_PLATFORM(sun8i_h3, "allwinner,sun8i-h3", &sun8i_platform);
307 ARM_PLATFORM(sun8i_a83t, "allwinner,sun8i-a83t", &sun8i_platform);
308
309 static const struct arm_platform sun9i_platform = {
310 .devmap = sunxi_platform_devmap,
311 .bootstrap = sunxi_platform_bootstrap,
312 .init_attach_args = sunxi_platform_init_attach_args,
313 .early_putchar = sunxi_platform_early_putchar,
314 .device_register = sunxi_platform_device_register,
315 .reset = sun9i_platform_reset,
316 .delay = gtmr_delay,
317 .uart_freq = sunxi_platform_uart_freq,
318 };
319
320 ARM_PLATFORM(sun9i_a80, "allwinner,sun9i-a80", &sun9i_platform);
321
322 static const struct arm_platform sun50i_platform = {
323 .devmap = sunxi_platform_devmap,
324 .bootstrap = sunxi_platform_bootstrap,
325 .init_attach_args = sunxi_platform_init_attach_args,
326 .early_putchar = sunxi_platform_early_putchar,
327 .device_register = sunxi_platform_device_register,
328 .reset = sun6i_platform_reset,
329 .delay = gtmr_delay,
330 .uart_freq = sunxi_platform_uart_freq,
331 };
332
333 ARM_PLATFORM(sun50i_a64, "allwinner,sun50i-a64", &sun50i_platform);
334 ARM_PLATFORM(sun50i_h5, "allwinner,sun50i-h5", &sun50i_platform);
335