sunxi_platform.c revision 1.20
1 /* $NetBSD: sunxi_platform.c,v 1.20 2018/03/03 01:19:46 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_soc.h" 30 #include "opt_multiprocessor.h" 31 #include "opt_fdt_arm.h" 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.20 2018/03/03 01:19:46 jmcneill Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/cpu.h> 39 #include <sys/device.h> 40 #include <sys/termios.h> 41 42 #include <dev/fdt/fdtvar.h> 43 #include <arm/fdt/arm_fdtvar.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/bootconfig.h> 48 #include <arm/cpufunc.h> 49 50 #include <arm/cortex/gtmr_var.h> 51 #include <arm/cortex/gic_reg.h> 52 53 #include <dev/ic/ns16550reg.h> 54 #include <dev/ic/comreg.h> 55 56 #include <arm/arm/psci.h> 57 #include <arm/fdt/psci_fdt.h> 58 59 #include <arm/sunxi/sunxi_platform.h> 60 61 #include <libfdt.h> 62 63 #define SUNXI_REF_FREQ 24000000 64 65 #define SUN4I_TIMER_BASE 0x01c20c00 66 #define SUN4I_TIMER_SIZE 0x90 67 #define SUN4I_TIMER_1_CTRL 0x20 68 #define SUN4I_TIMER_1_CTRL_CLK_SRC __BITS(3,2) 69 #define SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M 1 70 #define SUN4I_TIMER_1_CTRL_RELOAD __BIT(1) 71 #define SUN4I_TIMER_1_CTRL_EN __BIT(0) 72 #define SUN4I_TIMER_1_INTV_VALUE 0x24 73 #define SUN4I_TIMER_1_VAL 0x28 74 75 #define SUN4I_WDT_BASE 0x01c20c90 76 #define SUN4I_WDT_SIZE 0x10 77 #define SUN4I_WDT_CTRL 0x00 78 #define SUN4I_WDT_CTRL_KEY (0x333 << 1) 79 #define SUN4I_WDT_CTRL_RESTART __BIT(0) 80 #define SUN4I_WDT_MODE 0x04 81 #define SUN4I_WDT_MODE_RST_EN __BIT(1) 82 #define SUN4I_WDT_MODE_EN __BIT(0) 83 84 #define SUN6I_WDT_BASE 0x01c20ca0 85 #define SUN6I_WDT_SIZE 0x20 86 #define SUN6I_WDT_CFG 0x14 87 #define SUN6I_WDT_CFG_SYS __BIT(0) 88 #define SUN6I_WDT_MODE 0x18 89 #define SUN6I_WDT_MODE_EN __BIT(0) 90 91 #define SUN9I_WDT_BASE 0x06000ca0 92 #define SUN9I_WDT_SIZE 0x20 93 #define SUN9I_WDT_CFG 0x14 94 #define SUN9I_WDT_CFG_SYS __BIT(0) 95 #define SUN9I_WDT_MODE 0x18 96 #define SUN9I_WDT_MODE_EN __BIT(0) 97 98 #define SUN50I_H6_WDT_BASE 0x01c20ca0 99 #define SUN50I_H6_WDT_SIZE 0x20 100 #define SUN50I_H6_WDT_CFG 0x14 101 #define SUN50I_H6_WDT_CFG_SYS __BIT(0) 102 #define SUN50I_H6_WDT_MODE 0x18 103 #define SUN50I_H6_WDT_MODE_EN __BIT(0) 104 105 extern struct bus_space armv7_generic_bs_tag; 106 extern struct bus_space armv7_generic_a4x_bs_tag; 107 extern struct arm32_bus_dma_tag armv7_generic_dma_tag; 108 109 static const struct pmap_devmap * 110 sunxi_platform_devmap(void) 111 { 112 static const struct pmap_devmap devmap[] = { 113 DEVMAP_ENTRY(SUNXI_CORE_VBASE, 114 SUNXI_CORE_PBASE, 115 SUNXI_CORE_SIZE), 116 DEVMAP_ENTRY_END 117 }; 118 119 return devmap; 120 } 121 122 static void 123 sunxi_platform_init_attach_args(struct fdt_attach_args *faa) 124 { 125 faa->faa_bst = &armv7_generic_bs_tag; 126 faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag; 127 faa->faa_dmat = &armv7_generic_dma_tag; 128 } 129 130 static void 131 sunxi_platform_early_putchar(char c) 132 { 133 #ifdef CONSADDR 134 #define CONSADDR_VA ((CONSADDR - SUNXI_CORE_PBASE) + SUNXI_CORE_VBASE) 135 volatile uint32_t *uartaddr = (volatile uint32_t *)CONSADDR_VA; 136 137 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0) 138 ; 139 140 uartaddr[com_data] = htole32(c); 141 #endif 142 } 143 144 static void 145 sunxi_platform_device_register(device_t self, void *aux) 146 { 147 prop_dictionary_t prop = device_properties(self); 148 149 if (device_is_a(self, "rgephy")) { 150 /* Pine64+ and NanoPi NEO Plus2 gigabit ethernet workaround */ 151 const char * compat[] = { 152 "pine64,pine64-plus", 153 "friendlyarm,nanopi-neo-plus2", 154 NULL 155 }; 156 if (of_match_compatible(OF_finddevice("/"), compat)) { 157 prop_dictionary_set_bool(prop, "no-rx-delay", true); 158 } 159 } 160 } 161 162 static u_int 163 sunxi_platform_uart_freq(void) 164 { 165 return SUNXI_REF_FREQ; 166 } 167 168 static void 169 sunxi_platform_bootstrap(void) 170 { 171 if (match_bootconf_option(boot_args, "console", "fb")) { 172 void *fdt_data = __UNCONST(fdtbus_get_data()); 173 const int chosen_off = fdt_path_offset(fdt_data, "/chosen"); 174 const int framebuffer_off = 175 fdt_path_offset(fdt_data, "/chosen/framebuffer"); 176 if (chosen_off >= 0 && framebuffer_off >= 0) 177 fdt_setprop_string(fdt_data, chosen_off, "stdout-path", 178 "/chosen/framebuffer"); 179 } 180 } 181 182 static void 183 sunxi_platform_psci_bootstrap(void) 184 { 185 psci_fdt_bootstrap(); 186 sunxi_platform_bootstrap(); 187 } 188 189 static void 190 sun4i_platform_reset(void) 191 { 192 bus_space_tag_t bst = &armv7_generic_bs_tag; 193 bus_space_handle_t bsh; 194 195 bus_space_map(bst, SUN4I_WDT_BASE, SUN4I_WDT_SIZE, 0, &bsh); 196 197 bus_space_write_4(bst, bsh, SUN4I_WDT_CTRL, 198 SUN4I_WDT_CTRL_KEY | SUN4I_WDT_CTRL_RESTART); 199 for (;;) { 200 bus_space_write_4(bst, bsh, SUN4I_WDT_MODE, 201 SUN4I_WDT_MODE_EN | SUN4I_WDT_MODE_RST_EN); 202 } 203 } 204 205 static void 206 sun4i_platform_delay(u_int n) 207 { 208 static bus_space_tag_t bst = &armv7_generic_bs_tag; 209 static bus_space_handle_t bsh = 0; 210 const long incs_per_us = SUNXI_REF_FREQ / 1000000; 211 long ticks = n * incs_per_us; 212 uint32_t cur, prev; 213 214 if (bsh == 0) { 215 bus_space_map(bst, SUN4I_TIMER_BASE, SUN4I_TIMER_SIZE, 0, &bsh); 216 217 /* Enable Timer 1 */ 218 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_INTV_VALUE, ~0U); 219 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_CTRL, 220 SUN4I_TIMER_1_CTRL_EN | 221 SUN4I_TIMER_1_CTRL_RELOAD | 222 __SHIFTIN(SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M, 223 SUN4I_TIMER_1_CTRL_CLK_SRC)); 224 } 225 226 prev = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 227 while (ticks > 0) { 228 cur = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 229 if (cur > prev) 230 ticks -= (cur - prev); 231 else 232 ticks -= (~0U - cur + prev); 233 prev = cur; 234 } 235 } 236 237 static void 238 sun6i_platform_reset(void) 239 { 240 bus_space_tag_t bst = &armv7_generic_bs_tag; 241 bus_space_handle_t bsh; 242 243 bus_space_map(bst, SUN6I_WDT_BASE, SUN6I_WDT_SIZE, 0, &bsh); 244 245 bus_space_write_4(bst, bsh, SUN6I_WDT_CFG, SUN6I_WDT_CFG_SYS); 246 bus_space_write_4(bst, bsh, SUN6I_WDT_MODE, SUN6I_WDT_MODE_EN); 247 } 248 249 static void 250 sun9i_platform_reset(void) 251 { 252 bus_space_tag_t bst = &armv7_generic_bs_tag; 253 bus_space_handle_t bsh; 254 255 bus_space_map(bst, SUN9I_WDT_BASE, SUN9I_WDT_SIZE, 0, &bsh); 256 257 bus_space_write_4(bst, bsh, SUN9I_WDT_CFG, SUN9I_WDT_CFG_SYS); 258 bus_space_write_4(bst, bsh, SUN9I_WDT_MODE, SUN9I_WDT_MODE_EN); 259 } 260 261 static void 262 sun50i_h6_platform_reset(void) 263 { 264 bus_space_tag_t bst = &armv7_generic_bs_tag; 265 bus_space_handle_t bsh; 266 267 bus_space_map(bst, SUN50I_H6_WDT_BASE, SUN50I_H6_WDT_SIZE, 0, &bsh); 268 269 bus_space_write_4(bst, bsh, SUN50I_H6_WDT_CFG, SUN50I_H6_WDT_CFG_SYS); 270 bus_space_write_4(bst, bsh, SUN50I_H6_WDT_MODE, SUN50I_H6_WDT_MODE_EN); 271 } 272 273 static const struct arm_platform sun4i_platform = { 274 .devmap = sunxi_platform_devmap, 275 .bootstrap = sunxi_platform_bootstrap, 276 .init_attach_args = sunxi_platform_init_attach_args, 277 .early_putchar = sunxi_platform_early_putchar, 278 .device_register = sunxi_platform_device_register, 279 .reset = sun4i_platform_reset, 280 .delay = sun4i_platform_delay, 281 .uart_freq = sunxi_platform_uart_freq, 282 }; 283 284 ARM_PLATFORM(sun4i_a10, "allwinner,sun4i-a10", &sun4i_platform); 285 286 static const struct arm_platform sun5i_platform = { 287 .devmap = sunxi_platform_devmap, 288 .bootstrap = sunxi_platform_bootstrap, 289 .init_attach_args = sunxi_platform_init_attach_args, 290 .early_putchar = sunxi_platform_early_putchar, 291 .device_register = sunxi_platform_device_register, 292 .reset = sun4i_platform_reset, 293 .delay = sun4i_platform_delay, 294 .uart_freq = sunxi_platform_uart_freq, 295 }; 296 297 ARM_PLATFORM(sun5i_a13, "allwinner,sun5i-a13", &sun5i_platform); 298 ARM_PLATFORM(sun5i_gr8, "nextthing,gr8", &sun5i_platform); 299 300 static const struct arm_platform sun6i_platform = { 301 .devmap = sunxi_platform_devmap, 302 .bootstrap = sunxi_platform_psci_bootstrap, 303 .init_attach_args = sunxi_platform_init_attach_args, 304 .early_putchar = sunxi_platform_early_putchar, 305 .device_register = sunxi_platform_device_register, 306 .reset = sun6i_platform_reset, 307 .delay = gtmr_delay, 308 .uart_freq = sunxi_platform_uart_freq, 309 }; 310 311 ARM_PLATFORM(sun6i_a31, "allwinner,sun6i-a31", &sun6i_platform); 312 313 static const struct arm_platform sun7i_platform = { 314 .devmap = sunxi_platform_devmap, 315 .bootstrap = sunxi_platform_psci_bootstrap, 316 .init_attach_args = sunxi_platform_init_attach_args, 317 .early_putchar = sunxi_platform_early_putchar, 318 .device_register = sunxi_platform_device_register, 319 .reset = sun4i_platform_reset, 320 .delay = sun4i_platform_delay, 321 .uart_freq = sunxi_platform_uart_freq, 322 }; 323 324 ARM_PLATFORM(sun7i_a20, "allwinner,sun7i-a20", &sun7i_platform); 325 326 static const struct arm_platform sun8i_platform = { 327 .devmap = sunxi_platform_devmap, 328 .bootstrap = sunxi_platform_psci_bootstrap, 329 .init_attach_args = sunxi_platform_init_attach_args, 330 .early_putchar = sunxi_platform_early_putchar, 331 .device_register = sunxi_platform_device_register, 332 .reset = sun6i_platform_reset, 333 .delay = gtmr_delay, 334 .uart_freq = sunxi_platform_uart_freq, 335 }; 336 337 ARM_PLATFORM(sun8i_h2plus, "allwinner,sun8i-h2-plus", &sun8i_platform); 338 ARM_PLATFORM(sun8i_h3, "allwinner,sun8i-h3", &sun8i_platform); 339 ARM_PLATFORM(sun8i_a83t, "allwinner,sun8i-a83t", &sun8i_platform); 340 341 static const struct arm_platform sun9i_platform = { 342 .devmap = sunxi_platform_devmap, 343 .bootstrap = sunxi_platform_bootstrap, 344 .init_attach_args = sunxi_platform_init_attach_args, 345 .early_putchar = sunxi_platform_early_putchar, 346 .device_register = sunxi_platform_device_register, 347 .reset = sun9i_platform_reset, 348 .delay = gtmr_delay, 349 .uart_freq = sunxi_platform_uart_freq, 350 }; 351 352 ARM_PLATFORM(sun9i_a80, "allwinner,sun9i-a80", &sun9i_platform); 353 354 static const struct arm_platform sun50i_platform = { 355 .devmap = sunxi_platform_devmap, 356 .bootstrap = sunxi_platform_bootstrap, 357 .init_attach_args = sunxi_platform_init_attach_args, 358 .early_putchar = sunxi_platform_early_putchar, 359 .device_register = sunxi_platform_device_register, 360 .reset = sun6i_platform_reset, 361 .delay = gtmr_delay, 362 .uart_freq = sunxi_platform_uart_freq, 363 }; 364 365 ARM_PLATFORM(sun50i_a64, "allwinner,sun50i-a64", &sun50i_platform); 366 ARM_PLATFORM(sun50i_h5, "allwinner,sun50i-h5", &sun50i_platform); 367 368 static const struct arm_platform sun50i_h6_platform = { 369 .devmap = sunxi_platform_devmap, 370 .bootstrap = sunxi_platform_bootstrap, 371 .init_attach_args = sunxi_platform_init_attach_args, 372 .early_putchar = sunxi_platform_early_putchar, 373 .device_register = sunxi_platform_device_register, 374 .reset = sun50i_h6_platform_reset, 375 .delay = gtmr_delay, 376 .uart_freq = sunxi_platform_uart_freq, 377 }; 378 379 ARM_PLATFORM(sun50i_h6, "allwinner,sun50i-h6", &sun50i_h6_platform); 380
Indexes created Tue Sep 23 07:09:52 GMT 2025