sunxi_platform.c revision 1.22
1 /* $NetBSD: sunxi_platform.c,v 1.22 2018/04/01 04:35:04 ryo Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_soc.h" 30 #include "opt_multiprocessor.h" 31 #include "opt_fdt_arm.h" 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.22 2018/04/01 04:35:04 ryo Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/cpu.h> 39 #include <sys/device.h> 40 #include <sys/termios.h> 41 42 #include <dev/fdt/fdtvar.h> 43 #include <arm/fdt/arm_fdtvar.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/bootconfig.h> 48 #include <arm/cpufunc.h> 49 50 #include <arm/cortex/gtmr_var.h> 51 #include <arm/cortex/gic_reg.h> 52 53 #include <dev/ic/ns16550reg.h> 54 #include <dev/ic/comreg.h> 55 56 #include <arm/arm/psci.h> 57 #include <arm/fdt/psci_fdt.h> 58 59 #include <arm/sunxi/sunxi_platform.h> 60 61 #include <libfdt.h> 62 63 #define SUNXI_REF_FREQ 24000000 64 65 #define SUN4I_TIMER_BASE 0x01c20c00 66 #define SUN4I_TIMER_SIZE 0x90 67 #define SUN4I_TIMER_1_CTRL 0x20 68 #define SUN4I_TIMER_1_CTRL_CLK_SRC __BITS(3,2) 69 #define SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M 1 70 #define SUN4I_TIMER_1_CTRL_RELOAD __BIT(1) 71 #define SUN4I_TIMER_1_CTRL_EN __BIT(0) 72 #define SUN4I_TIMER_1_INTV_VALUE 0x24 73 #define SUN4I_TIMER_1_VAL 0x28 74 75 #define SUN4I_WDT_BASE 0x01c20c90 76 #define SUN4I_WDT_SIZE 0x10 77 #define SUN4I_WDT_CTRL 0x00 78 #define SUN4I_WDT_CTRL_KEY (0x333 << 1) 79 #define SUN4I_WDT_CTRL_RESTART __BIT(0) 80 #define SUN4I_WDT_MODE 0x04 81 #define SUN4I_WDT_MODE_RST_EN __BIT(1) 82 #define SUN4I_WDT_MODE_EN __BIT(0) 83 84 #define SUN6I_WDT_BASE 0x01c20ca0 85 #define SUN6I_WDT_SIZE 0x20 86 #define SUN6I_WDT_CFG 0x14 87 #define SUN6I_WDT_CFG_SYS __BIT(0) 88 #define SUN6I_WDT_MODE 0x18 89 #define SUN6I_WDT_MODE_EN __BIT(0) 90 91 #define SUN9I_WDT_BASE 0x06000ca0 92 #define SUN9I_WDT_SIZE 0x20 93 #define SUN9I_WDT_CFG 0x14 94 #define SUN9I_WDT_CFG_SYS __BIT(0) 95 #define SUN9I_WDT_MODE 0x18 96 #define SUN9I_WDT_MODE_EN __BIT(0) 97 98 #define SUN50I_H6_WDT_BASE 0x01c20ca0 99 #define SUN50I_H6_WDT_SIZE 0x20 100 #define SUN50I_H6_WDT_CFG 0x14 101 #define SUN50I_H6_WDT_CFG_SYS __BIT(0) 102 #define SUN50I_H6_WDT_MODE 0x18 103 #define SUN50I_H6_WDT_MODE_EN __BIT(0) 104 105 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 106 extern struct bus_space arm_generic_bs_tag; 107 extern struct bus_space arm_generic_a4x_bs_tag; 108 109 #define sunxi_dma_tag arm_generic_dma_tag 110 #define sunxi_bs_tag arm_generic_bs_tag 111 #define sunxi_a4x_bs_tag arm_generic_a4x_bs_tag 112 113 static const struct pmap_devmap * 114 sunxi_platform_devmap(void) 115 { 116 static const struct pmap_devmap devmap[] = { 117 DEVMAP_ENTRY(SUNXI_CORE_VBASE, 118 SUNXI_CORE_PBASE, 119 SUNXI_CORE_SIZE), 120 DEVMAP_ENTRY_END 121 }; 122 123 return devmap; 124 } 125 126 static void 127 sunxi_platform_init_attach_args(struct fdt_attach_args *faa) 128 { 129 faa->faa_bst = &sunxi_bs_tag; 130 faa->faa_a4x_bst = &sunxi_a4x_bs_tag; 131 faa->faa_dmat = &sunxi_dma_tag; 132 } 133 134 void sunxi_platform_early_putchar(char); 135 136 void 137 sunxi_platform_early_putchar(char c) 138 { 139 #ifdef CONSADDR 140 #define CONSADDR_VA ((CONSADDR - SUNXI_CORE_PBASE) + SUNXI_CORE_VBASE) 141 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? 142 (volatile uint32_t *)CONSADDR_VA : 143 (volatile uint32_t *)CONSADDR; 144 145 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0) 146 ; 147 148 uartaddr[com_data] = htole32(c); 149 #endif 150 } 151 152 static void 153 sunxi_platform_device_register(device_t self, void *aux) 154 { 155 prop_dictionary_t prop = device_properties(self); 156 157 if (device_is_a(self, "rgephy")) { 158 /* Pine64+ and NanoPi NEO Plus2 gigabit ethernet workaround */ 159 const char * compat[] = { 160 "pine64,pine64-plus", 161 "friendlyarm,nanopi-neo-plus2", 162 NULL 163 }; 164 if (of_match_compatible(OF_finddevice("/"), compat)) { 165 prop_dictionary_set_bool(prop, "no-rx-delay", true); 166 } 167 } 168 } 169 170 static u_int 171 sunxi_platform_uart_freq(void) 172 { 173 return SUNXI_REF_FREQ; 174 } 175 176 static void 177 sunxi_platform_bootstrap(void) 178 { 179 if (match_bootconf_option(boot_args, "console", "fb")) { 180 void *fdt_data = __UNCONST(fdtbus_get_data()); 181 const int chosen_off = fdt_path_offset(fdt_data, "/chosen"); 182 const int framebuffer_off = 183 fdt_path_offset(fdt_data, "/chosen/framebuffer"); 184 if (chosen_off >= 0 && framebuffer_off >= 0) { 185 const char *status = fdt_getprop(fdt_data, 186 framebuffer_off, "status", NULL); 187 if (status == NULL || strncmp(status, "ok", 2) == 0) { 188 fdt_setprop_string(fdt_data, chosen_off, 189 "stdout-path", "/chosen/framebuffer"); 190 } 191 } 192 } 193 } 194 195 static void 196 sunxi_platform_psci_bootstrap(void) 197 { 198 psci_fdt_bootstrap(); 199 sunxi_platform_bootstrap(); 200 } 201 202 static void 203 sun4i_platform_reset(void) 204 { 205 bus_space_tag_t bst = &sunxi_bs_tag; 206 bus_space_handle_t bsh; 207 208 bus_space_map(bst, SUN4I_WDT_BASE, SUN4I_WDT_SIZE, 0, &bsh); 209 210 bus_space_write_4(bst, bsh, SUN4I_WDT_CTRL, 211 SUN4I_WDT_CTRL_KEY | SUN4I_WDT_CTRL_RESTART); 212 for (;;) { 213 bus_space_write_4(bst, bsh, SUN4I_WDT_MODE, 214 SUN4I_WDT_MODE_EN | SUN4I_WDT_MODE_RST_EN); 215 } 216 } 217 218 static void 219 sun4i_platform_delay(u_int n) 220 { 221 static bus_space_tag_t bst = &sunxi_bs_tag; 222 static bus_space_handle_t bsh = 0; 223 const long incs_per_us = SUNXI_REF_FREQ / 1000000; 224 long ticks = n * incs_per_us; 225 uint32_t cur, prev; 226 227 if (bsh == 0) { 228 bus_space_map(bst, SUN4I_TIMER_BASE, SUN4I_TIMER_SIZE, 0, &bsh); 229 230 /* Enable Timer 1 */ 231 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_INTV_VALUE, ~0U); 232 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_CTRL, 233 SUN4I_TIMER_1_CTRL_EN | 234 SUN4I_TIMER_1_CTRL_RELOAD | 235 __SHIFTIN(SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M, 236 SUN4I_TIMER_1_CTRL_CLK_SRC)); 237 } 238 239 prev = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 240 while (ticks > 0) { 241 cur = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 242 if (cur > prev) 243 ticks -= (cur - prev); 244 else 245 ticks -= (~0U - cur + prev); 246 prev = cur; 247 } 248 } 249 250 static void 251 sun6i_platform_reset(void) 252 { 253 bus_space_tag_t bst = &sunxi_bs_tag; 254 bus_space_handle_t bsh; 255 256 bus_space_map(bst, SUN6I_WDT_BASE, SUN6I_WDT_SIZE, 0, &bsh); 257 258 bus_space_write_4(bst, bsh, SUN6I_WDT_CFG, SUN6I_WDT_CFG_SYS); 259 bus_space_write_4(bst, bsh, SUN6I_WDT_MODE, SUN6I_WDT_MODE_EN); 260 } 261 262 static void 263 sun9i_platform_reset(void) 264 { 265 bus_space_tag_t bst = &sunxi_bs_tag; 266 bus_space_handle_t bsh; 267 268 bus_space_map(bst, SUN9I_WDT_BASE, SUN9I_WDT_SIZE, 0, &bsh); 269 270 bus_space_write_4(bst, bsh, SUN9I_WDT_CFG, SUN9I_WDT_CFG_SYS); 271 bus_space_write_4(bst, bsh, SUN9I_WDT_MODE, SUN9I_WDT_MODE_EN); 272 } 273 274 static void 275 sun50i_h6_platform_reset(void) 276 { 277 bus_space_tag_t bst = &sunxi_bs_tag; 278 bus_space_handle_t bsh; 279 280 bus_space_map(bst, SUN50I_H6_WDT_BASE, SUN50I_H6_WDT_SIZE, 0, &bsh); 281 282 bus_space_write_4(bst, bsh, SUN50I_H6_WDT_CFG, SUN50I_H6_WDT_CFG_SYS); 283 bus_space_write_4(bst, bsh, SUN50I_H6_WDT_MODE, SUN50I_H6_WDT_MODE_EN); 284 } 285 286 static const struct arm_platform sun4i_platform = { 287 .devmap = sunxi_platform_devmap, 288 .bootstrap = sunxi_platform_bootstrap, 289 .init_attach_args = sunxi_platform_init_attach_args, 290 .early_putchar = sunxi_platform_early_putchar, 291 .device_register = sunxi_platform_device_register, 292 .reset = sun4i_platform_reset, 293 .delay = sun4i_platform_delay, 294 .uart_freq = sunxi_platform_uart_freq, 295 }; 296 297 ARM_PLATFORM(sun4i_a10, "allwinner,sun4i-a10", &sun4i_platform); 298 299 static const struct arm_platform sun5i_platform = { 300 .devmap = sunxi_platform_devmap, 301 .bootstrap = sunxi_platform_bootstrap, 302 .init_attach_args = sunxi_platform_init_attach_args, 303 .early_putchar = sunxi_platform_early_putchar, 304 .device_register = sunxi_platform_device_register, 305 .reset = sun4i_platform_reset, 306 .delay = sun4i_platform_delay, 307 .uart_freq = sunxi_platform_uart_freq, 308 }; 309 310 ARM_PLATFORM(sun5i_a13, "allwinner,sun5i-a13", &sun5i_platform); 311 ARM_PLATFORM(sun5i_gr8, "nextthing,gr8", &sun5i_platform); 312 313 static const struct arm_platform sun6i_platform = { 314 .devmap = sunxi_platform_devmap, 315 .bootstrap = sunxi_platform_psci_bootstrap, 316 .init_attach_args = sunxi_platform_init_attach_args, 317 .early_putchar = sunxi_platform_early_putchar, 318 .device_register = sunxi_platform_device_register, 319 .reset = sun6i_platform_reset, 320 .delay = gtmr_delay, 321 .uart_freq = sunxi_platform_uart_freq, 322 }; 323 324 ARM_PLATFORM(sun6i_a31, "allwinner,sun6i-a31", &sun6i_platform); 325 326 static const struct arm_platform sun7i_platform = { 327 .devmap = sunxi_platform_devmap, 328 .bootstrap = sunxi_platform_psci_bootstrap, 329 .init_attach_args = sunxi_platform_init_attach_args, 330 .early_putchar = sunxi_platform_early_putchar, 331 .device_register = sunxi_platform_device_register, 332 .reset = sun4i_platform_reset, 333 .delay = sun4i_platform_delay, 334 .uart_freq = sunxi_platform_uart_freq, 335 }; 336 337 ARM_PLATFORM(sun7i_a20, "allwinner,sun7i-a20", &sun7i_platform); 338 339 static const struct arm_platform sun8i_platform = { 340 .devmap = sunxi_platform_devmap, 341 .bootstrap = sunxi_platform_psci_bootstrap, 342 .init_attach_args = sunxi_platform_init_attach_args, 343 .early_putchar = sunxi_platform_early_putchar, 344 .device_register = sunxi_platform_device_register, 345 .reset = sun6i_platform_reset, 346 .delay = gtmr_delay, 347 .uart_freq = sunxi_platform_uart_freq, 348 }; 349 350 ARM_PLATFORM(sun8i_h2plus, "allwinner,sun8i-h2-plus", &sun8i_platform); 351 ARM_PLATFORM(sun8i_h3, "allwinner,sun8i-h3", &sun8i_platform); 352 ARM_PLATFORM(sun8i_a83t, "allwinner,sun8i-a83t", &sun8i_platform); 353 354 static const struct arm_platform sun9i_platform = { 355 .devmap = sunxi_platform_devmap, 356 .bootstrap = sunxi_platform_bootstrap, 357 .init_attach_args = sunxi_platform_init_attach_args, 358 .early_putchar = sunxi_platform_early_putchar, 359 .device_register = sunxi_platform_device_register, 360 .reset = sun9i_platform_reset, 361 .delay = gtmr_delay, 362 .uart_freq = sunxi_platform_uart_freq, 363 }; 364 365 ARM_PLATFORM(sun9i_a80, "allwinner,sun9i-a80", &sun9i_platform); 366 367 static const struct arm_platform sun50i_platform = { 368 .devmap = sunxi_platform_devmap, 369 .bootstrap = sunxi_platform_bootstrap, 370 .init_attach_args = sunxi_platform_init_attach_args, 371 .early_putchar = sunxi_platform_early_putchar, 372 .device_register = sunxi_platform_device_register, 373 .reset = sun6i_platform_reset, 374 .delay = gtmr_delay, 375 .uart_freq = sunxi_platform_uart_freq, 376 }; 377 378 ARM_PLATFORM(sun50i_a64, "allwinner,sun50i-a64", &sun50i_platform); 379 ARM_PLATFORM(sun50i_h5, "allwinner,sun50i-h5", &sun50i_platform); 380 381 static const struct arm_platform sun50i_h6_platform = { 382 .devmap = sunxi_platform_devmap, 383 .bootstrap = sunxi_platform_bootstrap, 384 .init_attach_args = sunxi_platform_init_attach_args, 385 .early_putchar = sunxi_platform_early_putchar, 386 .device_register = sunxi_platform_device_register, 387 .reset = sun50i_h6_platform_reset, 388 .delay = gtmr_delay, 389 .uart_freq = sunxi_platform_uart_freq, 390 }; 391 392 ARM_PLATFORM(sun50i_h6, "allwinner,sun50i-h6", &sun50i_h6_platform); 393
Indexes created Thu Sep 25 16:09:42 GMT 2025