sunxi_platform.c revision 1.25
1 /* $NetBSD: sunxi_platform.c,v 1.25 2018/08/05 14:02:35 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_soc.h" 30 #include "opt_multiprocessor.h" 31 #include "opt_fdt_arm.h" 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.25 2018/08/05 14:02:35 skrll Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/cpu.h> 39 #include <sys/device.h> 40 #include <sys/termios.h> 41 42 #include <dev/fdt/fdtvar.h> 43 #include <arm/fdt/arm_fdtvar.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/bootconfig.h> 48 #include <arm/cpufunc.h> 49 50 #include <arm/cortex/gtmr_var.h> 51 #include <arm/cortex/gic_reg.h> 52 53 #include <dev/ic/ns16550reg.h> 54 #include <dev/ic/comreg.h> 55 56 #include <arm/arm/psci.h> 57 #include <arm/fdt/psci_fdt.h> 58 59 #include <arm/sunxi/sunxi_platform.h> 60 61 #include <libfdt.h> 62 63 #define SUNXI_REF_FREQ 24000000 64 65 #define SUN4I_TIMER_BASE 0x01c20c00 66 #define SUN4I_TIMER_SIZE 0x90 67 #define SUN4I_TIMER_1_CTRL 0x20 68 #define SUN4I_TIMER_1_CTRL_CLK_SRC __BITS(3,2) 69 #define SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M 1 70 #define SUN4I_TIMER_1_CTRL_RELOAD __BIT(1) 71 #define SUN4I_TIMER_1_CTRL_EN __BIT(0) 72 #define SUN4I_TIMER_1_INTV_VALUE 0x24 73 #define SUN4I_TIMER_1_VAL 0x28 74 75 #define SUN4I_WDT_BASE 0x01c20c90 76 #define SUN4I_WDT_SIZE 0x10 77 #define SUN4I_WDT_CTRL 0x00 78 #define SUN4I_WDT_CTRL_KEY (0x333 << 1) 79 #define SUN4I_WDT_CTRL_RESTART __BIT(0) 80 #define SUN4I_WDT_MODE 0x04 81 #define SUN4I_WDT_MODE_RST_EN __BIT(1) 82 #define SUN4I_WDT_MODE_EN __BIT(0) 83 84 #define SUN6I_WDT_BASE 0x01c20ca0 85 #define SUN6I_WDT_SIZE 0x20 86 #define SUN6I_WDT_CFG 0x14 87 #define SUN6I_WDT_CFG_SYS __BIT(0) 88 #define SUN6I_WDT_MODE 0x18 89 #define SUN6I_WDT_MODE_EN __BIT(0) 90 91 #define SUN9I_WDT_BASE 0x06000ca0 92 #define SUN9I_WDT_SIZE 0x20 93 #define SUN9I_WDT_CFG 0x14 94 #define SUN9I_WDT_CFG_SYS __BIT(0) 95 #define SUN9I_WDT_MODE 0x18 96 #define SUN9I_WDT_MODE_EN __BIT(0) 97 98 #define SUN50I_H6_WDT_BASE 0x01c20ca0 99 #define SUN50I_H6_WDT_SIZE 0x20 100 #define SUN50I_H6_WDT_CFG 0x14 101 #define SUN50I_H6_WDT_CFG_SYS __BIT(0) 102 #define SUN50I_H6_WDT_MODE 0x18 103 #define SUN50I_H6_WDT_MODE_EN __BIT(0) 104 105 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 106 extern struct bus_space arm_generic_bs_tag; 107 extern struct bus_space arm_generic_a4x_bs_tag; 108 109 #define sunxi_dma_tag arm_generic_dma_tag 110 #define sunxi_bs_tag arm_generic_bs_tag 111 #define sunxi_a4x_bs_tag arm_generic_a4x_bs_tag 112 113 static const struct pmap_devmap * 114 sunxi_platform_devmap(void) 115 { 116 static const struct pmap_devmap devmap[] = { 117 DEVMAP_ENTRY(SUNXI_CORE_VBASE, 118 SUNXI_CORE_PBASE, 119 SUNXI_CORE_SIZE), 120 DEVMAP_ENTRY_END 121 }; 122 123 return devmap; 124 } 125 126 static void 127 sunxi_platform_init_attach_args(struct fdt_attach_args *faa) 128 { 129 faa->faa_bst = &sunxi_bs_tag; 130 faa->faa_a4x_bst = &sunxi_a4x_bs_tag; 131 faa->faa_dmat = &sunxi_dma_tag; 132 } 133 134 void sunxi_platform_early_putchar(char); 135 136 void 137 sunxi_platform_early_putchar(char c) 138 { 139 #ifdef CONSADDR 140 #define CONSADDR_VA ((CONSADDR - SUNXI_CORE_PBASE) + SUNXI_CORE_VBASE) 141 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? 142 (volatile uint32_t *)CONSADDR_VA : 143 (volatile uint32_t *)CONSADDR; 144 145 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0) 146 ; 147 148 uartaddr[com_data] = htole32(c); 149 #endif 150 } 151 152 static void 153 sunxi_platform_device_register(device_t self, void *aux) 154 { 155 prop_dictionary_t prop = device_properties(self); 156 157 if (device_is_a(self, "rgephy")) { 158 /* Pine64+ and NanoPi NEO Plus2 gigabit ethernet workaround */ 159 const char * compat[] = { 160 "pine64,pine64-plus", 161 "friendlyarm,nanopi-neo-plus2", 162 NULL 163 }; 164 if (of_match_compatible(OF_finddevice("/"), compat)) { 165 prop_dictionary_set_bool(prop, "no-rx-delay", true); 166 } 167 } 168 } 169 170 static u_int 171 sunxi_platform_uart_freq(void) 172 { 173 return SUNXI_REF_FREQ; 174 } 175 176 static void 177 sunxi_platform_bootstrap(void) 178 { 179 void *fdt_data = __UNCONST(fdtbus_get_data()); 180 const int chosen_off = fdt_path_offset(fdt_data, "/chosen"); 181 if (chosen_off < 0) 182 return; 183 184 if (match_bootconf_option(boot_args, "console", "fb")) { 185 const int framebuffer_off = 186 fdt_path_offset(fdt_data, "/chosen/framebuffer"); 187 if (framebuffer_off >= 0) { 188 const char *status = fdt_getprop(fdt_data, 189 framebuffer_off, "status", NULL); 190 if (status == NULL || strncmp(status, "ok", 2) == 0) { 191 fdt_setprop_string(fdt_data, chosen_off, 192 "stdout-path", "/chosen/framebuffer"); 193 } 194 } 195 } else if (match_bootconf_option(boot_args, "console", "serial")) { 196 fdt_setprop_string(fdt_data, chosen_off, 197 "stdout-path", "serial0:115200n8"); 198 } 199 } 200 201 static void 202 sunxi_platform_psci_bootstrap(void) 203 { 204 psci_fdt_bootstrap(); 205 sunxi_platform_bootstrap(); 206 } 207 208 static void 209 sun4i_platform_reset(void) 210 { 211 bus_space_tag_t bst = &sunxi_bs_tag; 212 bus_space_handle_t bsh; 213 214 bus_space_map(bst, SUN4I_WDT_BASE, SUN4I_WDT_SIZE, 0, &bsh); 215 216 bus_space_write_4(bst, bsh, SUN4I_WDT_CTRL, 217 SUN4I_WDT_CTRL_KEY | SUN4I_WDT_CTRL_RESTART); 218 for (;;) { 219 bus_space_write_4(bst, bsh, SUN4I_WDT_MODE, 220 SUN4I_WDT_MODE_EN | SUN4I_WDT_MODE_RST_EN); 221 } 222 } 223 224 static void 225 sun4i_platform_delay(u_int n) 226 { 227 static bus_space_tag_t bst = &sunxi_bs_tag; 228 static bus_space_handle_t bsh = 0; 229 const long incs_per_us = SUNXI_REF_FREQ / 1000000; 230 long ticks = n * incs_per_us; 231 uint32_t cur, prev; 232 233 if (bsh == 0) { 234 bus_space_map(bst, SUN4I_TIMER_BASE, SUN4I_TIMER_SIZE, 0, &bsh); 235 236 /* Enable Timer 1 */ 237 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_INTV_VALUE, ~0U); 238 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_CTRL, 239 SUN4I_TIMER_1_CTRL_EN | 240 SUN4I_TIMER_1_CTRL_RELOAD | 241 __SHIFTIN(SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M, 242 SUN4I_TIMER_1_CTRL_CLK_SRC)); 243 } 244 245 prev = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 246 while (ticks > 0) { 247 cur = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 248 if (cur > prev) 249 ticks -= (cur - prev); 250 else 251 ticks -= (~0U - cur + prev); 252 prev = cur; 253 } 254 } 255 256 static void 257 sun6i_platform_reset(void) 258 { 259 bus_space_tag_t bst = &sunxi_bs_tag; 260 bus_space_handle_t bsh; 261 262 bus_space_map(bst, SUN6I_WDT_BASE, SUN6I_WDT_SIZE, 0, &bsh); 263 264 bus_space_write_4(bst, bsh, SUN6I_WDT_CFG, SUN6I_WDT_CFG_SYS); 265 bus_space_write_4(bst, bsh, SUN6I_WDT_MODE, SUN6I_WDT_MODE_EN); 266 } 267 268 static void 269 sun9i_platform_reset(void) 270 { 271 bus_space_tag_t bst = &sunxi_bs_tag; 272 bus_space_handle_t bsh; 273 274 bus_space_map(bst, SUN9I_WDT_BASE, SUN9I_WDT_SIZE, 0, &bsh); 275 276 bus_space_write_4(bst, bsh, SUN9I_WDT_CFG, SUN9I_WDT_CFG_SYS); 277 bus_space_write_4(bst, bsh, SUN9I_WDT_MODE, SUN9I_WDT_MODE_EN); 278 } 279 280 static void 281 sun50i_h6_platform_reset(void) 282 { 283 bus_space_tag_t bst = &sunxi_bs_tag; 284 bus_space_handle_t bsh; 285 286 bus_space_map(bst, SUN50I_H6_WDT_BASE, SUN50I_H6_WDT_SIZE, 0, &bsh); 287 288 bus_space_write_4(bst, bsh, SUN50I_H6_WDT_CFG, SUN50I_H6_WDT_CFG_SYS); 289 bus_space_write_4(bst, bsh, SUN50I_H6_WDT_MODE, SUN50I_H6_WDT_MODE_EN); 290 } 291 292 static const struct arm_platform sun4i_platform = { 293 .ap_devmap = sunxi_platform_devmap, 294 .ap_bootstrap = sunxi_platform_bootstrap, 295 .ap_init_attach_args = sunxi_platform_init_attach_args, 296 .ap_early_putchar = sunxi_platform_early_putchar, 297 .ap_device_register = sunxi_platform_device_register, 298 .ap_reset = sun4i_platform_reset, 299 .ap_delay = sun4i_platform_delay, 300 .ap_uart_freq = sunxi_platform_uart_freq, 301 }; 302 303 ARM_PLATFORM(sun4i_a10, "allwinner,sun4i-a10", &sun4i_platform); 304 305 static const struct arm_platform sun5i_platform = { 306 .ap_devmap = sunxi_platform_devmap, 307 .ap_bootstrap = sunxi_platform_bootstrap, 308 .ap_init_attach_args = sunxi_platform_init_attach_args, 309 .ap_early_putchar = sunxi_platform_early_putchar, 310 .ap_device_register = sunxi_platform_device_register, 311 .ap_reset = sun4i_platform_reset, 312 .ap_delay = sun4i_platform_delay, 313 .ap_uart_freq = sunxi_platform_uart_freq, 314 }; 315 316 ARM_PLATFORM(sun5i_a13, "allwinner,sun5i-a13", &sun5i_platform); 317 ARM_PLATFORM(sun5i_gr8, "nextthing,gr8", &sun5i_platform); 318 319 static const struct arm_platform sun6i_platform = { 320 .ap_devmap = sunxi_platform_devmap, 321 .ap_bootstrap = sunxi_platform_psci_bootstrap, 322 .ap_init_attach_args = sunxi_platform_init_attach_args, 323 .ap_early_putchar = sunxi_platform_early_putchar, 324 .ap_device_register = sunxi_platform_device_register, 325 .ap_reset = sun6i_platform_reset, 326 .ap_delay = gtmr_delay, 327 .ap_uart_freq = sunxi_platform_uart_freq, 328 }; 329 330 ARM_PLATFORM(sun6i_a31, "allwinner,sun6i-a31", &sun6i_platform); 331 332 static const struct arm_platform sun7i_platform = { 333 .ap_devmap = sunxi_platform_devmap, 334 .ap_bootstrap = sunxi_platform_psci_bootstrap, 335 .ap_init_attach_args = sunxi_platform_init_attach_args, 336 .ap_early_putchar = sunxi_platform_early_putchar, 337 .ap_device_register = sunxi_platform_device_register, 338 .ap_reset = sun4i_platform_reset, 339 .ap_delay = sun4i_platform_delay, 340 .ap_uart_freq = sunxi_platform_uart_freq, 341 }; 342 343 ARM_PLATFORM(sun7i_a20, "allwinner,sun7i-a20", &sun7i_platform); 344 345 static const struct arm_platform sun8i_platform = { 346 .ap_devmap = sunxi_platform_devmap, 347 .ap_bootstrap = sunxi_platform_psci_bootstrap, 348 .ap_init_attach_args = sunxi_platform_init_attach_args, 349 .ap_early_putchar = sunxi_platform_early_putchar, 350 .ap_device_register = sunxi_platform_device_register, 351 .ap_reset = sun6i_platform_reset, 352 .ap_delay = gtmr_delay, 353 .ap_uart_freq = sunxi_platform_uart_freq, 354 }; 355 356 ARM_PLATFORM(sun8i_h2plus, "allwinner,sun8i-h2-plus", &sun8i_platform); 357 ARM_PLATFORM(sun8i_h3, "allwinner,sun8i-h3", &sun8i_platform); 358 ARM_PLATFORM(sun8i_a83t, "allwinner,sun8i-a83t", &sun8i_platform); 359 360 static const struct arm_platform sun9i_platform = { 361 .ap_devmap = sunxi_platform_devmap, 362 .ap_bootstrap = sunxi_platform_bootstrap, 363 .ap_init_attach_args = sunxi_platform_init_attach_args, 364 .ap_early_putchar = sunxi_platform_early_putchar, 365 .ap_device_register = sunxi_platform_device_register, 366 .ap_reset = sun9i_platform_reset, 367 .ap_delay = gtmr_delay, 368 .ap_uart_freq = sunxi_platform_uart_freq, 369 }; 370 371 ARM_PLATFORM(sun9i_a80, "allwinner,sun9i-a80", &sun9i_platform); 372 373 static const struct arm_platform sun50i_platform = { 374 .ap_devmap = sunxi_platform_devmap, 375 .ap_bootstrap = sunxi_platform_psci_bootstrap, 376 .ap_init_attach_args = sunxi_platform_init_attach_args, 377 .ap_early_putchar = sunxi_platform_early_putchar, 378 .ap_device_register = sunxi_platform_device_register, 379 .ap_reset = sun6i_platform_reset, 380 .ap_delay = gtmr_delay, 381 .ap_uart_freq = sunxi_platform_uart_freq, 382 }; 383 384 ARM_PLATFORM(sun50i_a64, "allwinner,sun50i-a64", &sun50i_platform); 385 ARM_PLATFORM(sun50i_h5, "allwinner,sun50i-h5", &sun50i_platform); 386 387 static const struct arm_platform sun50i_h6_platform = { 388 .ap_devmap = sunxi_platform_devmap, 389 .ap_bootstrap = sunxi_platform_psci_bootstrap, 390 .ap_init_attach_args = sunxi_platform_init_attach_args, 391 .ap_early_putchar = sunxi_platform_early_putchar, 392 .ap_device_register = sunxi_platform_device_register, 393 .ap_reset = sun50i_h6_platform_reset, 394 .ap_delay = gtmr_delay, 395 .ap_uart_freq = sunxi_platform_uart_freq, 396 }; 397 398 ARM_PLATFORM(sun50i_h6, "allwinner,sun50i-h6", &sun50i_h6_platform); 399
Indexes created Thu Sep 25 16:09:42 GMT 2025