sunxi_platform.c revision 1.33
1 /* $NetBSD: sunxi_platform.c,v 1.33 2019/01/03 12:52:40 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_soc.h" 30 #include "opt_multiprocessor.h" 31 #include "opt_console.h" 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.33 2019/01/03 12:52:40 jmcneill Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/cpu.h> 39 #include <sys/device.h> 40 #include <sys/termios.h> 41 42 #include <dev/fdt/fdtvar.h> 43 #include <arm/fdt/arm_fdtvar.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/bootconfig.h> 48 #include <arm/cpufunc.h> 49 50 #include <arm/cortex/gtmr_var.h> 51 #include <arm/cortex/gic_reg.h> 52 53 #include <dev/ic/ns16550reg.h> 54 #include <dev/ic/comreg.h> 55 56 #include <arm/arm/psci.h> 57 #include <arm/fdt/psci_fdtvar.h> 58 59 #include <arm/sunxi/sunxi_platform.h> 60 61 #if defined(SOC_SUNXI_MC) 62 #include <arm/sunxi/sunxi_mc_smp.h> 63 #endif 64 65 #include <libfdt.h> 66 67 #define SUNXI_REF_FREQ 24000000 68 69 #define SUN4I_TIMER_BASE 0x01c20c00 70 #define SUN4I_TIMER_SIZE 0x90 71 #define SUN4I_TIMER_1_CTRL 0x20 72 #define SUN4I_TIMER_1_CTRL_CLK_SRC __BITS(3,2) 73 #define SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M 1 74 #define SUN4I_TIMER_1_CTRL_RELOAD __BIT(1) 75 #define SUN4I_TIMER_1_CTRL_EN __BIT(0) 76 #define SUN4I_TIMER_1_INTV_VALUE 0x24 77 #define SUN4I_TIMER_1_VAL 0x28 78 79 #define SUN4I_WDT_BASE 0x01c20c90 80 #define SUN4I_WDT_SIZE 0x10 81 #define SUN4I_WDT_CTRL 0x00 82 #define SUN4I_WDT_CTRL_KEY (0x333 << 1) 83 #define SUN4I_WDT_CTRL_RESTART __BIT(0) 84 #define SUN4I_WDT_MODE 0x04 85 #define SUN4I_WDT_MODE_RST_EN __BIT(1) 86 #define SUN4I_WDT_MODE_EN __BIT(0) 87 88 #define SUN6I_WDT_BASE 0x01c20ca0 89 #define SUN6I_WDT_SIZE 0x20 90 #define SUN6I_WDT_CFG 0x14 91 #define SUN6I_WDT_CFG_SYS __BIT(0) 92 #define SUN6I_WDT_MODE 0x18 93 #define SUN6I_WDT_MODE_EN __BIT(0) 94 95 #define SUN9I_WDT_BASE 0x06000ca0 96 #define SUN9I_WDT_SIZE 0x20 97 #define SUN9I_WDT_CFG 0x14 98 #define SUN9I_WDT_CFG_SYS __BIT(0) 99 #define SUN9I_WDT_MODE 0x18 100 #define SUN9I_WDT_MODE_EN __BIT(0) 101 102 #define SUN50I_H6_WDT_BASE 0x01c20ca0 103 #define SUN50I_H6_WDT_SIZE 0x20 104 #define SUN50I_H6_WDT_CFG 0x14 105 #define SUN50I_H6_WDT_CFG_SYS __BIT(0) 106 #define SUN50I_H6_WDT_MODE 0x18 107 #define SUN50I_H6_WDT_MODE_EN __BIT(0) 108 109 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 110 extern struct bus_space arm_generic_bs_tag; 111 extern struct bus_space arm_generic_a4x_bs_tag; 112 113 #define sunxi_dma_tag arm_generic_dma_tag 114 #define sunxi_bs_tag arm_generic_bs_tag 115 #define sunxi_a4x_bs_tag arm_generic_a4x_bs_tag 116 117 static const struct pmap_devmap * 118 sunxi_platform_devmap(void) 119 { 120 static const struct pmap_devmap devmap[] = { 121 DEVMAP_ENTRY(SUNXI_CORE_VBASE, 122 SUNXI_CORE_PBASE, 123 SUNXI_CORE_SIZE), 124 DEVMAP_ENTRY_END 125 }; 126 127 return devmap; 128 } 129 130 #define SUN8I_A83T_CPU_VBASE (SUNXI_CORE_VBASE + SUNXI_CORE_SIZE) 131 #define SUN8I_A83T_CPU_PBASE 0x01700000 132 #define SUN8I_A83T_CPU_SIZE 0x00100000 133 134 static const struct pmap_devmap * 135 sun8i_a83t_platform_devmap(void) 136 { 137 static const struct pmap_devmap devmap[] = { 138 DEVMAP_ENTRY(SUNXI_CORE_VBASE, 139 SUNXI_CORE_PBASE, 140 SUNXI_CORE_SIZE), 141 DEVMAP_ENTRY(SUN8I_A83T_CPU_VBASE, 142 SUN8I_A83T_CPU_PBASE, 143 SUN8I_A83T_CPU_SIZE), 144 DEVMAP_ENTRY_END 145 }; 146 147 return devmap; 148 } 149 150 static void 151 sunxi_platform_init_attach_args(struct fdt_attach_args *faa) 152 { 153 faa->faa_bst = &sunxi_bs_tag; 154 faa->faa_a4x_bst = &sunxi_a4x_bs_tag; 155 faa->faa_dmat = &sunxi_dma_tag; 156 } 157 158 void sunxi_platform_early_putchar(char); 159 160 void 161 sunxi_platform_early_putchar(char c) 162 { 163 #ifdef CONSADDR 164 #define CONSADDR_VA ((CONSADDR - SUNXI_CORE_PBASE) + SUNXI_CORE_VBASE) 165 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? 166 (volatile uint32_t *)CONSADDR_VA : 167 (volatile uint32_t *)CONSADDR; 168 169 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0) 170 ; 171 172 uartaddr[com_data] = htole32(c); 173 #endif 174 } 175 176 static void 177 sunxi_platform_device_register(device_t self, void *aux) 178 { 179 prop_dictionary_t prop = device_properties(self); 180 181 if (device_is_a(self, "rgephy")) { 182 /* Pine64+ and NanoPi NEO Plus2 gigabit ethernet workaround */ 183 const char * compat[] = { 184 "pine64,pine64-plus", 185 "friendlyarm,nanopi-neo-plus2", 186 NULL 187 }; 188 if (of_match_compatible(OF_finddevice("/"), compat)) { 189 prop_dictionary_set_bool(prop, "no-rx-delay", true); 190 } 191 } 192 193 if (device_is_a(self, "armgtmr")) { 194 /* Allwinner A64 has an unstable architectural timer */ 195 const char * compat[] = { 196 "allwinner,sun50i-a64", 197 NULL 198 }; 199 if (of_match_compatible(OF_finddevice("/"), compat)) { 200 prop_dictionary_set_bool(prop, "sun50i-a64-unstable-timer", true); 201 } 202 } 203 } 204 205 static u_int 206 sunxi_platform_uart_freq(void) 207 { 208 return SUNXI_REF_FREQ; 209 } 210 211 static void 212 sunxi_platform_bootstrap(void) 213 { 214 arm_fdt_cpu_bootstrap(); 215 216 void *fdt_data = __UNCONST(fdtbus_get_data()); 217 const int chosen_off = fdt_path_offset(fdt_data, "/chosen"); 218 if (chosen_off < 0) 219 return; 220 221 if (match_bootconf_option(boot_args, "console", "fb")) { 222 const int framebuffer_off = 223 fdt_path_offset(fdt_data, "/chosen/framebuffer"); 224 if (framebuffer_off >= 0) { 225 const char *status = fdt_getprop(fdt_data, 226 framebuffer_off, "status", NULL); 227 if (status == NULL || strncmp(status, "ok", 2) == 0) { 228 fdt_setprop_string(fdt_data, chosen_off, 229 "stdout-path", "/chosen/framebuffer"); 230 } 231 } 232 } else if (match_bootconf_option(boot_args, "console", "serial")) { 233 fdt_setprop_string(fdt_data, chosen_off, 234 "stdout-path", "serial0:115200n8"); 235 } 236 } 237 238 #if defined(SOC_SUNXI_MC) 239 static int 240 cpu_enable_sunxi_mc(int phandle) 241 { 242 uint64_t mpidr; 243 244 fdtbus_get_reg64(phandle, 0, &mpidr, NULL); 245 246 return sunxi_mc_smp_enable(mpidr); 247 } 248 ARM_CPU_METHOD(sun8i_a83t, "allwinner,sun8i-a83t-smp", cpu_enable_sunxi_mc); 249 #endif 250 251 static void 252 sun4i_platform_reset(void) 253 { 254 bus_space_tag_t bst = &sunxi_bs_tag; 255 bus_space_handle_t bsh; 256 257 bus_space_map(bst, SUN4I_WDT_BASE, SUN4I_WDT_SIZE, 0, &bsh); 258 259 bus_space_write_4(bst, bsh, SUN4I_WDT_CTRL, 260 SUN4I_WDT_CTRL_KEY | SUN4I_WDT_CTRL_RESTART); 261 for (;;) { 262 bus_space_write_4(bst, bsh, SUN4I_WDT_MODE, 263 SUN4I_WDT_MODE_EN | SUN4I_WDT_MODE_RST_EN); 264 } 265 } 266 267 static void 268 sun4i_platform_delay(u_int n) 269 { 270 static bus_space_tag_t bst = &sunxi_bs_tag; 271 static bus_space_handle_t bsh = 0; 272 const long incs_per_us = SUNXI_REF_FREQ / 1000000; 273 long ticks = n * incs_per_us; 274 uint32_t cur, prev; 275 276 if (bsh == 0) { 277 bus_space_map(bst, SUN4I_TIMER_BASE, SUN4I_TIMER_SIZE, 0, &bsh); 278 279 /* Enable Timer 1 */ 280 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_INTV_VALUE, ~0U); 281 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_CTRL, 282 SUN4I_TIMER_1_CTRL_EN | 283 SUN4I_TIMER_1_CTRL_RELOAD | 284 __SHIFTIN(SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M, 285 SUN4I_TIMER_1_CTRL_CLK_SRC)); 286 } 287 288 prev = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 289 while (ticks > 0) { 290 cur = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 291 if (cur > prev) 292 ticks -= (cur - prev); 293 else 294 ticks -= (~0U - cur + prev); 295 prev = cur; 296 } 297 } 298 299 static void 300 sun6i_platform_reset(void) 301 { 302 bus_space_tag_t bst = &sunxi_bs_tag; 303 bus_space_handle_t bsh; 304 305 bus_space_map(bst, SUN6I_WDT_BASE, SUN6I_WDT_SIZE, 0, &bsh); 306 307 bus_space_write_4(bst, bsh, SUN6I_WDT_CFG, SUN6I_WDT_CFG_SYS); 308 bus_space_write_4(bst, bsh, SUN6I_WDT_MODE, SUN6I_WDT_MODE_EN); 309 } 310 311 static void 312 sun9i_platform_reset(void) 313 { 314 bus_space_tag_t bst = &sunxi_bs_tag; 315 bus_space_handle_t bsh; 316 317 bus_space_map(bst, SUN9I_WDT_BASE, SUN9I_WDT_SIZE, 0, &bsh); 318 319 bus_space_write_4(bst, bsh, SUN9I_WDT_CFG, SUN9I_WDT_CFG_SYS); 320 bus_space_write_4(bst, bsh, SUN9I_WDT_MODE, SUN9I_WDT_MODE_EN); 321 } 322 323 static void 324 sun50i_h6_platform_reset(void) 325 { 326 bus_space_tag_t bst = &sunxi_bs_tag; 327 bus_space_handle_t bsh; 328 329 bus_space_map(bst, SUN50I_H6_WDT_BASE, SUN50I_H6_WDT_SIZE, 0, &bsh); 330 331 bus_space_write_4(bst, bsh, SUN50I_H6_WDT_CFG, SUN50I_H6_WDT_CFG_SYS); 332 bus_space_write_4(bst, bsh, SUN50I_H6_WDT_MODE, SUN50I_H6_WDT_MODE_EN); 333 } 334 335 static const struct arm_platform sun4i_platform = { 336 .ap_devmap = sunxi_platform_devmap, 337 .ap_bootstrap = sunxi_platform_bootstrap, 338 .ap_init_attach_args = sunxi_platform_init_attach_args, 339 .ap_device_register = sunxi_platform_device_register, 340 .ap_reset = sun4i_platform_reset, 341 .ap_delay = sun4i_platform_delay, 342 .ap_uart_freq = sunxi_platform_uart_freq, 343 }; 344 345 ARM_PLATFORM(sun4i_a10, "allwinner,sun4i-a10", &sun4i_platform); 346 347 static const struct arm_platform sun5i_platform = { 348 .ap_devmap = sunxi_platform_devmap, 349 .ap_bootstrap = sunxi_platform_bootstrap, 350 .ap_init_attach_args = sunxi_platform_init_attach_args, 351 .ap_device_register = sunxi_platform_device_register, 352 .ap_reset = sun4i_platform_reset, 353 .ap_delay = sun4i_platform_delay, 354 .ap_uart_freq = sunxi_platform_uart_freq, 355 }; 356 357 ARM_PLATFORM(sun5i_a13, "allwinner,sun5i-a13", &sun5i_platform); 358 ARM_PLATFORM(sun5i_gr8, "nextthing,gr8", &sun5i_platform); 359 360 static const struct arm_platform sun6i_platform = { 361 .ap_devmap = sunxi_platform_devmap, 362 .ap_bootstrap = sunxi_platform_bootstrap, 363 .ap_init_attach_args = sunxi_platform_init_attach_args, 364 .ap_device_register = sunxi_platform_device_register, 365 .ap_reset = sun6i_platform_reset, 366 .ap_delay = gtmr_delay, 367 .ap_uart_freq = sunxi_platform_uart_freq, 368 .ap_mpstart = arm_fdt_cpu_mpstart, 369 }; 370 371 ARM_PLATFORM(sun6i_a31, "allwinner,sun6i-a31", &sun6i_platform); 372 373 static const struct arm_platform sun7i_platform = { 374 .ap_devmap = sunxi_platform_devmap, 375 .ap_bootstrap = sunxi_platform_bootstrap, 376 .ap_init_attach_args = sunxi_platform_init_attach_args, 377 .ap_device_register = sunxi_platform_device_register, 378 .ap_reset = sun4i_platform_reset, 379 .ap_delay = sun4i_platform_delay, 380 .ap_uart_freq = sunxi_platform_uart_freq, 381 .ap_mpstart = arm_fdt_cpu_mpstart, 382 }; 383 384 ARM_PLATFORM(sun7i_a20, "allwinner,sun7i-a20", &sun7i_platform); 385 386 static const struct arm_platform sun8i_platform = { 387 .ap_devmap = sunxi_platform_devmap, 388 .ap_bootstrap = sunxi_platform_bootstrap, 389 .ap_init_attach_args = sunxi_platform_init_attach_args, 390 .ap_device_register = sunxi_platform_device_register, 391 .ap_reset = sun6i_platform_reset, 392 .ap_delay = gtmr_delay, 393 .ap_uart_freq = sunxi_platform_uart_freq, 394 .ap_mpstart = arm_fdt_cpu_mpstart, 395 }; 396 397 ARM_PLATFORM(sun8i_h2plus, "allwinner,sun8i-h2-plus", &sun8i_platform); 398 ARM_PLATFORM(sun8i_h3, "allwinner,sun8i-h3", &sun8i_platform); 399 400 static const struct arm_platform sun8i_a83t_platform = { 401 .ap_devmap = sun8i_a83t_platform_devmap, 402 .ap_bootstrap = sunxi_platform_bootstrap, 403 .ap_init_attach_args = sunxi_platform_init_attach_args, 404 .ap_device_register = sunxi_platform_device_register, 405 .ap_reset = sun6i_platform_reset, 406 .ap_delay = gtmr_delay, 407 .ap_uart_freq = sunxi_platform_uart_freq, 408 .ap_mpstart = arm_fdt_cpu_mpstart, 409 }; 410 411 ARM_PLATFORM(sun8i_a83t, "allwinner,sun8i-a83t", &sun8i_a83t_platform); 412 413 static const struct arm_platform sun9i_platform = { 414 .ap_devmap = sunxi_platform_devmap, 415 .ap_bootstrap = sunxi_platform_bootstrap, 416 .ap_init_attach_args = sunxi_platform_init_attach_args, 417 .ap_device_register = sunxi_platform_device_register, 418 .ap_reset = sun9i_platform_reset, 419 .ap_delay = gtmr_delay, 420 .ap_uart_freq = sunxi_platform_uart_freq, 421 .ap_mpstart = arm_fdt_cpu_mpstart, 422 }; 423 424 ARM_PLATFORM(sun9i_a80, "allwinner,sun9i-a80", &sun9i_platform); 425 426 static const struct arm_platform sun50i_platform = { 427 .ap_devmap = sunxi_platform_devmap, 428 .ap_bootstrap = sunxi_platform_bootstrap, 429 .ap_init_attach_args = sunxi_platform_init_attach_args, 430 .ap_device_register = sunxi_platform_device_register, 431 .ap_reset = sun6i_platform_reset, 432 .ap_delay = gtmr_delay, 433 .ap_uart_freq = sunxi_platform_uart_freq, 434 .ap_mpstart = arm_fdt_cpu_mpstart, 435 }; 436 437 ARM_PLATFORM(sun50i_a64, "allwinner,sun50i-a64", &sun50i_platform); 438 ARM_PLATFORM(sun50i_h5, "allwinner,sun50i-h5", &sun50i_platform); 439 440 static const struct arm_platform sun50i_h6_platform = { 441 .ap_devmap = sunxi_platform_devmap, 442 .ap_bootstrap = sunxi_platform_bootstrap, 443 .ap_init_attach_args = sunxi_platform_init_attach_args, 444 .ap_device_register = sunxi_platform_device_register, 445 .ap_reset = sun50i_h6_platform_reset, 446 .ap_delay = gtmr_delay, 447 .ap_uart_freq = sunxi_platform_uart_freq, 448 .ap_mpstart = arm_fdt_cpu_mpstart, 449 }; 450 451 ARM_PLATFORM(sun50i_h6, "allwinner,sun50i-h6", &sun50i_h6_platform); 452
Indexes created Wed Sep 24 14:09:57 GMT 2025