sunxi_rtc.c revision 1.6
1 /* $NetBSD: sunxi_rtc.c,v 1.6 2020/03/27 01:42:10 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2014-2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: sunxi_rtc.c,v 1.6 2020/03/27 01:42:10 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/mutex.h> 38 39 #include <dev/clock_subr.h> 40 #include <dev/clk/clk_backend.h> 41 42 #include <dev/fdt/fdtvar.h> 43 44 #define SUN4I_RTC_YY_MM_DD_REG 0x04 45 #define SUN4I_RTC_LEAP __BIT(22) 46 #define SUN4I_RTC_YEAR __BITS(21,16) 47 #define SUN4I_RTC_MONTH __BITS(11,8) 48 #define SUN4I_RTC_DAY __BITS(4,0) 49 #define SUN4I_RTC_HH_MM_SS_REG 0x08 50 #define SUN4I_RTC_WK_NO __BITS(31,29) 51 #define SUN4I_RTC_HOUR __BITS(20,16) 52 #define SUN4I_RTC_MINUTE __BITS(13,8) 53 #define SUN4I_RTC_SECOND __BITS(5,0) 54 #define SUN4I_RTC_BASE_YEAR 2010 55 56 #define SUN7I_RTC_YY_MM_DD_REG 0x04 57 #define SUN7I_RTC_LEAP __BIT(24) 58 #define SUN7I_RTC_YEAR __BITS(23,16) 59 #define SUN7I_RTC_MONTH __BITS(11,8) 60 #define SUN7I_RTC_DAY __BITS(4,0) 61 #define SUN7I_RTC_HH_MM_SS_REG 0x08 62 #define SUN7I_RTC_WK_NO __BITS(31,29) 63 #define SUN7I_RTC_HOUR __BITS(20,16) 64 #define SUN7I_RTC_MINUTE __BITS(13,8) 65 #define SUN7I_RTC_SECOND __BITS(5,0) 66 #define SUN7I_RTC_BASE_YEAR 1970 67 68 #define SUN6I_LOSC_CTRL_REG 0x00 69 #define SUN6I_LOSC_CTRL_KEY (0x16aa << 16) 70 #define SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS __BIT(15) 71 #define SUN6I_LOSC_CTRL_ALM_DHMS_ACC __BIT(9) 72 #define SUN6I_LOSC_CTRL_RTC_HMS_ACC __BIT(8) 73 #define SUN6I_LOSC_CTRL_RTC_YMD_ACC __BIT(7) 74 #define SUN6I_LOSC_CTRL_EXT_LOSC_EN __BIT(4) 75 #define SUN6I_LOSC_CTRL_EXT_OSC __BIT(0) 76 77 #define SUN6I_INTOSC_CLK_PRESCAL_REG 0x08 78 #define SUN6I_INTOSC_CLK_PRESCAL __BITS(0,4) 79 80 #define SUN6I_RTC_YY_MM_DD_REG 0x10 81 #define SUN6I_RTC_LEAP __BIT(22) 82 #define SUN6I_RTC_YEAR __BITS(21,16) 83 #define SUN6I_RTC_MONTH __BITS(11,8) 84 #define SUN6I_RTC_DAY __BITS(4,0) 85 #define SUN6I_RTC_HH_MM_SS_REG 0x14 86 #define SUN6I_RTC_WK_NO __BITS(31,29) 87 #define SUN6I_RTC_HOUR __BITS(20,16) 88 #define SUN6I_RTC_MINUTE __BITS(13,8) 89 #define SUN6I_RTC_SECOND __BITS(5,0) 90 #define SUN6I_RTC_BASE_YEAR 2000 91 92 #define SUN6I_RTC_LOSC_OUT_GATING_REG 0x60 93 #define SUN6I_RTC_LOSC_OUT_EN __BIT(0) 94 95 struct sunxi_rtc_config { 96 bus_size_t yy_mm_dd_reg; 97 uint32_t leap, year, month, day; 98 bus_size_t hh_mm_ss_reg; 99 uint32_t wk_no, hour, minute, second; 100 u_int base_year; 101 102 u_int iosc_rate; 103 u_int fixed_prescaler; 104 uint32_t ext_losc_en; 105 uint32_t auto_swt_bypass; 106 u_int flags; 107 }; 108 109 #define SUNXI_RTC_F_HAS_VAR_PRESCALER __BIT(0) 110 111 static const struct sunxi_rtc_config sun4i_rtc_config = { 112 .yy_mm_dd_reg = SUN4I_RTC_YY_MM_DD_REG, 113 .leap = SUN4I_RTC_LEAP, 114 .year = SUN4I_RTC_YEAR, 115 .month = SUN4I_RTC_MONTH, 116 .day = SUN4I_RTC_DAY, 117 .hh_mm_ss_reg = SUN4I_RTC_HH_MM_SS_REG, 118 .wk_no = SUN4I_RTC_WK_NO, 119 .hour = SUN4I_RTC_HOUR, 120 .minute = SUN4I_RTC_MINUTE, 121 .second = SUN4I_RTC_SECOND, 122 .base_year = SUN4I_RTC_BASE_YEAR, 123 }; 124 125 static const struct sunxi_rtc_config sun6i_a31_rtc_config = { 126 .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG, 127 .leap = SUN6I_RTC_LEAP, 128 .year = SUN6I_RTC_YEAR, 129 .month = SUN6I_RTC_MONTH, 130 .day = SUN6I_RTC_DAY, 131 .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG, 132 .wk_no = SUN6I_RTC_WK_NO, 133 .hour = SUN6I_RTC_HOUR, 134 .minute = SUN6I_RTC_MINUTE, 135 .second = SUN6I_RTC_SECOND, 136 .base_year = SUN6I_RTC_BASE_YEAR, 137 138 .iosc_rate = 667000, 139 .flags = SUNXI_RTC_F_HAS_VAR_PRESCALER, 140 }; 141 142 static const struct sunxi_rtc_config sun7i_rtc_config = { 143 .yy_mm_dd_reg = SUN7I_RTC_YY_MM_DD_REG, 144 .leap = SUN7I_RTC_LEAP, 145 .year = SUN7I_RTC_YEAR, 146 .month = SUN7I_RTC_MONTH, 147 .day = SUN7I_RTC_DAY, 148 .hh_mm_ss_reg = SUN7I_RTC_HH_MM_SS_REG, 149 .wk_no = SUN7I_RTC_WK_NO, 150 .hour = SUN7I_RTC_HOUR, 151 .minute = SUN7I_RTC_MINUTE, 152 .second = SUN7I_RTC_SECOND, 153 .base_year = SUN7I_RTC_BASE_YEAR, 154 }; 155 156 static const struct sunxi_rtc_config sun8i_a23_rtc_config = { 157 .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG, 158 .leap = SUN6I_RTC_LEAP, 159 .year = SUN6I_RTC_YEAR, 160 .month = SUN6I_RTC_MONTH, 161 .day = SUN6I_RTC_DAY, 162 .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG, 163 .wk_no = SUN6I_RTC_WK_NO, 164 .hour = SUN6I_RTC_HOUR, 165 .minute = SUN6I_RTC_MINUTE, 166 .second = SUN6I_RTC_SECOND, 167 .base_year = SUN6I_RTC_BASE_YEAR, 168 169 .iosc_rate = 667000, 170 .flags = SUNXI_RTC_F_HAS_VAR_PRESCALER, 171 }; 172 173 static const struct sunxi_rtc_config sun8i_r40_rtc_config = { 174 .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG, 175 .leap = SUN6I_RTC_LEAP, 176 .year = SUN6I_RTC_YEAR, 177 .month = SUN6I_RTC_MONTH, 178 .day = SUN6I_RTC_DAY, 179 .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG, 180 .wk_no = SUN6I_RTC_WK_NO, 181 .hour = SUN6I_RTC_HOUR, 182 .minute = SUN6I_RTC_MINUTE, 183 .second = SUN6I_RTC_SECOND, 184 .base_year = SUN6I_RTC_BASE_YEAR, 185 186 .iosc_rate = 16000000, 187 .fixed_prescaler = 512, 188 }; 189 190 static const struct sunxi_rtc_config sun8i_v3_rtc_config = { 191 .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG, 192 .leap = SUN6I_RTC_LEAP, 193 .year = SUN6I_RTC_YEAR, 194 .month = SUN6I_RTC_MONTH, 195 .day = SUN6I_RTC_DAY, 196 .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG, 197 .wk_no = SUN6I_RTC_WK_NO, 198 .hour = SUN6I_RTC_HOUR, 199 .minute = SUN6I_RTC_MINUTE, 200 .second = SUN6I_RTC_SECOND, 201 .base_year = SUN6I_RTC_BASE_YEAR, 202 203 .iosc_rate = 32000, 204 }; 205 206 static const struct sunxi_rtc_config sun8i_h3_rtc_config = { 207 .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG, 208 .leap = SUN6I_RTC_LEAP, 209 .year = SUN6I_RTC_YEAR, 210 .month = SUN6I_RTC_MONTH, 211 .day = SUN6I_RTC_DAY, 212 .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG, 213 .wk_no = SUN6I_RTC_WK_NO, 214 .hour = SUN6I_RTC_HOUR, 215 .minute = SUN6I_RTC_MINUTE, 216 .second = SUN6I_RTC_SECOND, 217 .base_year = SUN6I_RTC_BASE_YEAR, 218 219 .iosc_rate = 16000000, 220 .fixed_prescaler = 32, 221 .flags = SUNXI_RTC_F_HAS_VAR_PRESCALER, 222 }; 223 224 static const struct sunxi_rtc_config sun50i_h6_rtc_config = { 225 .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG, 226 .leap = SUN6I_RTC_LEAP, 227 .year = SUN6I_RTC_YEAR, 228 .month = SUN6I_RTC_MONTH, 229 .day = SUN6I_RTC_DAY, 230 .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG, 231 .wk_no = SUN6I_RTC_WK_NO, 232 .hour = SUN6I_RTC_HOUR, 233 .minute = SUN6I_RTC_MINUTE, 234 .second = SUN6I_RTC_SECOND, 235 .base_year = SUN6I_RTC_BASE_YEAR, 236 237 .iosc_rate = 16000000, 238 .fixed_prescaler = 32, 239 .auto_swt_bypass = SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS, 240 .ext_losc_en = SUN6I_LOSC_CTRL_EXT_LOSC_EN, 241 .flags = SUNXI_RTC_F_HAS_VAR_PRESCALER, 242 }; 243 244 static const struct of_compat_data compat_data[] = { 245 { "allwinner,sun4i-a10-rtc", (uintptr_t)&sun4i_rtc_config }, 246 { "allwinner,sun6i-a31-rtc", (uintptr_t)&sun6i_a31_rtc_config }, 247 { "allwinner,sun7i-a20-rtc", (uintptr_t)&sun7i_rtc_config }, 248 { "allwinner,sun8i-a23-rtc", (uintptr_t)&sun8i_a23_rtc_config }, 249 { "allwinner,sun8i-r40-rtc", (uintptr_t)&sun8i_r40_rtc_config }, 250 { "allwinner,sun8i-v3-rtc", (uintptr_t)&sun8i_v3_rtc_config }, 251 { "allwinner,sun8i-h3-rtc", (uintptr_t)&sun8i_h3_rtc_config }, 252 { "allwinner,sun50i-h5-rtc", (uintptr_t)&sun8i_h3_rtc_config }, 253 { "allwinner,sun50i-h6-rtc", (uintptr_t)&sun50i_h6_rtc_config }, 254 { NULL } 255 }; 256 257 #define SUNXI_RTC_CLK_LOSC 0 258 #define SUNXI_RTC_CLK_LOSC_GATE 1 259 #define SUNXI_RTC_CLK_IOSC 2 260 #define SUNXI_RTC_NCLKS 3 261 262 struct sunxi_rtc_softc { 263 device_t sc_dev; 264 bus_space_tag_t sc_bst; 265 bus_space_handle_t sc_bsh; 266 struct todr_chip_handle sc_todr; 267 const struct sunxi_rtc_config *sc_conf; 268 269 int sc_phandle; 270 271 struct clk *sc_parent_clk; /* external oscillator */ 272 273 /* 274 * We export up to 3 clocks: 275 * [0] The local oscillator output 276 * [1] Gated version of [0] 277 * [2] The internal oscillator 278 * 279 * The local oscillator is driven either by the internal 280 * oscillator (less precise) or an external oscillator. 281 * 282 * Note that these are the order they appear in the device 283 * tree "clock-output-names" property for our node. Not 284 * all flavors of the Allwinner SoCs export all of these 285 * clocks, so we export only those that appear in the 286 * "clock-output-names" property. 287 */ 288 const char *sc_clk_names[SUNXI_RTC_NCLKS]; 289 struct clk sc_clks[SUNXI_RTC_NCLKS]; 290 kmutex_t sc_clk_mutex; 291 struct clk_domain sc_clkdom; 292 }; 293 294 #define RTC_READ(sc, reg) \ 295 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 296 #define RTC_WRITE(sc, reg, val) \ 297 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 298 299 static int sunxi_rtc_match(device_t, cfdata_t, void *); 300 static void sunxi_rtc_attach(device_t, device_t, void *); 301 302 static int sunxi_rtc_gettime(todr_chip_handle_t, struct clock_ymdhms *); 303 static int sunxi_rtc_settime(todr_chip_handle_t, struct clock_ymdhms *); 304 305 static struct clk * 306 sunxi_rtc_clk_get(void *, const char *); 307 static u_int sunxi_rtc_clk_get_rate(void *, struct clk *); 308 static int sunxi_rtc_clk_enable(void *, struct clk *); 309 static int sunxi_rtc_clk_disable(void *, struct clk *); 310 static int sunxi_rtc_clk_set_parent(void *, struct clk *, struct clk *); 311 static struct clk * 312 sunxi_rtc_clk_get_parent(void *, struct clk *); 313 314 static const struct clk_funcs sunxi_rtc_clk_funcs = { 315 .get = sunxi_rtc_clk_get, 316 .get_rate = sunxi_rtc_clk_get_rate, 317 .enable = sunxi_rtc_clk_enable, 318 .disable = sunxi_rtc_clk_disable, 319 .set_parent = sunxi_rtc_clk_set_parent, 320 .get_parent = sunxi_rtc_clk_get_parent, 321 }; 322 323 static struct clk * 324 sunxi_rtc_clock_decode(device_t dev, int cc_phandle, const void *data, 325 size_t len) 326 { 327 struct sunxi_rtc_softc * const sc = device_private(dev); 328 329 if (len != 4) 330 return NULL; 331 332 const u_int clock_id = be32dec(data); 333 if (clock_id >= SUNXI_RTC_NCLKS) 334 return NULL; 335 336 if (sc->sc_clk_names[clock_id] == NULL) 337 return NULL; 338 339 return &sc->sc_clks[clock_id]; 340 } 341 342 static const struct fdtbus_clock_controller_func sunxi_rtc_fdtclock_funcs = { 343 .decode = sunxi_rtc_clock_decode, 344 }; 345 346 CFATTACH_DECL_NEW(sunxi_rtc, sizeof(struct sunxi_rtc_softc), 347 sunxi_rtc_match, sunxi_rtc_attach, NULL, NULL); 348 349 static int 350 sunxi_rtc_match(device_t parent, cfdata_t cf, void *aux) 351 { 352 struct fdt_attach_args * const faa = aux; 353 354 return of_match_compat_data(faa->faa_phandle, compat_data); 355 } 356 357 static void 358 sunxi_rtc_attach(device_t parent, device_t self, void *aux) 359 { 360 struct sunxi_rtc_softc * const sc = device_private(self); 361 struct fdt_attach_args * const faa = aux; 362 const int phandle = faa->faa_phandle; 363 bus_addr_t addr; 364 bus_size_t size; 365 366 sc->sc_phandle = phandle; 367 368 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 369 aprint_error(": couldn't get registers\n"); 370 return; 371 } 372 373 sc->sc_dev = self; 374 sc->sc_bst = faa->faa_bst; 375 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 376 aprint_error(": couldn't map registers\n"); 377 return; 378 } 379 sc->sc_conf = (void *)of_search_compatible(phandle, compat_data)->data; 380 381 aprint_naive("\n"); 382 aprint_normal(": RTC\n"); 383 384 mutex_init(&sc->sc_clk_mutex, MUTEX_DEFAULT, IPL_HIGH); 385 386 sc->sc_todr.cookie = sc; 387 sc->sc_todr.todr_gettime_ymdhms = sunxi_rtc_gettime; 388 sc->sc_todr.todr_settime_ymdhms = sunxi_rtc_settime; 389 390 fdtbus_todr_attach(self, phandle, &sc->sc_todr); 391 392 sc->sc_parent_clk = fdtbus_clock_get_index(phandle, 0); 393 394 if (sc->sc_parent_clk == NULL || sc->sc_conf->iosc_rate == 0) 395 return; 396 397 uint32_t reg = SUN6I_LOSC_CTRL_KEY; 398 if (sc->sc_conf->auto_swt_bypass) { 399 /* 400 * Disable auto-switching to the internal oscillator 401 * if the external oscillator disappears. 402 */ 403 reg |= sc->sc_conf->auto_swt_bypass; 404 RTC_WRITE(sc, SUN6I_LOSC_CTRL_REG, reg); 405 } 406 407 /* Switch to the external oscillator by default. */ 408 reg |= SUN6I_LOSC_CTRL_EXT_OSC | sc->sc_conf->ext_losc_en; 409 RTC_WRITE(sc, SUN6I_LOSC_CTRL_REG, reg); 410 411 sc->sc_clkdom.name = device_xname(sc->sc_dev); 412 sc->sc_clkdom.funcs = &sunxi_rtc_clk_funcs; 413 sc->sc_clkdom.priv = sc; 414 415 unsigned int i; 416 for (i = 0; i < SUNXI_RTC_NCLKS; i++) { 417 sc->sc_clk_names[i] = fdtbus_get_string_index(phandle, 418 "clock-output-names", i); 419 if (sc->sc_clk_names[i] == NULL) 420 break; 421 sc->sc_clks[i].domain = &sc->sc_clkdom; 422 sc->sc_clks[i].name = sc->sc_clk_names[i]; 423 clk_attach(&sc->sc_clks[i]); 424 } 425 426 fdtbus_register_clock_controller(sc->sc_dev, sc->sc_phandle, 427 &sunxi_rtc_fdtclock_funcs); 428 } 429 430 static int 431 sunxi_rtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt) 432 { 433 struct sunxi_rtc_softc *sc = tch->cookie; 434 const struct sunxi_rtc_config *conf = sc->sc_conf; 435 436 const uint32_t yymmdd = RTC_READ(sc, conf->yy_mm_dd_reg); 437 const uint32_t hhmmss = RTC_READ(sc, conf->hh_mm_ss_reg); 438 439 dt->dt_year = __SHIFTOUT(yymmdd, conf->year) + conf->base_year; 440 dt->dt_mon = __SHIFTOUT(yymmdd, conf->month); 441 dt->dt_day = __SHIFTOUT(yymmdd, conf->day); 442 dt->dt_wday = __SHIFTOUT(hhmmss, conf->wk_no); 443 dt->dt_hour = __SHIFTOUT(hhmmss, conf->hour); 444 dt->dt_min = __SHIFTOUT(hhmmss, conf->minute); 445 dt->dt_sec = __SHIFTOUT(hhmmss, conf->second); 446 447 return 0; 448 } 449 450 static int 451 sunxi_rtc_settime(todr_chip_handle_t tch, struct clock_ymdhms *dt) 452 { 453 struct sunxi_rtc_softc *sc = tch->cookie; 454 const struct sunxi_rtc_config *conf = sc->sc_conf; 455 uint32_t yymmdd, hhmmss, maxyear; 456 457 /* 458 * Sanity check the date before writing it back 459 */ 460 if (dt->dt_year < conf->base_year) { 461 aprint_normal_dev(sc->sc_dev, "year pre the epoch: %" PRIu64 462 ", not writing back time\n", dt->dt_year); 463 return EIO; 464 } 465 maxyear = __SHIFTOUT(0xffffffff, conf->year) + conf->base_year; 466 if (dt->dt_year > maxyear) { 467 aprint_normal_dev(sc->sc_dev, "year exceeds available field:" 468 " %" PRIu64 ", not writing back time\n", dt->dt_year); 469 return EIO; 470 } 471 472 yymmdd = __SHIFTIN(dt->dt_year - conf->base_year, conf->year); 473 yymmdd |= __SHIFTIN(dt->dt_mon, conf->month); 474 yymmdd |= __SHIFTIN(dt->dt_day, conf->day); 475 476 hhmmss = __SHIFTIN(dt->dt_wday, conf->wk_no); 477 hhmmss |= __SHIFTIN(dt->dt_hour, conf->hour); 478 hhmmss |= __SHIFTIN(dt->dt_min, conf->minute); 479 hhmmss |= __SHIFTIN(dt->dt_sec, conf->second); 480 481 RTC_WRITE(sc, conf->yy_mm_dd_reg, yymmdd); 482 RTC_WRITE(sc, conf->hh_mm_ss_reg, hhmmss); 483 484 return 0; 485 } 486 487 static struct clk * 488 sunxi_rtc_clk_get(void *priv, const char *name) 489 { 490 struct sunxi_rtc_softc * const sc = priv; 491 u_int i; 492 493 for (i = 0; i < SUNXI_RTC_NCLKS; i++) { 494 if (sc->sc_clk_names[i] != NULL && 495 strcmp(sc->sc_clk_names[i], name) == 0) { 496 return &sc->sc_clks[i]; 497 } 498 } 499 500 return NULL; 501 } 502 503 static u_int 504 sunxi_rtc_clk_get_rate(void *priv, struct clk *clk) 505 { 506 struct sunxi_rtc_softc * const sc = priv; 507 508 if (clk == &sc->sc_clks[SUNXI_RTC_CLK_IOSC]) { 509 KASSERT(sc->sc_clk_names[SUNXI_RTC_CLK_IOSC] != NULL); 510 KASSERT(sc->sc_conf->iosc_rate != 0); 511 return sc->sc_conf->iosc_rate; 512 } 513 514 KASSERT(sc->sc_parent_clk != NULL); 515 u_int parent_rate = clk_get_rate(sc->sc_parent_clk); 516 uint32_t prescaler = 0; 517 518 if (RTC_READ(sc, SUN6I_LOSC_CTRL_REG) & SUN6I_LOSC_CTRL_EXT_OSC) 519 return parent_rate; 520 521 if (sc->sc_conf->fixed_prescaler) 522 parent_rate /= sc->sc_conf->fixed_prescaler; 523 524 if (sc->sc_conf->flags & SUNXI_RTC_F_HAS_VAR_PRESCALER) { 525 prescaler = 526 __SHIFTOUT(RTC_READ(sc, SUN6I_INTOSC_CLK_PRESCAL_REG), 527 SUN6I_INTOSC_CLK_PRESCAL); 528 } 529 530 return parent_rate / (prescaler + 1); 531 } 532 533 static int 534 sunxi_rtc_clk_enable(void *priv, struct clk *clk) 535 { 536 struct sunxi_rtc_softc * const sc = priv; 537 538 if (clk != &sc->sc_clks[SUNXI_RTC_CLK_LOSC_GATE]) 539 return 0; 540 541 mutex_enter(&sc->sc_clk_mutex); 542 uint32_t reg = RTC_READ(sc, SUN6I_RTC_LOSC_OUT_GATING_REG); 543 if ((reg & SUN6I_RTC_LOSC_OUT_EN) == 0) { 544 reg |= SUN6I_RTC_LOSC_OUT_EN; 545 RTC_WRITE(sc, SUN6I_RTC_LOSC_OUT_GATING_REG, reg); 546 } 547 mutex_exit(&sc->sc_clk_mutex); 548 549 return 0; 550 } 551 552 static int 553 sunxi_rtc_clk_disable(void *priv, struct clk *clk) 554 { 555 struct sunxi_rtc_softc * const sc = priv; 556 557 if (clk != &sc->sc_clks[SUNXI_RTC_CLK_LOSC_GATE]) 558 return EINVAL; 559 560 mutex_enter(&sc->sc_clk_mutex); 561 uint32_t reg = RTC_READ(sc, SUN6I_RTC_LOSC_OUT_GATING_REG); 562 if (reg & SUN6I_RTC_LOSC_OUT_EN) { 563 reg &= ~SUN6I_RTC_LOSC_OUT_EN; 564 RTC_WRITE(sc, SUN6I_RTC_LOSC_OUT_GATING_REG, reg); 565 } 566 mutex_exit(&sc->sc_clk_mutex); 567 568 return 0; 569 } 570 571 static int 572 sunxi_rtc_clk_set_parent(void *priv, struct clk *clk, struct clk *parent_clk) 573 { 574 struct sunxi_rtc_softc * const sc = priv; 575 576 if (clk == &sc->sc_clks[SUNXI_RTC_CLK_IOSC]) 577 return EINVAL; 578 579 if (parent_clk != sc->sc_parent_clk && 580 parent_clk != &sc->sc_clks[SUNXI_RTC_CLK_IOSC]) 581 return EINVAL; 582 583 mutex_enter(&sc->sc_clk_mutex); 584 uint32_t reg = RTC_READ(sc, SUN6I_LOSC_CTRL_REG); 585 if (parent_clk == sc->sc_parent_clk) 586 reg |= SUN6I_LOSC_CTRL_EXT_OSC | sc->sc_conf->ext_losc_en; 587 else 588 reg &= ~(SUN6I_LOSC_CTRL_EXT_OSC | sc->sc_conf->ext_losc_en); 589 RTC_WRITE(sc, SUN6I_LOSC_CTRL_REG, reg | SUN6I_LOSC_CTRL_KEY); 590 mutex_exit(&sc->sc_clk_mutex); 591 592 return 0; 593 } 594 595 static struct clk * 596 sunxi_rtc_clk_get_parent(void *priv, struct clk *clk) 597 { 598 struct sunxi_rtc_softc * const sc = priv; 599 uint32_t reg; 600 601 if (clk == &sc->sc_clks[SUNXI_RTC_CLK_IOSC]) 602 return NULL; 603 604 reg = RTC_READ(sc, SUN6I_LOSC_CTRL_REG); 605 if (reg & SUN6I_LOSC_CTRL_EXT_OSC) 606 return sc->sc_parent_clk; 607 608 /* 609 * We switch to the external oscillator at attach time becacuse 610 * it's higher quality than the internal one. If we haven't 611 * exported the internal oscillator to the clock tree, then 612 * we shouldn't get here. 613 */ 614 KASSERT(sc->sc_clk_names[SUNXI_RTC_CLK_IOSC] != NULL); 615 return &sc->sc_clks[SUNXI_RTC_CLK_IOSC]; 616 } 617
Indexes created Tue Sep 23 14:10:03 GMT 2025