sunxi_timer.c revision 1.2.2.2
1 1.2.2.2 skrll /* $NetBSD: sunxi_timer.c,v 1.2.2.2 2017/08/28 17:51:32 skrll Exp $ */ 2 1.2.2.2 skrll 3 1.2.2.2 skrll /*- 4 1.2.2.2 skrll * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 1.2.2.2 skrll * All rights reserved. 6 1.2.2.2 skrll * 7 1.2.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 skrll * modification, are permitted provided that the following conditions 9 1.2.2.2 skrll * are met: 10 1.2.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.2.2.2 skrll * 16 1.2.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.2.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.2.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.2.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.2.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.2.2.2 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.2.2.2 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.2.2.2 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.2.2.2 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.2.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.2.2.2 skrll * SUCH DAMAGE. 27 1.2.2.2 skrll */ 28 1.2.2.2 skrll 29 1.2.2.2 skrll #include <sys/cdefs.h> 30 1.2.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: sunxi_timer.c,v 1.2.2.2 2017/08/28 17:51:32 skrll Exp $"); 31 1.2.2.2 skrll 32 1.2.2.2 skrll #include <sys/param.h> 33 1.2.2.2 skrll #include <sys/kernel.h> 34 1.2.2.2 skrll #include <sys/bus.h> 35 1.2.2.2 skrll #include <sys/device.h> 36 1.2.2.2 skrll #include <sys/intr.h> 37 1.2.2.2 skrll #include <sys/systm.h> 38 1.2.2.2 skrll #include <sys/timetc.h> 39 1.2.2.2 skrll 40 1.2.2.2 skrll #include <arm/locore.h> 41 1.2.2.2 skrll 42 1.2.2.2 skrll #include <dev/fdt/fdtvar.h> 43 1.2.2.2 skrll 44 1.2.2.2 skrll #include <arm/fdt/arm_fdtvar.h> 45 1.2.2.2 skrll 46 1.2.2.2 skrll #define TMR_IRQ_EN_REG 0x00 47 1.2.2.2 skrll #define TMR_IRQ_EN(n) __BIT(n) 48 1.2.2.2 skrll #define TMR_IRQ_STAS_REG 0x04 49 1.2.2.2 skrll #define TMR_IRQ_STAS_PEND(n) __BIT(n) 50 1.2.2.2 skrll #define TMR0_CTRL_REG 0x10 51 1.2.2.2 skrll #define TMR0_CTRL_MODE __BIT(7) 52 1.2.2.2 skrll #define TMR0_CTRL_CLK_PRESCALE __BITS(6,4) 53 1.2.2.2 skrll #define TMR0_CTRL_CLK_SRC __BITS(3,2) 54 1.2.2.2 skrll #define TMR0_CTRL_CLK_SRC_OSC24M 1 55 1.2.2.2 skrll #define TMR0_CTRL_CLK_SRC_PLL6_6 2 56 1.2.2.2 skrll #define TMR0_CTRL_RELOAD __BIT(1) 57 1.2.2.2 skrll #define TMR0_CTRL_EN __BIT(0) 58 1.2.2.2 skrll #define TMR0_INTV_VALUE_REG 0x14 59 1.2.2.2 skrll #define TMR0_CURNT_VALUE_REG 0x18 60 1.2.2.2 skrll 61 1.2.2.2 skrll static const char * const compatible[] = { 62 1.2.2.2 skrll "allwinner,sun4i-a10-timer", 63 1.2.2.2 skrll NULL 64 1.2.2.2 skrll }; 65 1.2.2.2 skrll 66 1.2.2.2 skrll struct sunxi_timer_softc { 67 1.2.2.2 skrll device_t sc_dev; 68 1.2.2.2 skrll bus_space_tag_t sc_bst; 69 1.2.2.2 skrll bus_space_handle_t sc_bsh; 70 1.2.2.2 skrll int sc_phandle; 71 1.2.2.2 skrll struct clk *sc_clk; 72 1.2.2.2 skrll 73 1.2.2.2 skrll struct timecounter sc_tc; 74 1.2.2.2 skrll }; 75 1.2.2.2 skrll 76 1.2.2.2 skrll #define TIMER_READ(sc, reg) \ 77 1.2.2.2 skrll bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 78 1.2.2.2 skrll #define TIMER_WRITE(sc, reg, val) \ 79 1.2.2.2 skrll bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 80 1.2.2.2 skrll 81 1.2.2.2 skrll static struct sunxi_timer_softc *timer_softc; 82 1.2.2.2 skrll 83 1.2.2.2 skrll static int 84 1.2.2.2 skrll sunxi_timer_intr(void *arg) 85 1.2.2.2 skrll { 86 1.2.2.2 skrll struct sunxi_timer_softc * const sc = timer_softc; 87 1.2.2.2 skrll struct clockframe *frame = arg; 88 1.2.2.2 skrll uint32_t stas; 89 1.2.2.2 skrll 90 1.2.2.2 skrll stas = TIMER_READ(sc, TMR_IRQ_STAS_REG); 91 1.2.2.2 skrll if (stas == 0) 92 1.2.2.2 skrll return 0; 93 1.2.2.2 skrll TIMER_WRITE(sc, TMR_IRQ_STAS_REG, stas); 94 1.2.2.2 skrll 95 1.2.2.2 skrll if ((stas & TMR_IRQ_STAS_PEND(0)) != 0) 96 1.2.2.2 skrll hardclock(frame); 97 1.2.2.2 skrll 98 1.2.2.2 skrll return 1; 99 1.2.2.2 skrll } 100 1.2.2.2 skrll 101 1.2.2.2 skrll static void 102 1.2.2.2 skrll sunxi_timer_cpu_initclocks(void) 103 1.2.2.2 skrll { 104 1.2.2.2 skrll struct sunxi_timer_softc * const sc = timer_softc; 105 1.2.2.2 skrll char intrstr[128]; 106 1.2.2.2 skrll void *ih; 107 1.2.2.2 skrll 108 1.2.2.2 skrll KASSERT(sc != NULL); 109 1.2.2.2 skrll 110 1.2.2.2 skrll if (!fdtbus_intr_str(sc->sc_phandle, 0, intrstr, sizeof(intrstr))) 111 1.2.2.2 skrll panic("%s: failed to decode interrupt", __func__); 112 1.2.2.2 skrll 113 1.2.2.2 skrll ih = fdtbus_intr_establish(sc->sc_phandle, 0, IPL_CLOCK, 114 1.2.2.2 skrll FDT_INTR_MPSAFE, sunxi_timer_intr, NULL); 115 1.2.2.2 skrll if (ih == NULL) 116 1.2.2.2 skrll panic("%s: failed to establish timer interrupt", __func__); 117 1.2.2.2 skrll 118 1.2.2.2 skrll aprint_normal_dev(sc->sc_dev, "interrupting on %s\n", intrstr); 119 1.2.2.2 skrll 120 1.2.2.2 skrll /* Enable Timer 0 IRQ */ 121 1.2.2.2 skrll const uint32_t irq_en = TIMER_READ(sc, TMR_IRQ_EN_REG); 122 1.2.2.2 skrll TIMER_WRITE(sc, TMR_IRQ_EN_REG, irq_en | TMR_IRQ_EN(0)); 123 1.2.2.2 skrll } 124 1.2.2.2 skrll 125 1.2.2.2 skrll static u_int 126 1.2.2.2 skrll sunxi_timer_get_timecount(struct timecounter *tc) 127 1.2.2.2 skrll { 128 1.2.2.2 skrll struct sunxi_timer_softc * const sc = tc->tc_priv; 129 1.2.2.2 skrll 130 1.2.2.2 skrll return ~TIMER_READ(sc, TMR0_CURNT_VALUE_REG); 131 1.2.2.2 skrll } 132 1.2.2.2 skrll 133 1.2.2.2 skrll static int 134 1.2.2.2 skrll sunxi_timer_match(device_t parent, cfdata_t cf, void *aux) 135 1.2.2.2 skrll { 136 1.2.2.2 skrll struct fdt_attach_args * const faa = aux; 137 1.2.2.2 skrll 138 1.2.2.2 skrll return of_match_compatible(faa->faa_phandle, compatible); 139 1.2.2.2 skrll } 140 1.2.2.2 skrll 141 1.2.2.2 skrll static void 142 1.2.2.2 skrll sunxi_timer_attach(device_t parent, device_t self, void *aux) 143 1.2.2.2 skrll { 144 1.2.2.2 skrll struct sunxi_timer_softc * const sc = device_private(self); 145 1.2.2.2 skrll struct fdt_attach_args * const faa = aux; 146 1.2.2.2 skrll struct timecounter *tc = &sc->sc_tc; 147 1.2.2.2 skrll const int phandle = faa->faa_phandle; 148 1.2.2.2 skrll bus_addr_t addr; 149 1.2.2.2 skrll bus_size_t size; 150 1.2.2.2 skrll 151 1.2.2.2 skrll if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 152 1.2.2.2 skrll aprint_error(": couldn't get registers\n"); 153 1.2.2.2 skrll return; 154 1.2.2.2 skrll } 155 1.2.2.2 skrll 156 1.2.2.2 skrll if ((sc->sc_clk = fdtbus_clock_get_index(phandle, 0)) == NULL) { 157 1.2.2.2 skrll aprint_error(": couldn't get clock\n"); 158 1.2.2.2 skrll return; 159 1.2.2.2 skrll } 160 1.2.2.2 skrll 161 1.2.2.2 skrll sc->sc_dev = self; 162 1.2.2.2 skrll sc->sc_phandle = phandle; 163 1.2.2.2 skrll sc->sc_bst = faa->faa_bst; 164 1.2.2.2 skrll if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 165 1.2.2.2 skrll aprint_error(": couldn't map registers\n"); 166 1.2.2.2 skrll return; 167 1.2.2.2 skrll } 168 1.2.2.2 skrll 169 1.2.2.2 skrll aprint_naive("\n"); 170 1.2.2.2 skrll aprint_normal(": Timer\n"); 171 1.2.2.2 skrll 172 1.2.2.2 skrll const u_int rate = clk_get_rate(sc->sc_clk); 173 1.2.2.2 skrll 174 1.2.2.2 skrll /* Disable IRQs and all timers */ 175 1.2.2.2 skrll TIMER_WRITE(sc, TMR_IRQ_EN_REG, 0); 176 1.2.2.2 skrll TIMER_WRITE(sc, TMR_IRQ_STAS_REG, TIMER_READ(sc, TMR_IRQ_STAS_REG)); 177 1.2.2.2 skrll /* Enable Timer 0 */ 178 1.2.2.2 skrll TIMER_WRITE(sc, TMR0_INTV_VALUE_REG, rate / hz); 179 1.2.2.2 skrll TIMER_WRITE(sc, TMR0_CTRL_REG, 180 1.2.2.2 skrll __SHIFTIN(TMR0_CTRL_CLK_SRC_OSC24M, TMR0_CTRL_CLK_SRC) | 181 1.2.2.2 skrll TMR0_CTRL_RELOAD | TMR0_CTRL_EN); 182 1.2.2.2 skrll 183 1.2.2.2 skrll /* Timecounter setup */ 184 1.2.2.2 skrll tc->tc_get_timecount = sunxi_timer_get_timecount; 185 1.2.2.2 skrll tc->tc_counter_mask = ~0u, 186 1.2.2.2 skrll tc->tc_frequency = clk_get_rate(sc->sc_clk); 187 1.2.2.2 skrll tc->tc_name = device_xname(self); 188 1.2.2.2 skrll tc->tc_quality = 100; 189 1.2.2.2 skrll tc->tc_priv = sc; 190 1.2.2.2 skrll tc_init(tc); 191 1.2.2.2 skrll 192 1.2.2.2 skrll /* Use this as the OS timer in UP configurations */ 193 1.2.2.2 skrll if (!arm_has_mpext_p) { 194 1.2.2.2 skrll timer_softc = sc; 195 1.2.2.2 skrll arm_fdt_timer_register(sunxi_timer_cpu_initclocks); 196 1.2.2.2 skrll } 197 1.2.2.2 skrll } 198 1.2.2.2 skrll 199 1.2.2.2 skrll CFATTACH_DECL_NEW(sunxi_timer, sizeof(struct sunxi_timer_softc), 200 1.2.2.2 skrll sunxi_timer_match, sunxi_timer_attach, NULL, NULL); 201
Indexes created Thu Oct 02 14:10:14 GMT 2025