sunxi_twi.c revision 1.14 
1/* $NetBSD: sunxi_twi.c,v 1.14 2021/01/18 02:35:49 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30
31__KERNEL_RCSID(0, "$NetBSD: sunxi_twi.c,v 1.14 2021/01/18 02:35:49 thorpej Exp $");
32
33#include <sys/param.h>
34#include <sys/bus.h>
35#include <sys/device.h>
36#include <sys/intr.h>
37#include <sys/systm.h>
38#include <sys/time.h>
39
40#include <dev/i2c/i2cvar.h>
41#include <dev/i2c/gttwsivar.h>
42#include <dev/i2c/gttwsireg.h>
43
44#include <dev/fdt/fdtvar.h>
45
46#define	TWI_CCR_REG	0x14
47#define	 TWI_CCR_CLK_M	__BITS(6,3)
48#define	 TWI_CCR_CLK_N	__BITS(2,0)
49
50static const bus_size_t sunxi_twi_regmap[] = {
51	[TWSI_SLAVEADDR]	= TWSI_ALLWINNER_SLAVEADDR,
52	[TWSI_EXTEND_SLAVEADDR]	= TWSI_ALLWINNER_EXTEND_SLAVEADDR,
53	[TWSI_DATA]		= TWSI_ALLWINNER_DATA,
54	[TWSI_CONTROL]		= TWSI_ALLWINNER_CONTROL,
55	[TWSI_STATUS]		= TWSI_ALLWINNER_STATUS,
56	[TWSI_BAUDRATE]		= TWSI_ALLWINNER_BAUDRATE,
57	[TWSI_SOFTRESET]	= TWSI_ALLWINNER_SOFTRESET,
58};
59
60static int sunxi_twi_match(device_t, cfdata_t, void *);
61static void sunxi_twi_attach(device_t, device_t, void *);
62
63struct sunxi_twi_config {
64	bool		iflg_rwc;
65};
66
67static const struct sunxi_twi_config sun4i_a10_i2c_config = {
68	.iflg_rwc = false,
69};
70
71static const struct sunxi_twi_config sun6i_a31_i2c_config = {
72	.iflg_rwc = true,
73};
74
75static const struct device_compatible_entry compat_data[] = {
76	{ .compat = "allwinner,sun4i-a10-i2c",	.data = &sun4i_a10_i2c_config },
77	{ .compat = "allwinner,sun6i-a31-i2c",	.data = &sun6i_a31_i2c_config },
78
79	{ 0 }
80};
81
82CFATTACH_DECL_NEW(sunxi_twi, sizeof(struct gttwsi_softc),
83	sunxi_twi_match, sunxi_twi_attach, NULL, NULL);
84
85static u_int
86sunxi_twi_calc_rate(u_int parent_rate, u_int n, u_int m)
87{
88	return parent_rate / (10 * (m + 1) * (1 << n));
89}
90
91static void
92sunxi_twi_set_clock(struct gttwsi_softc *sc, u_int parent_rate, u_int rate)
93{
94	uint32_t baud;
95	u_int n, m, best_rate;
96
97	baud = gttwsi_read_4(sc, TWSI_BAUDRATE);
98
99	for (best_rate = 0, n = 0; n < 8; n++) {
100		for (m = 0; m < 16; m++) {
101			const u_int tmp_rate =
102			    sunxi_twi_calc_rate(parent_rate, n, m);
103			if (tmp_rate <= rate && tmp_rate > best_rate) {
104				best_rate = tmp_rate;
105				baud = __SHIFTIN(n, TWI_CCR_CLK_N) |
106				       __SHIFTIN(m, TWI_CCR_CLK_M);
107			}
108		}
109	}
110
111	gttwsi_write_4(sc, TWSI_BAUDRATE, baud);
112	delay(10000);
113}
114
115static int
116sunxi_twi_match(device_t parent, cfdata_t cf, void *aux)
117{
118	struct fdt_attach_args * const faa = aux;
119
120	return of_match_compat_data(faa->faa_phandle, compat_data);
121}
122
123static void
124sunxi_twi_attach(device_t parent, device_t self, void *aux)
125{
126	struct gttwsi_softc * const sc = device_private(self);
127	struct fdt_attach_args * const faa = aux;
128	const struct sunxi_twi_config *conf;
129	const int phandle = faa->faa_phandle;
130	bus_space_tag_t bst = faa->faa_bst;
131	bus_space_handle_t bsh;
132	struct fdtbus_reset *rst;
133	struct clk *clk;
134	char intrstr[128];
135	bus_addr_t addr;
136	bus_size_t size;
137	void *ih;
138
139	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
140		aprint_error(": couldn't get registers\n");
141		return;
142	}
143
144	if (bus_space_map(bst, addr, size, 0, &bsh) != 0) {
145		aprint_error(": couldn't map registers\n");
146		return;
147	}
148
149	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
150		aprint_error(": failed to decode interrupt\n");
151		return;
152	}
153
154	if ((clk = fdtbus_clock_get_index(phandle, 0)) != NULL)
155		if (clk_enable(clk) != 0) {
156			aprint_error(": couldn't enable clock\n");
157			return;
158		}
159	if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL)
160		if (fdtbus_reset_deassert(rst) != 0) {
161			aprint_error(": couldn't de-assert reset\n");
162			return;
163		}
164
165	conf = of_search_compatible(phandle, compat_data)->data;
166	prop_dictionary_set_bool(device_properties(self), "iflg-rwc",
167	    conf->iflg_rwc);
168
169	/* Attach gttwsi core */
170	gttwsi_attach_subr(self, bst, bsh, sunxi_twi_regmap);
171
172	/*
173	 * Set clock rate to 100kHz.
174	 */
175	if (clk != NULL)
176		sunxi_twi_set_clock(sc, clk_get_rate(clk), 100000);
177
178	ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 0, gttwsi_intr,
179	    sc, device_xname(self));
180	if (ih == NULL) {
181		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
182		    intrstr);
183		return;
184	}
185	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
186
187	fdtbus_register_i2c_controller(&sc->sc_i2c, phandle);
188
189	fdtbus_attach_i2cbus(self, phandle, &sc->sc_i2c, iicbus_print);
190}
191