sunxi_twi.c revision 1.5 
1/* $NetBSD: sunxi_twi.c,v 1.5 2017/10/07 20:17:38 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30
31__KERNEL_RCSID(0, "$NetBSD: sunxi_twi.c,v 1.5 2017/10/07 20:17:38 jmcneill Exp $");
32
33#include <sys/param.h>
34#include <sys/bus.h>
35#include <sys/device.h>
36#include <sys/intr.h>
37#include <sys/systm.h>
38#include <sys/time.h>
39
40#include <dev/i2c/i2cvar.h>
41#include <dev/i2c/gttwsivar.h>
42
43#include <dev/fdt/fdtvar.h>
44
45#define	TWI_CCR_REG	0x14
46#define	 TWI_CCR_CLK_M	__BITS(6,3)
47#define	 TWI_CCR_CLK_N	__BITS(2,0)
48
49static int sunxi_twi_match(device_t, cfdata_t, void *);
50static void sunxi_twi_attach(device_t, device_t, void *);
51
52struct sunxi_twi_config {
53	bool		iflg_rwc;
54};
55
56static const struct sunxi_twi_config sun4i_a10_i2c_config = {
57	.iflg_rwc = false,
58};
59
60static const struct sunxi_twi_config sun6i_a31_i2c_config = {
61	.iflg_rwc = true,
62};
63
64static const struct of_compat_data compat_data[] = {
65	{ "allwinner,sun4i-a10-i2c",	(uintptr_t)&sun4i_a10_i2c_config },
66	{ "allwinner,sun6i-a31-i2c",	(uintptr_t)&sun6i_a31_i2c_config },
67	{ NULL }
68};
69
70CFATTACH_DECL_NEW(sunxi_twi, sizeof(struct gttwsi_softc),
71	sunxi_twi_match, sunxi_twi_attach, NULL, NULL);
72
73static i2c_tag_t
74sunxi_twi_get_tag(device_t dev)
75{
76	struct gttwsi_softc * const sc = device_private(dev);
77
78	return &sc->sc_i2c;
79}
80
81const struct fdtbus_i2c_controller_func sunxi_twi_funcs = {
82	.get_tag = sunxi_twi_get_tag,
83};
84
85static int
86sunxi_twi_match(device_t parent, cfdata_t cf, void *aux)
87{
88	struct fdt_attach_args * const faa = aux;
89
90	return of_match_compat_data(faa->faa_phandle, compat_data);
91}
92
93static void
94sunxi_twi_attach(device_t parent, device_t self, void *aux)
95{
96	struct gttwsi_softc * const sc = device_private(self);
97	struct fdt_attach_args * const faa = aux;
98	const struct sunxi_twi_config *conf;
99	struct i2cbus_attach_args iba;
100	const int phandle = faa->faa_phandle;
101	bus_space_tag_t bst = faa->faa_bst;
102	bus_space_handle_t bsh;
103	prop_dictionary_t devs;
104	uint32_t address_cells;
105	struct fdtbus_reset *rst;
106	struct clk *clk;
107	char intrstr[128];
108	bus_addr_t addr;
109	bus_size_t size;
110	void *ih;
111
112	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
113		aprint_error(": couldn't get registers\n");
114		return;
115	}
116
117	if (bus_space_map(bst, addr, size, 0, &bsh) != 0) {
118		aprint_error(": couldn't map registers\n");
119		return;
120	}
121
122	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
123		aprint_error(": failed to decode interrupt\n");
124		return;
125	}
126
127	if ((clk = fdtbus_clock_get_index(phandle, 0)) != NULL)
128		if (clk_enable(clk) != 0) {
129			aprint_error(": couldn't enable clock\n");
130			return;
131		}
132	if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL)
133		if (fdtbus_reset_deassert(rst) != 0) {
134			aprint_error(": couldn't de-assert reset\n");
135			return;
136		}
137
138	conf = (void *)of_search_compatible(phandle, compat_data)->data;
139	prop_dictionary_set_bool(device_properties(self), "iflg-rwc",
140	    conf->iflg_rwc);
141
142	/*
143	 * Set clock rate to 100kHz. From the datasheet:
144	 *   For 100Khz standard speed 2Wire, CLK_N=2, CLK_M=11
145	 *   F0=48M/2^2=12Mhz, F1=F0/(10*(11+1)) = 0.1Mhz
146	 */
147	const u_int m = 11, n = 2;
148	const uint32_t ccr = __SHIFTIN(n, TWI_CCR_CLK_N) |
149			     __SHIFTIN(m, TWI_CCR_CLK_M);
150	bus_space_write_4(bst, bsh, TWI_CCR_REG, ccr);
151
152	gttwsi_attach_subr(self, bst, bsh);
153
154	ih = fdtbus_intr_establish(phandle, 0, IPL_VM, 0, gttwsi_intr, sc);
155	if (ih == NULL) {
156		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
157		    intrstr);
158		return;
159	}
160	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
161
162	fdtbus_register_i2c_controller(self, phandle, &sunxi_twi_funcs);
163
164	devs = prop_dictionary_create();
165	if (of_getprop_uint32(phandle, "#address-cells", &address_cells))
166		address_cells = 1;
167
168	of_enter_i2c_devs(devs, phandle, address_cells * 4, 0);
169
170	memset(&iba, 0, sizeof(iba));
171	iba.iba_tag = &sc->sc_i2c;
172	iba.iba_child_devices = prop_dictionary_get(devs, "i2c-child-devices");
173	if (iba.iba_child_devices)
174		prop_object_retain(iba.iba_child_devices);
175	else
176		iba.iba_child_devices = prop_array_create();
177	prop_object_release(devs);
178
179	config_found_ia(self, "i2cbus", &iba, iicbus_print);
180}
181