am3_prcm.c revision 1.3
1 /* $NetBSD: am3_prcm.c,v 1.3 2019/10/27 16:31:26 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 31 __KERNEL_RCSID(1, "$NetBSD: am3_prcm.c,v 1.3 2019/10/27 16:31:26 jmcneill Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/bus.h> 35 #include <sys/device.h> 36 #include <sys/systm.h> 37 38 #include <dev/fdt/fdtvar.h> 39 40 #define TI_PRCM_PRIVATE 41 #include <arm/ti/ti_prcm.h> 42 43 #define AM3_PRCM_CM_PER 0x0000 44 #define AM3_PRCM_CM_WKUP 0x0400 45 #define AM3_PRCM_CM_DPLL 0x0500 46 #define AM3_PRCM_CM_MPU 0x0600 47 #define AM3_PRCM_CM_DEVICE 0x0700 48 #define AM3_PRCM_CM_RTC 0x0800 49 #define AM3_PRCM_CM_GFX 0x0900 50 #define AM3_PRCM_CM_CEFUSE 0x0a00 51 52 #define AM3_PRCM_CLKCTRL_MODULEMODE __BITS(1,0) 53 #define AM3_PRCM_CLKCTRL_MODULEMODE_ENABLE 0x2 54 55 static int am3_prcm_match(device_t, cfdata_t, void *); 56 static void am3_prcm_attach(device_t, device_t, void *); 57 58 static int 59 am3_prcm_hwmod_enable(struct ti_prcm_softc *sc, struct ti_prcm_clk *tc, int enable) 60 { 61 uint32_t val; 62 63 val = PRCM_READ(sc, tc->u.hwmod.reg); 64 val &= ~AM3_PRCM_CLKCTRL_MODULEMODE; 65 if (enable) 66 val |= __SHIFTIN(AM3_PRCM_CLKCTRL_MODULEMODE_ENABLE, 67 AM3_PRCM_CLKCTRL_MODULEMODE); 68 PRCM_WRITE(sc, tc->u.hwmod.reg, val); 69 70 return 0; 71 } 72 73 #define AM3_PRCM_HWMOD_PER(_name, _reg, _parent) \ 74 TI_PRCM_HWMOD((_name), AM3_PRCM_CM_PER + (_reg), (_parent), am3_prcm_hwmod_enable) 75 #define AM3_PRCM_HWMOD_WKUP(_name, _reg, _parent) \ 76 TI_PRCM_HWMOD((_name), AM3_PRCM_CM_WKUP + (_reg), (_parent), am3_prcm_hwmod_enable) 77 78 static const char * const compatible[] = { 79 "ti,am3-prcm", 80 NULL 81 }; 82 83 CFATTACH_DECL_NEW(am3_prcm, sizeof(struct ti_prcm_softc), 84 am3_prcm_match, am3_prcm_attach, NULL, NULL); 85 86 static struct ti_prcm_clk am3_prcm_clks[] = { 87 /* XXX until we get a proper clock tree */ 88 TI_PRCM_FIXED("FIXED_32K", 32768), 89 TI_PRCM_FIXED("FIXED_48MHZ", 48000000), 90 TI_PRCM_FIXED("FIXED_96MHZ", 96000000), 91 TI_PRCM_FIXED_FACTOR("PERIPH_CLK", 1, 1, "FIXED_48MHZ"), 92 TI_PRCM_FIXED_FACTOR("MMC_CLK", 1, 1, "FIXED_96MHZ"), 93 94 AM3_PRCM_HWMOD_PER("uart1", 0x6c, "PERIPH_CLK"), 95 AM3_PRCM_HWMOD_PER("uart2", 0x70, "PERIPH_CLK"), 96 AM3_PRCM_HWMOD_PER("uart3", 0x74, "PERIPH_CLK"), 97 AM3_PRCM_HWMOD_PER("uart4", 0x78, "PERIPH_CLK"), 98 AM3_PRCM_HWMOD_PER("uart5", 0x38, "PERIPH_CLK"), 99 100 AM3_PRCM_HWMOD_WKUP("timer0", 0x10, "FIXED_32K"), 101 AM3_PRCM_HWMOD_PER("timer2", 0x80, "PERIPH_CLK"), 102 AM3_PRCM_HWMOD_PER("timer3", 0x84, "PERIPH_CLK"), 103 AM3_PRCM_HWMOD_PER("timer4", 0x88, "PERIPH_CLK"), 104 AM3_PRCM_HWMOD_PER("timer5", 0xec, "PERIPH_CLK"), 105 AM3_PRCM_HWMOD_PER("timer6", 0xf0, "PERIPH_CLK"), 106 AM3_PRCM_HWMOD_PER("timer7", 0x7c, "PERIPH_CLK"), 107 108 AM3_PRCM_HWMOD_PER("mmc0", 0x3c, "MMC_CLK"), 109 AM3_PRCM_HWMOD_PER("mmc1", 0xf4, "MMC_CLK"), 110 AM3_PRCM_HWMOD_PER("mmc2", 0xf8, "MMC_CLK"), 111 112 AM3_PRCM_HWMOD_PER("tpcc", 0xbc, "PERIPH_CLK"), 113 AM3_PRCM_HWMOD_PER("tptc0", 0x24, "PERIPH_CLK"), 114 AM3_PRCM_HWMOD_PER("tptc1", 0xfc, "PERIPH_CLK"), 115 AM3_PRCM_HWMOD_PER("tptc2", 0x100, "PERIPH_CLK"), 116 117 AM3_PRCM_HWMOD_PER("usb_otg_hs", 0x1c, "PERIPH_CLK"), 118 }; 119 120 static int 121 am3_prcm_match(device_t parent, cfdata_t cf, void *aux) 122 { 123 struct fdt_attach_args * const faa = aux; 124 125 return of_match_compatible(faa->faa_phandle, compatible); 126 } 127 128 static void 129 am3_prcm_attach(device_t parent, device_t self, void *aux) 130 { 131 struct ti_prcm_softc * const sc = device_private(self); 132 struct fdt_attach_args * const faa = aux; 133 134 sc->sc_dev = self; 135 sc->sc_phandle = faa->faa_phandle; 136 sc->sc_bst = faa->faa_bst; 137 138 sc->sc_clks = am3_prcm_clks; 139 sc->sc_nclks = __arraycount(am3_prcm_clks); 140 141 if (ti_prcm_attach(sc) != 0) 142 return; 143 144 aprint_naive("\n"); 145 aprint_normal(": AM3xxx PRCM\n"); 146 } 147
Indexes created Tue Sep 30 11:09:46 GMT 2025