omap3_cm.c revision 1.4.10.2
1 1.4.10.2 martin /* $NetBSD: omap3_cm.c,v 1.4.10.2 2020/04/13 08:03:38 martin Exp $ */ 2 1.4.10.2 martin 3 1.4.10.2 martin /*- 4 1.4.10.2 martin * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 1.4.10.2 martin * All rights reserved. 6 1.4.10.2 martin * 7 1.4.10.2 martin * Redistribution and use in source and binary forms, with or without 8 1.4.10.2 martin * modification, are permitted provided that the following conditions 9 1.4.10.2 martin * are met: 10 1.4.10.2 martin * 1. Redistributions of source code must retain the above copyright 11 1.4.10.2 martin * notice, this list of conditions and the following disclaimer. 12 1.4.10.2 martin * 2. Redistributions in binary form must reproduce the above copyright 13 1.4.10.2 martin * notice, this list of conditions and the following disclaimer in the 14 1.4.10.2 martin * documentation and/or other materials provided with the distribution. 15 1.4.10.2 martin * 16 1.4.10.2 martin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.4.10.2 martin * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.4.10.2 martin * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.4.10.2 martin * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.4.10.2 martin * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.4.10.2 martin * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.4.10.2 martin * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.4.10.2 martin * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.4.10.2 martin * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.4.10.2 martin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.4.10.2 martin * SUCH DAMAGE. 27 1.4.10.2 martin */ 28 1.4.10.2 martin 29 1.4.10.2 martin #include <sys/cdefs.h> 30 1.4.10.2 martin 31 1.4.10.2 martin __KERNEL_RCSID(1, "$NetBSD: omap3_cm.c,v 1.4.10.2 2020/04/13 08:03:38 martin Exp $"); 32 1.4.10.2 martin 33 1.4.10.2 martin #include <sys/param.h> 34 1.4.10.2 martin #include <sys/bus.h> 35 1.4.10.2 martin #include <sys/device.h> 36 1.4.10.2 martin #include <sys/systm.h> 37 1.4.10.2 martin 38 1.4.10.2 martin #include <dev/fdt/fdtvar.h> 39 1.4.10.2 martin 40 1.4.10.2 martin #define TI_PRCM_PRIVATE 41 1.4.10.2 martin #include <arm/ti/ti_prcm.h> 42 1.4.10.2 martin 43 1.4.10.2 martin #define CM_CORE1_BASE 0x0a00 44 1.4.10.2 martin #define CM_CORE3_BASE 0x0a08 45 1.4.10.2 martin #define CM_WKUP_BASE 0x0c00 46 1.4.10.2 martin #define CM_PER_BASE 0x1000 47 1.4.10.2 martin #define CM_USBHOST_BASE 0x1400 48 1.4.10.2 martin 49 1.4.10.2 martin #define CM_FCLKEN 0x00 50 1.4.10.2 martin #define CM_ICLKEN 0x10 51 1.4.10.2 martin #define CM_AUTOIDLE 0x30 52 1.4.10.2 martin #define CM_CLKSEL 0x40 53 1.4.10.2 martin 54 1.4.10.2 martin static int omap3_cm_match(device_t, cfdata_t, void *); 55 1.4.10.2 martin static void omap3_cm_attach(device_t, device_t, void *); 56 1.4.10.2 martin 57 1.4.10.2 martin static int 58 1.4.10.2 martin omap3_cm_hwmod_nopenable(struct ti_prcm_softc *sc, struct ti_prcm_clk *tc, int enable) 59 1.4.10.2 martin { 60 1.4.10.2 martin return 0; 61 1.4.10.2 martin } 62 1.4.10.2 martin 63 1.4.10.2 martin static int 64 1.4.10.2 martin omap3_cm_hwmod_enable(struct ti_prcm_softc *sc, struct ti_prcm_clk *tc, int enable) 65 1.4.10.2 martin { 66 1.4.10.2 martin uint32_t val; 67 1.4.10.2 martin 68 1.4.10.2 martin val = PRCM_READ(sc, tc->u.hwmod.reg + CM_FCLKEN); 69 1.4.10.2 martin if (enable) 70 1.4.10.2 martin val |= tc->u.hwmod.mask; 71 1.4.10.2 martin else 72 1.4.10.2 martin val &= ~tc->u.hwmod.mask; 73 1.4.10.2 martin PRCM_WRITE(sc, tc->u.hwmod.reg + CM_FCLKEN, val); 74 1.4.10.2 martin 75 1.4.10.2 martin val = PRCM_READ(sc, tc->u.hwmod.reg + CM_ICLKEN); 76 1.4.10.2 martin if (enable) 77 1.4.10.2 martin val |= tc->u.hwmod.mask; 78 1.4.10.2 martin else 79 1.4.10.2 martin val &= ~tc->u.hwmod.mask; 80 1.4.10.2 martin PRCM_WRITE(sc, tc->u.hwmod.reg + CM_ICLKEN, val); 81 1.4.10.2 martin 82 1.4.10.2 martin if (tc->u.hwmod.flags & TI_HWMOD_DISABLE_AUTOIDLE) { 83 1.4.10.2 martin val = PRCM_READ(sc, tc->u.hwmod.reg + CM_AUTOIDLE); 84 1.4.10.2 martin val &= ~tc->u.hwmod.mask; 85 1.4.10.2 martin PRCM_WRITE(sc, tc->u.hwmod.reg + CM_AUTOIDLE, val); 86 1.4.10.2 martin } 87 1.4.10.2 martin 88 1.4.10.2 martin return 0; 89 1.4.10.2 martin } 90 1.4.10.2 martin 91 1.4.10.2 martin #define OMAP3_CM_HWMOD_CORE1(_name, _bit, _parent, _flags) \ 92 1.4.10.2 martin TI_PRCM_HWMOD_MASK((_name), CM_CORE1_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags)) 93 1.4.10.2 martin #define OMAP3_CM_HWMOD_CORE3(_name, _bit, _parent, _flags) \ 94 1.4.10.2 martin TI_PRCM_HWMOD_MASK((_name), CM_CORE3_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags)) 95 1.4.10.2 martin #define OMAP3_CM_HWMOD_WKUP(_name, _bit, _parent, _flags) \ 96 1.4.10.2 martin TI_PRCM_HWMOD_MASK((_name), CM_WKUP_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags)) 97 1.4.10.2 martin #define OMAP3_CM_HWMOD_PER(_name, _bit, _parent, _flags) \ 98 1.4.10.2 martin TI_PRCM_HWMOD_MASK((_name), CM_PER_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags)) 99 1.4.10.2 martin #define OMAP3_CM_HWMOD_USBHOST(_name, _bit, _parent, _flags) \ 100 1.4.10.2 martin TI_PRCM_HWMOD_MASK((_name), CM_USBHOST_BASE, __BIT(_bit), (_parent), omap3_cm_hwmod_enable, (_flags)) 101 1.4.10.2 martin #define OMAP3_CM_HWMOD_NOP(_name, _parent) \ 102 1.4.10.2 martin TI_PRCM_HWMOD_MASK((_name), 0, 0, (_parent), omap3_cm_hwmod_nopenable, 0) 103 1.4.10.2 martin 104 1.4.10.2 martin static const char * const compatible[] = { 105 1.4.10.2 martin "ti,omap3-cm", 106 1.4.10.2 martin NULL 107 1.4.10.2 martin }; 108 1.4.10.2 martin 109 1.4.10.2 martin CFATTACH_DECL_NEW(omap3_cm, sizeof(struct ti_prcm_softc), 110 1.4.10.2 martin omap3_cm_match, omap3_cm_attach, NULL, NULL); 111 1.4.10.2 martin 112 1.4.10.2 martin static struct ti_prcm_clk omap3_cm_clks[] = { 113 1.4.10.2 martin /* XXX until we get a proper clock tree */ 114 1.4.10.2 martin TI_PRCM_FIXED("FIXED_32K", 32768), 115 1.4.10.2 martin TI_PRCM_FIXED("SYS_CLK", 13000000), 116 1.4.10.2 martin TI_PRCM_FIXED("MMC_CLK", 96000000), 117 1.4.10.2 martin TI_PRCM_FIXED_FACTOR("PERIPH_CLK", 1, 1, "SYS_CLK"), 118 1.4.10.2 martin 119 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("usb_otg_hs", 4, "PERIPH_CLK", 0), 120 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mcbsp1", 9, "PERIPH_CLK", 0), 121 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mcbsp5", 10, "PERIPH_CLK", 0), 122 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("timer10", 11, "PERIPH_CLK", 0), 123 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("timer11", 12, "PERIPH_CLK", 0), 124 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("uart1", 13, "PERIPH_CLK", 0), 125 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("uart2", 14, "PERIPH_CLK", 0), 126 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("i2c1", 15, "PERIPH_CLK", 0), 127 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("i2c2", 16, "PERIPH_CLK", 0), 128 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("i2c3", 17, "PERIPH_CLK", 0), 129 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mcspi1", 18, "PERIPH_CLK", 0), 130 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mcspi2", 19, "PERIPH_CLK", 0), 131 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mcspi3", 20, "PERIPH_CLK", 0), 132 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mcspi4", 21, "PERIPH_CLK", 0), 133 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("hdq1w", 22, "PERIPH_CLK", 0), 134 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mmc1", 24, "MMC_CLK", 0), 135 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mmc2", 25, "MMC_CLK", 0), 136 1.4.10.2 martin OMAP3_CM_HWMOD_CORE1("mmc3", 30, "MMC_CLK", 0), 137 1.4.10.2 martin 138 1.4.10.2 martin OMAP3_CM_HWMOD_CORE3("usb_tll_hs", 2, "PERIPH_CLK", TI_HWMOD_DISABLE_AUTOIDLE), 139 1.4.10.2 martin 140 1.4.10.2 martin OMAP3_CM_HWMOD_WKUP("timer1", 0, "PERIPH_CLK", 0), 141 1.4.10.2 martin OMAP3_CM_HWMOD_WKUP("counter_32k", 2, "FIXED_32K", 0), 142 1.4.10.2 martin OMAP3_CM_HWMOD_WKUP("gpio1", 3, "PERIPH_CLK", 0), 143 1.4.10.2 martin OMAP3_CM_HWMOD_WKUP("wd_timer2", 5, "FIXED_32K", 0), 144 1.4.10.2 martin 145 1.4.10.2 martin OMAP3_CM_HWMOD_PER("mcbsp2", 0, "PERIPH_CLK", 0), 146 1.4.10.2 martin OMAP3_CM_HWMOD_PER("mcbsp3", 1, "PERIPH_CLK", 0), 147 1.4.10.2 martin OMAP3_CM_HWMOD_PER("mcbsp4", 2, "PERIPH_CLK", 0), 148 1.4.10.2 martin OMAP3_CM_HWMOD_PER("timer2", 3, "PERIPH_CLK", 0), 149 1.4.10.2 martin OMAP3_CM_HWMOD_PER("timer3", 4, "PERIPH_CLK", 0), 150 1.4.10.2 martin OMAP3_CM_HWMOD_PER("timer4", 5, "PERIPH_CLK", 0), 151 1.4.10.2 martin OMAP3_CM_HWMOD_PER("timer5", 6, "PERIPH_CLK", 0), 152 1.4.10.2 martin OMAP3_CM_HWMOD_PER("timer6", 7, "PERIPH_CLK", 0), 153 1.4.10.2 martin OMAP3_CM_HWMOD_PER("timer7", 8, "PERIPH_CLK", 0), 154 1.4.10.2 martin OMAP3_CM_HWMOD_PER("timer8", 9, "PERIPH_CLK", 0), 155 1.4.10.2 martin OMAP3_CM_HWMOD_PER("timer9", 10, "PERIPH_CLK", 0), 156 1.4.10.2 martin OMAP3_CM_HWMOD_PER("uart3", 11, "PERIPH_CLK", 0), 157 1.4.10.2 martin OMAP3_CM_HWMOD_PER("wd_timer3", 12, "PERIPH_CLK", 0), 158 1.4.10.2 martin OMAP3_CM_HWMOD_PER("gpio2", 13, "PERIPH_CLK", 0), 159 1.4.10.2 martin OMAP3_CM_HWMOD_PER("gpio3", 14, "PERIPH_CLK", 0), 160 1.4.10.2 martin OMAP3_CM_HWMOD_PER("gpio4", 15, "PERIPH_CLK", 0), 161 1.4.10.2 martin OMAP3_CM_HWMOD_PER("gpio5", 16, "PERIPH_CLK", 0), 162 1.4.10.2 martin OMAP3_CM_HWMOD_PER("gpio6", 17, "PERIPH_CLK", 0), 163 1.4.10.2 martin 164 1.4.10.2 martin OMAP3_CM_HWMOD_USBHOST("usb_host_hs", 0, "PERIPH_CLK", 0), 165 1.4.10.2 martin 166 1.4.10.2 martin OMAP3_CM_HWMOD_NOP("gpmc", "PERIPH_CLK"), 167 1.4.10.2 martin }; 168 1.4.10.2 martin 169 1.4.10.2 martin static void 170 1.4.10.2 martin omap3_cm_initclocks(struct ti_prcm_softc *sc) 171 1.4.10.2 martin { 172 1.4.10.2 martin uint32_t val; 173 1.4.10.2 martin 174 1.4.10.2 martin /* Select SYS_CLK for GPTIMER 2 and 3 */ 175 1.4.10.2 martin val = PRCM_READ(sc, CM_PER_BASE + CM_CLKSEL); 176 1.4.10.2 martin val |= __BIT(0); /* CLKSEL_GPT2 0x1: source is SYS_CLK */ 177 1.4.10.2 martin val |= __BIT(1); /* CLKSEL_GPT3 0x1: source is SYS_CLK */ 178 1.4.10.2 martin PRCM_WRITE(sc, CM_PER_BASE + CM_CLKSEL, val); 179 1.4.10.2 martin } 180 1.4.10.2 martin 181 1.4.10.2 martin static int 182 1.4.10.2 martin omap3_cm_match(device_t parent, cfdata_t cf, void *aux) 183 1.4.10.2 martin { 184 1.4.10.2 martin struct fdt_attach_args * const faa = aux; 185 1.4.10.2 martin 186 1.4.10.2 martin return of_match_compatible(faa->faa_phandle, compatible); 187 1.4.10.2 martin } 188 1.4.10.2 martin 189 1.4.10.2 martin static void 190 1.4.10.2 martin omap3_cm_attach(device_t parent, device_t self, void *aux) 191 1.4.10.2 martin { 192 1.4.10.2 martin struct ti_prcm_softc * const sc = device_private(self); 193 1.4.10.2 martin struct fdt_attach_args * const faa = aux; 194 1.4.10.2 martin int clocks; 195 1.4.10.2 martin 196 1.4.10.2 martin sc->sc_dev = self; 197 1.4.10.2 martin sc->sc_phandle = faa->faa_phandle; 198 1.4.10.2 martin sc->sc_bst = faa->faa_bst; 199 1.4.10.2 martin 200 1.4.10.2 martin sc->sc_clks = omap3_cm_clks; 201 1.4.10.2 martin sc->sc_nclks = __arraycount(omap3_cm_clks); 202 1.4.10.2 martin 203 1.4.10.2 martin if (ti_prcm_attach(sc) != 0) 204 1.4.10.2 martin return; 205 1.4.10.2 martin 206 1.4.10.2 martin aprint_naive("\n"); 207 1.4.10.2 martin aprint_normal(": OMAP3xxx CM\n"); 208 1.4.10.2 martin 209 1.4.10.2 martin omap3_cm_initclocks(sc); 210 1.4.10.2 martin 211 1.4.10.2 martin clocks = of_find_firstchild_byname(sc->sc_phandle, "clocks"); 212 1.4.10.2 martin if (clocks > 0) 213 1.4.10.2 martin fdt_add_bus(self, clocks, faa); 214 1.4.10.2 martin } 215
Indexes created Sat Oct 25 00:10:07 GMT 2025