ti_gpio.c revision 1.3.2.2 1 1.3.2.2 martin /* $NetBSD: ti_gpio.c,v 1.3.2.2 2019/11/27 13:46:44 martin Exp $ */
2 1.3.2.2 martin
3 1.3.2.2 martin /*-
4 1.3.2.2 martin * Copyright (c) 2019 Jared McNeill <jmcneill (at) invisible.ca>
5 1.3.2.2 martin * All rights reserved.
6 1.3.2.2 martin *
7 1.3.2.2 martin * Redistribution and use in source and binary forms, with or without
8 1.3.2.2 martin * modification, are permitted provided that the following conditions
9 1.3.2.2 martin * are met:
10 1.3.2.2 martin * 1. Redistributions of source code must retain the above copyright
11 1.3.2.2 martin * notice, this list of conditions and the following disclaimer.
12 1.3.2.2 martin * 2. Redistributions in binary form must reproduce the above copyright
13 1.3.2.2 martin * notice, this list of conditions and the following disclaimer in the
14 1.3.2.2 martin * documentation and/or other materials provided with the distribution.
15 1.3.2.2 martin *
16 1.3.2.2 martin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.3.2.2 martin * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.3.2.2 martin * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.3.2.2 martin * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.3.2.2 martin * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.3.2.2 martin * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.3.2.2 martin * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.3.2.2 martin * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.3.2.2 martin * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.3.2.2 martin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.3.2.2 martin * SUCH DAMAGE.
27 1.3.2.2 martin */
28 1.3.2.2 martin
29 1.3.2.2 martin #include <sys/cdefs.h>
30 1.3.2.2 martin __KERNEL_RCSID(0, "$NetBSD: ti_gpio.c,v 1.3.2.2 2019/11/27 13:46:44 martin Exp $");
31 1.3.2.2 martin
32 1.3.2.2 martin #include <sys/param.h>
33 1.3.2.2 martin #include <sys/bus.h>
34 1.3.2.2 martin #include <sys/device.h>
35 1.3.2.2 martin #include <sys/intr.h>
36 1.3.2.2 martin #include <sys/systm.h>
37 1.3.2.2 martin #include <sys/mutex.h>
38 1.3.2.2 martin #include <sys/kmem.h>
39 1.3.2.2 martin #include <sys/gpio.h>
40 1.3.2.2 martin #include <sys/bitops.h>
41 1.3.2.2 martin
42 1.3.2.2 martin #include <dev/fdt/fdtvar.h>
43 1.3.2.2 martin #include <dev/gpio/gpiovar.h>
44 1.3.2.2 martin
45 1.3.2.2 martin #include <arm/ti/ti_prcm.h>
46 1.3.2.2 martin
47 1.3.2.2 martin #define TI_GPIO_NPINS 32
48 1.3.2.2 martin
49 1.3.2.2 martin enum ti_gpio_type {
50 1.3.2.2 martin TI_GPIO_OMAP3,
51 1.3.2.2 martin TI_GPIO_OMAP4,
52 1.3.2.2 martin TI_NGPIO
53 1.3.2.2 martin };
54 1.3.2.2 martin
55 1.3.2.2 martin enum {
56 1.3.2.2 martin GPIO_IRQSTATUS1,
57 1.3.2.2 martin GPIO_IRQENABLE1, /* OMAP3 */
58 1.3.2.2 martin GPIO_IRQENABLE1_SET, /* OMAP4 */
59 1.3.2.2 martin GPIO_IRQENABLE1_CLR, /* OMAP4 */
60 1.3.2.2 martin GPIO_OE,
61 1.3.2.2 martin GPIO_DATAIN,
62 1.3.2.2 martin GPIO_DATAOUT,
63 1.3.2.2 martin GPIO_LEVELDETECT0,
64 1.3.2.2 martin GPIO_LEVELDETECT1,
65 1.3.2.2 martin GPIO_RISINGDETECT,
66 1.3.2.2 martin GPIO_FALLINGDETECT,
67 1.3.2.2 martin GPIO_CLEARDATAOUT,
68 1.3.2.2 martin GPIO_SETDATAOUT,
69 1.3.2.2 martin GPIO_NREG
70 1.3.2.2 martin };
71 1.3.2.2 martin
72 1.3.2.2 martin static const u_int ti_gpio_regmap[TI_NGPIO][GPIO_NREG] = {
73 1.3.2.2 martin [TI_GPIO_OMAP3] = {
74 1.3.2.2 martin [GPIO_IRQSTATUS1] = 0x18,
75 1.3.2.2 martin [GPIO_IRQENABLE1] = 0x1c,
76 1.3.2.2 martin [GPIO_OE] = 0x34,
77 1.3.2.2 martin [GPIO_DATAIN] = 0x38,
78 1.3.2.2 martin [GPIO_DATAOUT] = 0x3c,
79 1.3.2.2 martin [GPIO_LEVELDETECT0] = 0x40,
80 1.3.2.2 martin [GPIO_LEVELDETECT1] = 0x44,
81 1.3.2.2 martin [GPIO_RISINGDETECT] = 0x48,
82 1.3.2.2 martin [GPIO_FALLINGDETECT] = 0x4c,
83 1.3.2.2 martin [GPIO_CLEARDATAOUT] = 0x90,
84 1.3.2.2 martin [GPIO_SETDATAOUT] = 0x94,
85 1.3.2.2 martin },
86 1.3.2.2 martin [TI_GPIO_OMAP4] = {
87 1.3.2.2 martin [GPIO_IRQSTATUS1] = 0x2c,
88 1.3.2.2 martin [GPIO_IRQENABLE1_SET] = 0x34,
89 1.3.2.2 martin [GPIO_IRQENABLE1_CLR] = 0x38,
90 1.3.2.2 martin [GPIO_OE] = 0x134,
91 1.3.2.2 martin [GPIO_DATAIN] = 0x138,
92 1.3.2.2 martin [GPIO_DATAOUT] = 0x13c,
93 1.3.2.2 martin [GPIO_LEVELDETECT0] = 0x140,
94 1.3.2.2 martin [GPIO_LEVELDETECT1] = 0x144,
95 1.3.2.2 martin [GPIO_RISINGDETECT] = 0x148,
96 1.3.2.2 martin [GPIO_FALLINGDETECT] = 0x14c,
97 1.3.2.2 martin [GPIO_CLEARDATAOUT] = 0x190,
98 1.3.2.2 martin [GPIO_SETDATAOUT] = 0x194,
99 1.3.2.2 martin },
100 1.3.2.2 martin };
101 1.3.2.2 martin
102 1.3.2.2 martin static const struct of_compat_data compat_data[] = {
103 1.3.2.2 martin { "ti,omap3-gpio", TI_GPIO_OMAP3 },
104 1.3.2.2 martin { "ti,omap4-gpio", TI_GPIO_OMAP4 },
105 1.3.2.2 martin { NULL }
106 1.3.2.2 martin };
107 1.3.2.2 martin
108 1.3.2.2 martin struct ti_gpio_intr {
109 1.3.2.2 martin u_int intr_pin;
110 1.3.2.2 martin int (*intr_func)(void *);
111 1.3.2.2 martin void *intr_arg;
112 1.3.2.2 martin bool intr_mpsafe;
113 1.3.2.2 martin };
114 1.3.2.2 martin
115 1.3.2.2 martin struct ti_gpio_softc {
116 1.3.2.2 martin device_t sc_dev;
117 1.3.2.2 martin bus_space_tag_t sc_bst;
118 1.3.2.2 martin bus_space_handle_t sc_bsh;
119 1.3.2.2 martin kmutex_t sc_lock;
120 1.3.2.2 martin enum ti_gpio_type sc_type;
121 1.3.2.2 martin const char *sc_modname;
122 1.3.2.2 martin void *sc_ih;
123 1.3.2.2 martin
124 1.3.2.2 martin struct gpio_chipset_tag sc_gp;
125 1.3.2.2 martin gpio_pin_t sc_pins[TI_GPIO_NPINS];
126 1.3.2.2 martin bool sc_pinout[TI_GPIO_NPINS];
127 1.3.2.2 martin struct ti_gpio_intr sc_intr[TI_GPIO_NPINS];
128 1.3.2.2 martin device_t sc_gpiodev;
129 1.3.2.2 martin };
130 1.3.2.2 martin
131 1.3.2.2 martin struct ti_gpio_pin {
132 1.3.2.2 martin struct ti_gpio_softc *pin_sc;
133 1.3.2.2 martin u_int pin_nr;
134 1.3.2.2 martin int pin_flags;
135 1.3.2.2 martin bool pin_actlo;
136 1.3.2.2 martin };
137 1.3.2.2 martin
138 1.3.2.2 martin #define RD4(sc, reg) \
139 1.3.2.2 martin bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, ti_gpio_regmap[(sc)->sc_type][(reg)])
140 1.3.2.2 martin #define WR4(sc, reg, val) \
141 1.3.2.2 martin bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, ti_gpio_regmap[(sc)->sc_type][(reg)], (val))
142 1.3.2.2 martin
143 1.3.2.2 martin static int ti_gpio_match(device_t, cfdata_t, void *);
144 1.3.2.2 martin static void ti_gpio_attach(device_t, device_t, void *);
145 1.3.2.2 martin
146 1.3.2.2 martin CFATTACH_DECL_NEW(ti_gpio, sizeof(struct ti_gpio_softc),
147 1.3.2.2 martin ti_gpio_match, ti_gpio_attach, NULL, NULL);
148 1.3.2.2 martin
149 1.3.2.2 martin static int
150 1.3.2.2 martin ti_gpio_ctl(struct ti_gpio_softc *sc, u_int pin, int flags)
151 1.3.2.2 martin {
152 1.3.2.2 martin uint32_t oe;
153 1.3.2.2 martin
154 1.3.2.2 martin KASSERT(mutex_owned(&sc->sc_lock));
155 1.3.2.2 martin
156 1.3.2.2 martin oe = RD4(sc, GPIO_OE);
157 1.3.2.2 martin if (flags & GPIO_PIN_INPUT)
158 1.3.2.2 martin oe |= __BIT(pin);
159 1.3.2.2 martin else if (flags & GPIO_PIN_OUTPUT)
160 1.3.2.2 martin oe &= ~__BIT(pin);
161 1.3.2.2 martin WR4(sc, GPIO_OE, oe);
162 1.3.2.2 martin
163 1.3.2.2 martin sc->sc_pinout[pin] = (flags & GPIO_PIN_OUTPUT) != 0;
164 1.3.2.2 martin
165 1.3.2.2 martin return 0;
166 1.3.2.2 martin }
167 1.3.2.2 martin
168 1.3.2.2 martin static void *
169 1.3.2.2 martin ti_gpio_acquire(device_t dev, const void *data, size_t len, int flags)
170 1.3.2.2 martin {
171 1.3.2.2 martin struct ti_gpio_softc * const sc = device_private(dev);
172 1.3.2.2 martin struct ti_gpio_pin *gpin;
173 1.3.2.2 martin const u_int *gpio = data;
174 1.3.2.2 martin int error;
175 1.3.2.2 martin
176 1.3.2.2 martin if (len != 12)
177 1.3.2.2 martin return NULL;
178 1.3.2.2 martin
179 1.3.2.2 martin const uint8_t pin = be32toh(gpio[1]) & 0xff;
180 1.3.2.2 martin const bool actlo = be32toh(gpio[2]) & 1;
181 1.3.2.2 martin
182 1.3.2.2 martin if (pin >= __arraycount(sc->sc_pins))
183 1.3.2.2 martin return NULL;
184 1.3.2.2 martin
185 1.3.2.2 martin mutex_enter(&sc->sc_lock);
186 1.3.2.2 martin error = ti_gpio_ctl(sc, pin, flags);
187 1.3.2.2 martin mutex_exit(&sc->sc_lock);
188 1.3.2.2 martin
189 1.3.2.2 martin if (error != 0)
190 1.3.2.2 martin return NULL;
191 1.3.2.2 martin
192 1.3.2.2 martin gpin = kmem_zalloc(sizeof(*gpin), KM_SLEEP);
193 1.3.2.2 martin gpin->pin_sc = sc;
194 1.3.2.2 martin gpin->pin_nr = pin;
195 1.3.2.2 martin gpin->pin_flags = flags;
196 1.3.2.2 martin gpin->pin_actlo = actlo;
197 1.3.2.2 martin
198 1.3.2.2 martin return gpin;
199 1.3.2.2 martin }
200 1.3.2.2 martin
201 1.3.2.2 martin static void
202 1.3.2.2 martin ti_gpio_release(device_t dev, void *priv)
203 1.3.2.2 martin {
204 1.3.2.2 martin struct ti_gpio_softc * const sc = device_private(dev);
205 1.3.2.2 martin struct ti_gpio_pin *pin = priv;
206 1.3.2.2 martin
207 1.3.2.2 martin mutex_enter(&sc->sc_lock);
208 1.3.2.2 martin ti_gpio_ctl(pin->pin_sc, pin->pin_nr, GPIO_PIN_INPUT);
209 1.3.2.2 martin mutex_exit(&sc->sc_lock);
210 1.3.2.2 martin
211 1.3.2.2 martin kmem_free(pin, sizeof(*pin));
212 1.3.2.2 martin }
213 1.3.2.2 martin
214 1.3.2.2 martin static int
215 1.3.2.2 martin ti_gpio_read(device_t dev, void *priv, bool raw)
216 1.3.2.2 martin {
217 1.3.2.2 martin struct ti_gpio_softc * const sc = device_private(dev);
218 1.3.2.2 martin struct ti_gpio_pin *pin = priv;
219 1.3.2.2 martin uint32_t data;
220 1.3.2.2 martin int val;
221 1.3.2.2 martin
222 1.3.2.2 martin KASSERT(sc == pin->pin_sc);
223 1.3.2.2 martin
224 1.3.2.2 martin const uint32_t data_mask = __BIT(pin->pin_nr);
225 1.3.2.2 martin
226 1.3.2.2 martin /* No lock required for reads */
227 1.3.2.2 martin if (sc->sc_pinout[pin->pin_nr])
228 1.3.2.2 martin data = RD4(sc, GPIO_DATAOUT);
229 1.3.2.2 martin else
230 1.3.2.2 martin data = RD4(sc, GPIO_DATAIN);
231 1.3.2.2 martin val = __SHIFTOUT(data, data_mask);
232 1.3.2.2 martin if (!raw && pin->pin_actlo)
233 1.3.2.2 martin val = !val;
234 1.3.2.2 martin
235 1.3.2.2 martin return val;
236 1.3.2.2 martin }
237 1.3.2.2 martin
238 1.3.2.2 martin static void
239 1.3.2.2 martin ti_gpio_write(device_t dev, void *priv, int val, bool raw)
240 1.3.2.2 martin {
241 1.3.2.2 martin struct ti_gpio_softc * const sc = device_private(dev);
242 1.3.2.2 martin struct ti_gpio_pin *pin = priv;
243 1.3.2.2 martin
244 1.3.2.2 martin KASSERT(sc == pin->pin_sc);
245 1.3.2.2 martin
246 1.3.2.2 martin const uint32_t data_mask = __BIT(pin->pin_nr);
247 1.3.2.2 martin
248 1.3.2.2 martin if (!raw && pin->pin_actlo)
249 1.3.2.2 martin val = !val;
250 1.3.2.2 martin
251 1.3.2.2 martin const u_int data_reg = val ? GPIO_SETDATAOUT : GPIO_CLEARDATAOUT;
252 1.3.2.2 martin
253 1.3.2.2 martin WR4(sc, data_reg, data_mask);
254 1.3.2.2 martin }
255 1.3.2.2 martin
256 1.3.2.2 martin static struct fdtbus_gpio_controller_func ti_gpio_funcs = {
257 1.3.2.2 martin .acquire = ti_gpio_acquire,
258 1.3.2.2 martin .release = ti_gpio_release,
259 1.3.2.2 martin .read = ti_gpio_read,
260 1.3.2.2 martin .write = ti_gpio_write,
261 1.3.2.2 martin };
262 1.3.2.2 martin
263 1.3.2.2 martin static void
264 1.3.2.2 martin ti_gpio_intr_disestablish(device_t dev, void *ih)
265 1.3.2.2 martin {
266 1.3.2.2 martin struct ti_gpio_softc * const sc = device_private(dev);
267 1.3.2.2 martin struct ti_gpio_intr *intr = ih;
268 1.3.2.2 martin const u_int pin = intr->intr_pin;
269 1.3.2.2 martin const uint32_t pin_mask = __BIT(pin);
270 1.3.2.2 martin uint32_t val;
271 1.3.2.2 martin
272 1.3.2.2 martin /* Disable interrupts */
273 1.3.2.2 martin if (sc->sc_type == TI_GPIO_OMAP3) {
274 1.3.2.2 martin val = RD4(sc, GPIO_IRQENABLE1);
275 1.3.2.2 martin WR4(sc, GPIO_IRQENABLE1, val & ~pin_mask);
276 1.3.2.2 martin } else {
277 1.3.2.2 martin WR4(sc, GPIO_IRQENABLE1_CLR, pin_mask);
278 1.3.2.2 martin }
279 1.3.2.2 martin
280 1.3.2.2 martin intr->intr_func = NULL;
281 1.3.2.2 martin intr->intr_arg = NULL;
282 1.3.2.2 martin }
283 1.3.2.2 martin
284 1.3.2.2 martin static void *
285 1.3.2.2 martin ti_gpio_intr_establish(device_t dev, u_int *specifier, int ipl, int flags,
286 1.3.2.2 martin int (*func)(void *), void *arg)
287 1.3.2.2 martin {
288 1.3.2.2 martin struct ti_gpio_softc * const sc = device_private(dev);
289 1.3.2.2 martin uint32_t val;
290 1.3.2.2 martin
291 1.3.2.2 martin /* 1st cell is the pin */
292 1.3.2.2 martin /* 2nd cell is flags */
293 1.3.2.2 martin const u_int pin = be32toh(specifier[0]);
294 1.3.2.2 martin const u_int type = be32toh(specifier[2]) & 0xf;
295 1.3.2.2 martin
296 1.3.2.2 martin if (ipl != IPL_VM || pin >= __arraycount(sc->sc_pins))
297 1.3.2.2 martin return NULL;
298 1.3.2.2 martin
299 1.3.2.2 martin /*
300 1.3.2.2 martin * Enabling both high and low level triggers will cause the GPIO
301 1.3.2.2 martin * controller to always assert the interrupt.
302 1.3.2.2 martin */
303 1.3.2.2 martin if ((type & (FDT_INTR_TYPE_LOW_LEVEL|FDT_INTR_TYPE_HIGH_LEVEL)) ==
304 1.3.2.2 martin (FDT_INTR_TYPE_LOW_LEVEL|FDT_INTR_TYPE_HIGH_LEVEL))
305 1.3.2.2 martin return NULL;
306 1.3.2.2 martin
307 1.3.2.2 martin if (sc->sc_intr[pin].intr_func != NULL)
308 1.3.2.2 martin return NULL;
309 1.3.2.2 martin
310 1.3.2.2 martin /* Set pin as input */
311 1.3.2.2 martin if (ti_gpio_ctl(sc, pin, GPIO_PIN_INPUT) != 0)
312 1.3.2.2 martin return NULL;
313 1.3.2.2 martin
314 1.3.2.2 martin sc->sc_intr[pin].intr_pin = pin;
315 1.3.2.2 martin sc->sc_intr[pin].intr_func = func;
316 1.3.2.2 martin sc->sc_intr[pin].intr_arg = arg;
317 1.3.2.2 martin sc->sc_intr[pin].intr_mpsafe = (flags & FDT_INTR_MPSAFE) != 0;
318 1.3.2.2 martin
319 1.3.2.2 martin const uint32_t pin_mask = __BIT(pin);
320 1.3.2.2 martin
321 1.3.2.2 martin /* Configure triggers */
322 1.3.2.2 martin val = RD4(sc, GPIO_LEVELDETECT0);
323 1.3.2.2 martin if ((type & FDT_INTR_TYPE_LOW_LEVEL) != 0)
324 1.3.2.2 martin val |= pin_mask;
325 1.3.2.2 martin else
326 1.3.2.2 martin val &= ~pin_mask;
327 1.3.2.2 martin WR4(sc, GPIO_LEVELDETECT0, val);
328 1.3.2.2 martin
329 1.3.2.2 martin val = RD4(sc, GPIO_LEVELDETECT1);
330 1.3.2.2 martin if ((type & FDT_INTR_TYPE_HIGH_LEVEL) != 0)
331 1.3.2.2 martin val |= pin_mask;
332 1.3.2.2 martin else
333 1.3.2.2 martin val &= ~pin_mask;
334 1.3.2.2 martin WR4(sc, GPIO_LEVELDETECT1, val);
335 1.3.2.2 martin
336 1.3.2.2 martin val = RD4(sc, GPIO_RISINGDETECT);
337 1.3.2.2 martin if ((type & FDT_INTR_TYPE_POS_EDGE) != 0)
338 1.3.2.2 martin val |= pin_mask;
339 1.3.2.2 martin else
340 1.3.2.2 martin val &= ~pin_mask;
341 1.3.2.2 martin WR4(sc, GPIO_RISINGDETECT, val);
342 1.3.2.2 martin
343 1.3.2.2 martin val = RD4(sc, GPIO_FALLINGDETECT);
344 1.3.2.2 martin if ((type & FDT_INTR_TYPE_NEG_EDGE) != 0)
345 1.3.2.2 martin val |= pin_mask;
346 1.3.2.2 martin else
347 1.3.2.2 martin val &= ~pin_mask;
348 1.3.2.2 martin WR4(sc, GPIO_FALLINGDETECT, val);
349 1.3.2.2 martin
350 1.3.2.2 martin /* Enable interrupts */
351 1.3.2.2 martin if (sc->sc_type == TI_GPIO_OMAP3) {
352 1.3.2.2 martin val = RD4(sc, GPIO_IRQENABLE1);
353 1.3.2.2 martin WR4(sc, GPIO_IRQENABLE1, val | pin_mask);
354 1.3.2.2 martin } else {
355 1.3.2.2 martin WR4(sc, GPIO_IRQENABLE1_SET, pin_mask);
356 1.3.2.2 martin }
357 1.3.2.2 martin
358 1.3.2.2 martin return &sc->sc_intr[pin];
359 1.3.2.2 martin }
360 1.3.2.2 martin
361 1.3.2.2 martin static bool
362 1.3.2.2 martin ti_gpio_intrstr(device_t dev, u_int *specifier, char *buf, size_t buflen)
363 1.3.2.2 martin {
364 1.3.2.2 martin struct ti_gpio_softc * const sc = device_private(dev);
365 1.3.2.2 martin
366 1.3.2.2 martin /* 1st cell is the pin */
367 1.3.2.2 martin /* 2nd cell is flags */
368 1.3.2.2 martin const u_int pin = be32toh(specifier[0]);
369 1.3.2.2 martin
370 1.3.2.2 martin if (pin >= __arraycount(sc->sc_pins))
371 1.3.2.2 martin return false;
372 1.3.2.2 martin
373 1.3.2.2 martin snprintf(buf, buflen, "%s pin %d", sc->sc_modname, pin);
374 1.3.2.2 martin return true;
375 1.3.2.2 martin }
376 1.3.2.2 martin
377 1.3.2.2 martin static struct fdtbus_interrupt_controller_func ti_gpio_intrfuncs = {
378 1.3.2.2 martin .establish = ti_gpio_intr_establish,
379 1.3.2.2 martin .disestablish = ti_gpio_intr_disestablish,
380 1.3.2.2 martin .intrstr = ti_gpio_intrstr,
381 1.3.2.2 martin };
382 1.3.2.2 martin
383 1.3.2.2 martin static int
384 1.3.2.2 martin ti_gpio_pin_read(void *priv, int pin)
385 1.3.2.2 martin {
386 1.3.2.2 martin struct ti_gpio_softc * const sc = priv;
387 1.3.2.2 martin uint32_t data;
388 1.3.2.2 martin int val;
389 1.3.2.2 martin
390 1.3.2.2 martin KASSERT(pin < __arraycount(sc->sc_pins));
391 1.3.2.2 martin
392 1.3.2.2 martin const uint32_t data_mask = __BIT(pin);
393 1.3.2.2 martin
394 1.3.2.2 martin data = RD4(sc, GPIO_DATAIN);
395 1.3.2.2 martin val = __SHIFTOUT(data, data_mask);
396 1.3.2.2 martin
397 1.3.2.2 martin return val;
398 1.3.2.2 martin }
399 1.3.2.2 martin
400 1.3.2.2 martin static void
401 1.3.2.2 martin ti_gpio_pin_write(void *priv, int pin, int val)
402 1.3.2.2 martin {
403 1.3.2.2 martin struct ti_gpio_softc * const sc = priv;
404 1.3.2.2 martin
405 1.3.2.2 martin KASSERT(pin < __arraycount(sc->sc_pins));
406 1.3.2.2 martin
407 1.3.2.2 martin const u_int data_reg = val ? GPIO_SETDATAOUT : GPIO_CLEARDATAOUT;
408 1.3.2.2 martin const uint32_t data_mask = __BIT(pin);
409 1.3.2.2 martin
410 1.3.2.2 martin WR4(sc, data_reg, data_mask);
411 1.3.2.2 martin }
412 1.3.2.2 martin
413 1.3.2.2 martin static void
414 1.3.2.2 martin ti_gpio_pin_ctl(void *priv, int pin, int flags)
415 1.3.2.2 martin {
416 1.3.2.2 martin struct ti_gpio_softc * const sc = priv;
417 1.3.2.2 martin
418 1.3.2.2 martin KASSERT(pin < __arraycount(sc->sc_pins));
419 1.3.2.2 martin
420 1.3.2.2 martin mutex_enter(&sc->sc_lock);
421 1.3.2.2 martin ti_gpio_ctl(sc, pin, flags);
422 1.3.2.2 martin mutex_exit(&sc->sc_lock);
423 1.3.2.2 martin }
424 1.3.2.2 martin
425 1.3.2.2 martin static void
426 1.3.2.2 martin ti_gpio_attach_ports(struct ti_gpio_softc *sc)
427 1.3.2.2 martin {
428 1.3.2.2 martin struct gpio_chipset_tag *gp = &sc->sc_gp;
429 1.3.2.2 martin struct gpiobus_attach_args gba;
430 1.3.2.2 martin u_int pin;
431 1.3.2.2 martin
432 1.3.2.2 martin gp->gp_cookie = sc;
433 1.3.2.2 martin gp->gp_pin_read = ti_gpio_pin_read;
434 1.3.2.2 martin gp->gp_pin_write = ti_gpio_pin_write;
435 1.3.2.2 martin gp->gp_pin_ctl = ti_gpio_pin_ctl;
436 1.3.2.2 martin
437 1.3.2.2 martin for (pin = 0; pin < __arraycount(sc->sc_pins); pin++) {
438 1.3.2.2 martin sc->sc_pins[pin].pin_num = pin;
439 1.3.2.2 martin sc->sc_pins[pin].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
440 1.3.2.2 martin sc->sc_pins[pin].pin_state = ti_gpio_pin_read(sc, pin);
441 1.3.2.2 martin }
442 1.3.2.2 martin
443 1.3.2.2 martin memset(&gba, 0, sizeof(gba));
444 1.3.2.2 martin gba.gba_gc = gp;
445 1.3.2.2 martin gba.gba_pins = sc->sc_pins;
446 1.3.2.2 martin gba.gba_npins = __arraycount(sc->sc_pins);
447 1.3.2.2 martin sc->sc_gpiodev = config_found_ia(sc->sc_dev, "gpiobus", &gba, NULL);
448 1.3.2.2 martin }
449 1.3.2.2 martin
450 1.3.2.2 martin static int
451 1.3.2.2 martin ti_gpio_intr(void *priv)
452 1.3.2.2 martin {
453 1.3.2.2 martin struct ti_gpio_softc * const sc = priv;
454 1.3.2.2 martin uint32_t status;
455 1.3.2.2 martin u_int bit;
456 1.3.2.2 martin int rv = 0;
457 1.3.2.2 martin
458 1.3.2.2 martin status = RD4(sc, GPIO_IRQSTATUS1);
459 1.3.2.2 martin WR4(sc, GPIO_IRQSTATUS1, status);
460 1.3.2.2 martin
461 1.3.2.2 martin while ((bit = ffs32(status)) != 0) {
462 1.3.2.2 martin const u_int pin = bit - 1;
463 1.3.2.2 martin const uint32_t pin_mask = __BIT(pin);
464 1.3.2.2 martin struct ti_gpio_intr *intr = &sc->sc_intr[pin];
465 1.3.2.2 martin status &= ~pin_mask;
466 1.3.2.2 martin if (intr->intr_func == NULL)
467 1.3.2.2 martin continue;
468 1.3.2.2 martin if (!intr->intr_mpsafe)
469 1.3.2.2 martin KERNEL_LOCK(1, curlwp);
470 1.3.2.2 martin rv |= intr->intr_func(intr->intr_arg);
471 1.3.2.2 martin if (!intr->intr_mpsafe)
472 1.3.2.2 martin KERNEL_UNLOCK_ONE(curlwp);
473 1.3.2.2 martin }
474 1.3.2.2 martin
475 1.3.2.2 martin return rv;
476 1.3.2.2 martin }
477 1.3.2.2 martin
478 1.3.2.2 martin static int
479 1.3.2.2 martin ti_gpio_match(device_t parent, cfdata_t cf, void *aux)
480 1.3.2.2 martin {
481 1.3.2.2 martin struct fdt_attach_args * const faa = aux;
482 1.3.2.2 martin
483 1.3.2.2 martin return of_match_compat_data(faa->faa_phandle, compat_data);
484 1.3.2.2 martin }
485 1.3.2.2 martin
486 1.3.2.2 martin static void
487 1.3.2.2 martin ti_gpio_attach(device_t parent, device_t self, void *aux)
488 1.3.2.2 martin {
489 1.3.2.2 martin struct ti_gpio_softc * const sc = device_private(self);
490 1.3.2.2 martin struct fdt_attach_args * const faa = aux;
491 1.3.2.2 martin const int phandle = faa->faa_phandle;
492 1.3.2.2 martin char intrstr[128];
493 1.3.2.2 martin bus_addr_t addr;
494 1.3.2.2 martin bus_size_t size;
495 1.3.2.2 martin
496 1.3.2.2 martin if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
497 1.3.2.2 martin aprint_error(": couldn't get registers\n");
498 1.3.2.2 martin return;
499 1.3.2.2 martin }
500 1.3.2.2 martin if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
501 1.3.2.2 martin aprint_error(": couldn't decode interrupt\n");
502 1.3.2.2 martin return;
503 1.3.2.2 martin }
504 1.3.2.2 martin if (ti_prcm_enable_hwmod(phandle, 0) != 0) {
505 1.3.2.2 martin aprint_error(": couldn't enable module\n");
506 1.3.2.2 martin return;
507 1.3.2.2 martin }
508 1.3.2.2 martin
509 1.3.2.2 martin sc->sc_dev = self;
510 1.3.2.2 martin sc->sc_bst = faa->faa_bst;
511 1.3.2.2 martin if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
512 1.3.2.2 martin aprint_error(": couldn't map registers\n");
513 1.3.2.2 martin return;
514 1.3.2.2 martin }
515 1.3.2.2 martin sc->sc_type = of_search_compatible(phandle, compat_data)->data;
516 1.3.2.2 martin mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
517 1.3.2.2 martin
518 1.3.2.2 martin sc->sc_modname = fdtbus_get_string(phandle, "ti,hwmods");
519 1.3.2.2 martin if (sc->sc_modname == NULL)
520 1.3.2.2 martin sc->sc_modname = fdtbus_get_string(OF_parent(phandle), "ti,hwmods");
521 1.3.2.2 martin
522 1.3.2.2 martin aprint_naive("\n");
523 1.3.2.2 martin aprint_normal(": GPIO (%s)\n", sc->sc_modname);
524 1.3.2.2 martin
525 1.3.2.2 martin fdtbus_register_gpio_controller(self, phandle, &ti_gpio_funcs);
526 1.3.2.2 martin
527 1.3.2.2 martin ti_gpio_attach_ports(sc);
528 1.3.2.2 martin
529 1.3.2.2 martin sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_VM, FDT_INTR_MPSAFE,
530 1.3.2.2 martin ti_gpio_intr, sc);
531 1.3.2.2 martin if (sc->sc_ih == NULL) {
532 1.3.2.2 martin aprint_error_dev(self, "failed to establish interrupt on %s\n",
533 1.3.2.2 martin intrstr);
534 1.3.2.2 martin return;
535 1.3.2.2 martin }
536 1.3.2.2 martin aprint_normal_dev(self, "interrupting on %s\n", intrstr);
537 1.3.2.2 martin fdtbus_register_interrupt_controller(self, phandle, &ti_gpio_intrfuncs);
538 1.3.2.2 martin }
539