ti_lcdc.c revision 1.1 1 /* $NetBSD: ti_lcdc.c,v 1.1 2019/11/03 22:59:06 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2019 Jared D. McNeill <jmcneill (at) invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: ti_lcdc.c,v 1.1 2019/11/03 22:59:06 jmcneill Exp $");
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/intr.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/conf.h>
39
40 #include <uvm/uvm_extern.h>
41 #include <uvm/uvm_object.h>
42 #include <uvm/uvm_device.h>
43
44 #include <drm/drmP.h>
45 #include <drm/drm_crtc.h>
46 #include <drm/drm_crtc_helper.h>
47 #include <drm/drm_plane_helper.h>
48 #include <drm/drm_fb_helper.h>
49
50 #include <dev/fdt/fdtvar.h>
51 #include <dev/fdt/fdt_port.h>
52
53 #include <arm/ti/ti_prcm.h>
54 #include <arm/ti/ti_lcdc.h>
55 #include <arm/ti/ti_lcdcreg.h>
56
57 static const char * const compatible[] = {
58 "ti,am33xx-tilcdc",
59 NULL
60 };
61
62 enum {
63 TILCDC_PORT_OUTPUT = 0,
64 };
65
66 static int tilcdc_match(device_t, cfdata_t, void *);
67 static void tilcdc_attach(device_t, device_t, void *);
68
69 static int tilcdc_set_busid(struct drm_device *, struct drm_master *);
70
71 static int tilcdc_load(struct drm_device *, unsigned long);
72 static int tilcdc_unload(struct drm_device *);
73
74 static struct drm_driver tilcdc_driver = {
75 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
76 .dev_priv_size = 0,
77 .load = tilcdc_load,
78 .unload = tilcdc_unload,
79
80 .gem_free_object = drm_gem_cma_free_object,
81 .mmap_object = drm_gem_or_legacy_mmap_object,
82 .gem_uvm_ops = &drm_gem_cma_uvm_ops,
83
84 .dumb_create = drm_gem_cma_dumb_create,
85 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
86 .dumb_destroy = drm_gem_dumb_destroy,
87
88 .name = DRIVER_NAME,
89 .desc = DRIVER_DESC,
90 .date = DRIVER_DATE,
91 .major = DRIVER_MAJOR,
92 .minor = DRIVER_MINOR,
93 .patchlevel = DRIVER_PATCHLEVEL,
94
95 .set_busid = tilcdc_set_busid,
96 };
97
98 CFATTACH_DECL_NEW(ti_lcdc, sizeof(struct tilcdc_softc),
99 tilcdc_match, tilcdc_attach, NULL, NULL);
100
101 static int
102 tilcdc_mode_do_set_base(struct drm_crtc *crtc, struct drm_framebuffer *fb,
103 int x, int y, int atomic)
104 {
105 struct tilcdc_crtc *mixer_crtc = to_tilcdc_crtc(crtc);
106 struct tilcdc_softc * const sc = mixer_crtc->sc;
107 struct tilcdc_framebuffer *sfb = atomic?
108 to_tilcdc_framebuffer(fb) :
109 to_tilcdc_framebuffer(crtc->primary->fb);
110
111 const uint32_t paddr = (uint32_t)sfb->obj->dmamap->dm_segs[0].ds_addr;
112 const u_int psize = sfb->obj->dmamap->dm_segs[0].ds_len;
113
114 /* Framebuffer start address */
115 WR4(sc, LCD_LCDDMA_FB0_BASE, paddr);
116 WR4(sc, LCD_LCDDMA_FB0_CEILING, paddr + psize - 1);
117
118 return 0;
119 }
120
121 static void
122 tilcdc_destroy(struct drm_crtc *crtc)
123 {
124 drm_crtc_cleanup(crtc);
125 }
126
127 static const struct drm_crtc_funcs tilcdc_crtc_funcs = {
128 .set_config = drm_crtc_helper_set_config,
129 .destroy = tilcdc_destroy,
130 };
131
132 static void
133 tilcdc_dpms(struct drm_crtc *crtc, int mode)
134 {
135 }
136
137 static bool
138 tilcdc_mode_fixup(struct drm_crtc *crtc,
139 const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode)
140 {
141 adjusted_mode->hskew = mode->hsync_end - mode->hsync_start;
142 adjusted_mode->flags |= DRM_MODE_FLAG_HSKEW;
143
144 adjusted_mode->flags &= ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PHSYNC);
145 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
146 adjusted_mode->flags |= DRM_MODE_FLAG_PHSYNC;
147 else
148 adjusted_mode->flags |= DRM_MODE_FLAG_NHSYNC;
149
150
151 return true;
152 }
153
154 static int
155 tilcdc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
156 struct drm_display_mode *adjusted_mode, int x, int y,
157 struct drm_framebuffer *old_fb)
158 {
159 struct tilcdc_crtc *mixer_crtc = to_tilcdc_crtc(crtc);
160 struct tilcdc_softc * const sc = mixer_crtc->sc;
161 uint32_t val;
162 u_int clk_div;
163
164 const u_int hspw = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
165 const u_int hbp = adjusted_mode->crtc_htotal - adjusted_mode->crtc_hsync_end;
166 const u_int hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay;
167 const u_int vspw = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
168 const u_int vbp = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_end;
169 const u_int vfp = adjusted_mode->crtc_vsync_start - adjusted_mode->crtc_vdisplay;
170
171 const u_int rate = clk_get_rate(sc->sc_clk);
172 for (clk_div = 2; clk_div < 255; clk_div++) {
173 if (rate / clk_div <= (int)adjusted_mode->crtc_clock * 1000)
174 break;
175 }
176 if (clk_div == 255) {
177 device_printf(sc->sc_dev, "couldn't configure pixel clock (%u)\n",
178 adjusted_mode->crtc_clock);
179 return ERANGE;
180 }
181
182 val = CTRL_RASTER_MODE |
183 (clk_div << CTRL_DIV_SHIFT);
184 WR4(sc, LCD_CTRL, val);
185
186 val = RASTER_TIMING_0_HFP(hfp) |
187 RASTER_TIMING_0_HBP(hbp) |
188 RASTER_TIMING_0_HSW(hspw) |
189 RASTER_TIMING_0_PPL(adjusted_mode->hdisplay);
190 WR4(sc, LCD_RASTER_TIMING_0, val);
191
192 val = RASTER_TIMING_1_VFP(vfp) |
193 RASTER_TIMING_1_VBP(vbp) |
194 RASTER_TIMING_1_VSW(vspw) |
195 RASTER_TIMING_1_LPP(adjusted_mode->vdisplay);
196 WR4(sc, LCD_RASTER_TIMING_1, val);
197
198 val = RASTER_TIMING_2_HFP(hfp) |
199 RASTER_TIMING_2_HBP(hbp) |
200 RASTER_TIMING_2_HSW(hspw) |
201 RASTER_TIMING_2_LPP(adjusted_mode->vdisplay);
202 /* XXX TDA HDMI TX */
203 val |= RASTER_TIMING_2_IPC;
204 val |= RASTER_TIMING_2_PHSVS;
205 val |= RASTER_TIMING_2_PHSVS_RISE;
206 val |= RASTER_TIMING_2_ACB(255);
207 val |= RASTER_TIMING_2_ACBI(0);
208 WR4(sc, LCD_RASTER_TIMING_2, val);
209
210 val = (4 << LCDDMA_CTRL_BURST_SIZE_SHIFT) |
211 (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT) |
212 LCDDMA_CTRL_FB0_ONLY;
213 WR4(sc, LCD_LCDDMA_CTRL, val);
214
215 /* XXX TDA HDMI TX */
216 val = RASTER_CTRL_LCDTFT |
217 RASTER_CTRL_TFT24 |
218 RASTER_CTRL_TFT24_UNPACKED |
219 RASTER_CTRL_REQDLY(0x80) |
220 RASTER_CTRL_PALMODE_DATA_ONLY;
221 WR4(sc, LCD_RASTER_CTRL, val);
222
223 tilcdc_mode_do_set_base(crtc, old_fb, x, y, 0);
224
225 return 0;
226 }
227
228 static int
229 tilcdc_mode_set_base(struct drm_crtc *crtc, int x, int y,
230 struct drm_framebuffer *old_fb)
231 {
232 tilcdc_mode_do_set_base(crtc, old_fb, x, y, 0);
233
234 return 0;
235 }
236
237 static int
238 tilcdc_mode_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,
239 int x, int y, enum mode_set_atomic state)
240 {
241 tilcdc_mode_do_set_base(crtc, fb, x, y, 1);
242
243 return 0;
244 }
245
246 static void
247 tilcdc_disable(struct drm_crtc *crtc)
248 {
249 }
250
251 static void
252 tilcdc_prepare(struct drm_crtc *crtc)
253 {
254 }
255
256 static void
257 tilcdc_commit(struct drm_crtc *crtc)
258 {
259 struct tilcdc_crtc *mixer_crtc = to_tilcdc_crtc(crtc);
260 struct tilcdc_softc * const sc = mixer_crtc->sc;
261 uint32_t val;
262
263 WR4(sc, LCD_CLKC_ENABLE, CLKC_ENABLE_DMA | CLKC_ENABLE_CORE);
264 WR4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN);
265 delay(100);
266 WR4(sc, LCD_CLKC_RESET, 0);
267
268 val = RD4(sc, LCD_RASTER_CTRL);
269 WR4(sc, LCD_RASTER_CTRL, val | RASTER_CTRL_LCDEN);
270 }
271
272 static const struct drm_crtc_helper_funcs tilcdc_crtc_helper_funcs = {
273 .dpms = tilcdc_dpms,
274 .mode_fixup = tilcdc_mode_fixup,
275 .mode_set = tilcdc_mode_set,
276 .mode_set_base = tilcdc_mode_set_base,
277 .mode_set_base_atomic = tilcdc_mode_set_base_atomic,
278 .disable = tilcdc_disable,
279 .prepare = tilcdc_prepare,
280 .commit = tilcdc_commit,
281 };
282
283 static void
284 tilcdc_encoder_destroy(struct drm_encoder *encoder)
285 {
286 }
287
288 static const struct drm_encoder_funcs tilcdc_encoder_funcs = {
289 .destroy = tilcdc_encoder_destroy,
290 };
291
292 static void
293 tilcdc_encoder_dpms(struct drm_encoder *encoder, int mode)
294 {
295 }
296
297 static bool
298 tilcdc_encoder_mode_fixup(struct drm_encoder *encoder,
299 const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode)
300 {
301 return true;
302 }
303
304 static void
305 tilcdc_encoder_mode_set(struct drm_encoder *encoder,
306 struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode)
307 {
308 }
309
310 static void
311 tilcdc_encoder_prepare(struct drm_encoder *encoder)
312 {
313 }
314
315 static void
316 tilcdc_encoder_commit(struct drm_encoder *encoder)
317 {
318 }
319
320 static const struct drm_encoder_helper_funcs tilcdc_encoder_helper_funcs = {
321 .dpms = tilcdc_encoder_dpms,
322 .mode_fixup = tilcdc_encoder_mode_fixup,
323 .prepare = tilcdc_encoder_prepare,
324 .commit = tilcdc_encoder_commit,
325 .mode_set = tilcdc_encoder_mode_set,
326 };
327
328 static int
329 tilcdc_ep_activate(device_t dev, struct fdt_endpoint *ep, bool activate)
330 {
331 struct tilcdc_softc * const sc = device_private(dev);
332 struct drm_device *ddev = sc->sc_ddev;
333
334 if (!activate)
335 return EINVAL;
336
337 sc->sc_crtc.sc = sc;
338
339 WR4(sc, LCD_SYSCONFIG, SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART);
340
341 drm_crtc_init(ddev, &sc->sc_crtc.base, &tilcdc_crtc_funcs);
342 drm_crtc_helper_add(&sc->sc_crtc.base, &tilcdc_crtc_helper_funcs);
343
344 sc->sc_encoder.sc = sc;
345 sc->sc_encoder.base.possible_crtcs = 1 << drm_crtc_index(&sc->sc_crtc.base);
346
347 drm_encoder_init(ddev, &sc->sc_encoder.base, &tilcdc_encoder_funcs,
348 DRM_MODE_ENCODER_TMDS);
349 drm_encoder_helper_add(&sc->sc_encoder.base, &tilcdc_encoder_helper_funcs);
350
351 return fdt_endpoint_activate(ep, activate);
352 }
353
354 static void *
355 tilcdc_ep_get_data(device_t dev, struct fdt_endpoint *ep)
356 {
357 struct tilcdc_softc * const sc = device_private(dev);
358
359 return &sc->sc_encoder.base;
360 }
361
362 static int
363 tilcdc_match(device_t parent, cfdata_t cf, void *aux)
364 {
365 struct fdt_attach_args * const faa = aux;
366
367 return of_match_compatible(faa->faa_phandle, compatible);
368 }
369
370 static void
371 tilcdc_attach(device_t parent, device_t self, void *aux)
372 {
373 struct tilcdc_softc * const sc = device_private(self);
374 struct fdt_attach_args * const faa = aux;
375 const int phandle = faa->faa_phandle;
376 struct drm_driver * const driver = &tilcdc_driver;
377 prop_dictionary_t dict = device_properties(self);
378 bool is_disabled;
379 bus_addr_t addr;
380 bus_size_t size;
381 int error;
382
383 if (prop_dictionary_get_bool(dict, "disabled", &is_disabled) && is_disabled) {
384 aprint_normal(": TI LCDC (disabled)\n");
385 return;
386 }
387
388 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
389 aprint_error(": couldn't get registers\n");
390 return;
391 }
392
393 sc->sc_dev = self;
394 sc->sc_phandle = faa->faa_phandle;
395 sc->sc_dmat = faa->faa_dmat;
396 sc->sc_bst = faa->faa_bst;
397 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
398 aprint_error(": couldn't map registers\n");
399 return;
400 }
401 sc->sc_clk = ti_prcm_get_hwmod(phandle, 0);
402 if (sc->sc_clk == NULL || clk_enable(sc->sc_clk) != 0) {
403 aprint_error(": couldn't enable module\n");
404 return;
405 }
406
407 aprint_naive("\n");
408 aprint_normal(": TI LCDC\n");
409
410 sc->sc_ports.dp_ep_activate = tilcdc_ep_activate;
411 sc->sc_ports.dp_ep_get_data = tilcdc_ep_get_data;
412 fdt_ports_register(&sc->sc_ports, self, phandle, EP_DRM_ENCODER);
413
414 sc->sc_ddev = drm_dev_alloc(driver, sc->sc_dev);
415 if (sc->sc_ddev == NULL) {
416 aprint_error_dev(self, "couldn't allocate DRM device\n");
417 return;
418 }
419 sc->sc_ddev->dev_private = sc;
420 sc->sc_ddev->bst = sc->sc_bst;
421 sc->sc_ddev->bus_dmat = sc->sc_dmat;
422 sc->sc_ddev->dmat = sc->sc_ddev->bus_dmat;
423 sc->sc_ddev->dmat_subregion_p = false;
424
425 error = -drm_dev_register(sc->sc_ddev, 0);
426 if (error) {
427 drm_dev_unref(sc->sc_ddev);
428 aprint_error_dev(self, "couldn't register DRM device: %d\n",
429 error);
430 return;
431 }
432
433 aprint_normal_dev(self, "initialized %s %d.%d.%d %s on minor %d\n",
434 driver->name, driver->major, driver->minor, driver->patchlevel,
435 driver->date, sc->sc_ddev->primary->index);
436 }
437
438 static int
439 tilcdc_set_busid(struct drm_device *ddev, struct drm_master *master)
440 {
441 struct tilcdc_softc * const sc = tilcdc_private(ddev);
442 char id[32];
443
444 snprintf(id, sizeof(id), "platform:tilcdc:%u", device_unit(sc->sc_dev));
445
446 master->unique = kzalloc(strlen(id) + 1, GFP_KERNEL);
447 if (master->unique == NULL)
448 return -ENOMEM;
449 strcpy(master->unique, id);
450 master->unique_len = strlen(master->unique);
451
452 return 0;
453 }
454
455 static int
456 tilcdc_fb_create_handle(struct drm_framebuffer *fb,
457 struct drm_file *file, unsigned int *handle)
458 {
459 struct tilcdc_framebuffer *sfb = to_tilcdc_framebuffer(fb);
460
461 return drm_gem_handle_create(file, &sfb->obj->base, handle);
462 }
463
464 static void
465 tilcdc_fb_destroy(struct drm_framebuffer *fb)
466 {
467 struct tilcdc_framebuffer *sfb = to_tilcdc_framebuffer(fb);
468
469 drm_framebuffer_cleanup(fb);
470 drm_gem_object_unreference_unlocked(&sfb->obj->base);
471 kmem_free(sfb, sizeof(*sfb));
472 }
473
474 static const struct drm_framebuffer_funcs tilcdc_framebuffer_funcs = {
475 .create_handle = tilcdc_fb_create_handle,
476 .destroy = tilcdc_fb_destroy,
477 };
478
479 static struct drm_framebuffer *
480 tilcdc_fb_create(struct drm_device *ddev, struct drm_file *file,
481 struct drm_mode_fb_cmd2 *cmd)
482 {
483 struct tilcdc_framebuffer *fb;
484 struct drm_gem_object *gem_obj;
485 int error;
486
487 if (cmd->flags)
488 return NULL;
489
490 gem_obj = drm_gem_object_lookup(ddev, file, cmd->handles[0]);
491 if (gem_obj == NULL)
492 return NULL;
493
494 fb = kmem_zalloc(sizeof(*fb), KM_SLEEP);
495 fb->obj = to_drm_gem_cma_obj(gem_obj);
496 fb->base.pitches[0] = cmd->pitches[0];
497 fb->base.pitches[1] = cmd->pitches[1];
498 fb->base.pitches[2] = cmd->pitches[2];
499 fb->base.offsets[0] = cmd->offsets[0];
500 fb->base.offsets[1] = cmd->offsets[2];
501 fb->base.offsets[2] = cmd->offsets[1];
502 fb->base.width = cmd->width;
503 fb->base.height = cmd->height;
504 fb->base.pixel_format = cmd->pixel_format;
505 fb->base.bits_per_pixel = drm_format_plane_cpp(fb->base.pixel_format, 0) * 8;
506
507 switch (fb->base.pixel_format) {
508 case DRM_FORMAT_XRGB8888:
509 case DRM_FORMAT_XBGR8888:
510 fb->base.depth = 32;
511 break;
512 default:
513 break;
514 }
515
516 error = drm_framebuffer_init(ddev, &fb->base, &tilcdc_framebuffer_funcs);
517 if (error != 0)
518 goto dealloc;
519
520 return &fb->base;
521
522 dealloc:
523 drm_framebuffer_cleanup(&fb->base);
524 kmem_free(fb, sizeof(*fb));
525 drm_gem_object_unreference_unlocked(gem_obj);
526
527 return NULL;
528 }
529
530 static struct drm_mode_config_funcs tilcdc_mode_config_funcs = {
531 .fb_create = tilcdc_fb_create,
532 };
533
534 static int
535 tilcdc_fb_probe(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes)
536 {
537 struct tilcdc_softc * const sc = tilcdc_private(helper->dev);
538 struct drm_device *ddev = helper->dev;
539 struct tilcdc_framebuffer *sfb = to_tilcdc_framebuffer(helper->fb);
540 struct drm_framebuffer *fb = helper->fb;
541 struct tilcdcfb_attach_args tfa;
542 const char *br_wiring;
543 uint32_t pixel_format;
544 int error;
545
546 const u_int width = sizes->surface_width;
547 const u_int height = sizes->surface_height;
548 const u_int pitch = width * (32 / 8);
549
550 br_wiring = fdtbus_get_string(sc->sc_phandle, "blue-and-red-wiring");
551 if (br_wiring && strcmp(br_wiring, "straight") == 0) {
552 pixel_format = DRM_FORMAT_XBGR8888;
553 } else {
554 pixel_format = DRM_FORMAT_XRGB8888;
555 }
556
557 const size_t size = roundup(height * pitch, PAGE_SIZE);
558
559 sfb->obj = drm_gem_cma_create(ddev, size);
560 if (sfb->obj == NULL) {
561 DRM_ERROR("failed to allocate memory for framebuffer\n");
562 return -ENOMEM;
563 }
564
565 fb->pitches[0] = pitch;
566 fb->offsets[0] = 0;
567 fb->width = width;
568 fb->height = height;
569 fb->pixel_format = pixel_format;
570 drm_fb_get_bpp_depth(fb->pixel_format, &fb->depth, &fb->bits_per_pixel);
571
572 error = drm_framebuffer_init(ddev, fb, &tilcdc_framebuffer_funcs);
573 if (error != 0) {
574 DRM_ERROR("failed to initialize framebuffer\n");
575 return error;
576 }
577
578 memset(&tfa, 0, sizeof(tfa));
579 tfa.tfa_drm_dev = ddev;
580 tfa.tfa_fb_helper = helper;
581 tfa.tfa_fb_sizes = *sizes;
582 tfa.tfa_fb_bst = sc->sc_bst;
583 tfa.tfa_fb_dmat = sc->sc_dmat;
584 tfa.tfa_fb_linebytes = helper->fb->pitches[0];
585
586 helper->fbdev = config_found_ia(ddev->dev, "tilcdcfbbus", &tfa, NULL);
587 if (helper->fbdev == NULL) {
588 DRM_ERROR("unable to attach framebuffer\n");
589 return -ENXIO;
590 }
591
592 return 0;
593 }
594
595 static struct drm_fb_helper_funcs tilcdc_fb_helper_funcs = {
596 .fb_probe = tilcdc_fb_probe,
597 };
598
599 static int
600 tilcdc_load(struct drm_device *ddev, unsigned long flags)
601 {
602 struct tilcdc_softc * const sc = tilcdc_private(ddev);
603 struct tilcdc_fbdev *fbdev;
604 struct fdt_endpoint *ep;
605 int error;
606
607 drm_mode_config_init(ddev);
608 ddev->mode_config.min_width = 0;
609 ddev->mode_config.min_height = 0;
610 ddev->mode_config.max_width = 2048;
611 ddev->mode_config.max_height = 2048;
612 ddev->mode_config.funcs = &tilcdc_mode_config_funcs;
613
614 ep = fdt_endpoint_get_from_index(&sc->sc_ports, TILCDC_PORT_OUTPUT, 0);
615 if (ep == NULL) {
616 aprint_error_dev(sc->sc_dev, "couldn't find endpoint\n");
617 return ENXIO;
618 }
619 error = fdt_endpoint_activate_direct(ep, true);
620 if (error != 0) {
621 aprint_error_dev(sc->sc_dev, "couldn't activate endpoint: %d\n", error);
622 return error;
623 }
624
625 fbdev = kmem_zalloc(sizeof(*fbdev), KM_SLEEP);
626
627 drm_fb_helper_prepare(ddev, &fbdev->helper, &tilcdc_fb_helper_funcs);
628
629 error = drm_fb_helper_init(ddev, &fbdev->helper, 1, 1);
630 if (error)
631 goto drmerr;
632
633 fbdev->helper.fb = kmem_zalloc(sizeof(struct tilcdc_framebuffer), KM_SLEEP);
634
635 drm_fb_helper_single_add_all_connectors(&fbdev->helper);
636
637 drm_helper_disable_unused_functions(ddev);
638
639 drm_fb_helper_initial_config(&fbdev->helper, 32);
640
641 return 0;
642
643 drmerr:
644 drm_mode_config_cleanup(ddev);
645 kmem_free(fbdev, sizeof(*fbdev));
646
647 return error;
648 }
649
650 static int
651 tilcdc_unload(struct drm_device *ddev)
652 {
653 drm_mode_config_cleanup(ddev);
654
655 return 0;
656 }
657