vexpress_platform.c revision 1.11
11.11Sskrll/* $NetBSD: vexpress_platform.c,v 1.11 2018/10/18 09:01:53 skrll Exp $ */
21.1Sjmcneill
31.1Sjmcneill/*-
41.1Sjmcneill * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
51.1Sjmcneill * All rights reserved.
61.1Sjmcneill *
71.1Sjmcneill * Redistribution and use in source and binary forms, with or without
81.1Sjmcneill * modification, are permitted provided that the following conditions
91.1Sjmcneill * are met:
101.1Sjmcneill * 1. Redistributions of source code must retain the above copyright
111.1Sjmcneill *    notice, this list of conditions and the following disclaimer.
121.1Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright
131.1Sjmcneill *    notice, this list of conditions and the following disclaimer in the
141.1Sjmcneill *    documentation and/or other materials provided with the distribution.
151.1Sjmcneill *
161.1Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
171.1Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
181.1Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
191.1Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
201.1Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
211.1Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
221.1Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
231.1Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
241.1Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
251.1Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
261.1Sjmcneill * SUCH DAMAGE.
271.1Sjmcneill */
281.1Sjmcneill
291.1Sjmcneill#include "opt_multiprocessor.h"
301.10Sskrll#include "opt_console.h"
311.1Sjmcneill
321.1Sjmcneill#include <sys/cdefs.h>
331.11Sskrll__KERNEL_RCSID(0, "$NetBSD: vexpress_platform.c,v 1.11 2018/10/18 09:01:53 skrll Exp $");
341.1Sjmcneill
351.1Sjmcneill#include <sys/param.h>
361.1Sjmcneill#include <sys/bus.h>
371.1Sjmcneill#include <sys/cpu.h>
381.1Sjmcneill#include <sys/device.h>
391.1Sjmcneill#include <sys/termios.h>
401.1Sjmcneill
411.1Sjmcneill#include <dev/fdt/fdtvar.h>
421.1Sjmcneill
431.1Sjmcneill#include <uvm/uvm_extern.h>
441.1Sjmcneill
451.1Sjmcneill#include <machine/bootconfig.h>
461.1Sjmcneill#include <arm/cpufunc.h>
471.1Sjmcneill
481.1Sjmcneill#include <arm/fdt/arm_fdtvar.h>
491.1Sjmcneill
501.1Sjmcneill#include <arm/cortex/gtmr_var.h>
511.1Sjmcneill
521.2Sjmcneill#include <arm/cortex/gic_reg.h>
531.2Sjmcneill
541.8Sjakllsch#include <evbarm/dev/plcomreg.h>
551.11Sskrll#include <evbarm/fdt/machdep.h>
561.1Sjmcneill
571.2Sjmcneill#include <arm/vexpress/vexpress_platform.h>
581.2Sjmcneill
591.3Sjmcneill#include <libfdt.h>
601.3Sjmcneill
611.3Sjmcneill#define	VEXPRESS_CLCD_NODE_PATH	\
621.5Sjmcneill	"/smb@8000000/motherboard/iofpga@3,00000000/clcd@1f0000"
631.1Sjmcneill#define	VEXPRESS_REF_FREQ	24000000
641.1Sjmcneill
651.1Sjmcneillextern struct bus_space armv7_generic_bs_tag;
661.1Sjmcneillextern struct bus_space armv7_generic_a4x_bs_tag;
671.7Sryoextern struct arm32_bus_dma_tag arm_generic_dma_tag;
681.1Sjmcneill
691.1Sjmcneill#define	SYSREG_BASE		0x1c010000
701.1Sjmcneill#define	SYSREG_SIZE		0x1000
711.1Sjmcneill
721.1Sjmcneill#define	SYS_FLAGS		0x0030
731.1Sjmcneill#define	SYS_FLAGSCLR		0x0034
741.1Sjmcneill#define	SYS_CFGDATA		0x00a0
751.1Sjmcneill#define	SYS_CFGCTRL		0x00a4
761.1Sjmcneill#define	 SYS_CFGCTRL_START	__BIT(31)
771.1Sjmcneill#define	 SYS_CFGCTRL_WRITE	__BIT(30)
781.1Sjmcneill#define	 SYS_CFGCTRL_DCC	__BITS(29,26)
791.1Sjmcneill#define	 SYS_CFGCTRL_FUNCTION	__BITS(25,20)
801.1Sjmcneill#define	  SYS_CFGCTRL_FUNCTION_SHUTDOWN	8
811.1Sjmcneill#define	  SYS_CFGCTRL_FUNCTION_REBOOT	9
821.1Sjmcneill#define	 SYS_CFGCTRL_SITE	__BITS(17,16)
831.1Sjmcneill#define	 SYS_CFGCTRL_POSITION	__BITS(15,12)
841.1Sjmcneill#define	 SYS_CFGCTRL_DEVICE	__BITS(11,0)
851.1Sjmcneill#define	SYS_CFGSTAT		0x00a8
861.1Sjmcneill#define	 SYS_CFGSTAT_ERROR	__BIT(1)
871.1Sjmcneill#define	 SYS_CFGSTAT_COMPLETE	__BIT(0)
881.1Sjmcneill
891.1Sjmcneillstatic bus_space_tag_t sysreg_bst = &armv7_generic_bs_tag;
901.1Sjmcneillstatic bus_space_handle_t sysreg_bsh;
911.1Sjmcneill
921.1Sjmcneill#define	SYSREG_WRITE(o, v)	\
931.1Sjmcneill	bus_space_write_4(sysreg_bst, sysreg_bsh, (o), (v))
941.1Sjmcneill
951.11Sskrllvoid vexpress_platform_early_putchar(char);
961.1Sjmcneill
971.2Sjmcneillstatic void
981.2Sjmcneillvexpress_a15_smp_init(void)
991.2Sjmcneill{
1001.11Sskrll#ifdef MULTIPROCESSOR
1011.2Sjmcneill	bus_space_tag_t gicd_bst = &armv7_generic_bs_tag;
1021.2Sjmcneill	bus_space_handle_t gicd_bsh;
1031.2Sjmcneill	int started = 0;
1041.2Sjmcneill
1051.2Sjmcneill	/* Bitmask of CPUs (non-BSP) to start */
1061.2Sjmcneill	for (int i = 1; i < arm_cpu_max; i++)
1071.2Sjmcneill		started |= __BIT(i);
1081.2Sjmcneill
1091.2Sjmcneill	/* Write init vec to SYS_FLAGS register */
1101.2Sjmcneill	SYSREG_WRITE(SYS_FLAGSCLR, 0xffffffff);
1111.11Sskrll	SYSREG_WRITE(SYS_FLAGS, KERN_VTOPHYS((vaddr_t)cpu_mpstart));
1121.2Sjmcneill
1131.2Sjmcneill	/* Map GIC distributor */
1141.2Sjmcneill	bus_space_map(gicd_bst, VEXPRESS_GIC_PBASE + GICD_BASE,
1151.2Sjmcneill	    0x1000, 0, &gicd_bsh);
1161.2Sjmcneill
1171.2Sjmcneill	/* Enable GIC distributor */
1181.2Sjmcneill	bus_space_write_4(gicd_bst, gicd_bsh,
1191.2Sjmcneill	    GICD_CTRL, GICD_CTRL_Enable);
1201.2Sjmcneill
1211.2Sjmcneill	/* Send sw interrupt to APs */
1221.2Sjmcneill	const uint32_t sgir = GICD_SGIR_TargetListFilter_NotMe;
1231.2Sjmcneill	bus_space_write_4(gicd_bst, gicd_bsh, GICD_SGIR, sgir);
1241.2Sjmcneill
1251.2Sjmcneill	/* Wait for APs to start */
1261.2Sjmcneill	for (u_int i = 0x10000000; i > 0; i--) {
1271.2Sjmcneill		arm_dmb();
1281.2Sjmcneill		if (arm_cpu_hatched == started)
1291.2Sjmcneill			break;
1301.2Sjmcneill	}
1311.2Sjmcneill
1321.2Sjmcneill	/* Disable GIC distributor */
1331.2Sjmcneill	bus_space_write_4(gicd_bst, gicd_bsh, GICD_CTRL, 0);
1341.11Sskrll#endif
1351.2Sjmcneill}
1361.2Sjmcneill
1371.2Sjmcneill
1381.1Sjmcneillstatic const struct pmap_devmap *
1391.1Sjmcneillvexpress_platform_devmap(void)
1401.1Sjmcneill{
1411.1Sjmcneill	static const struct pmap_devmap devmap[] = {
1421.1Sjmcneill		DEVMAP_ENTRY(VEXPRESS_CORE_VBASE,
1431.1Sjmcneill			     VEXPRESS_CORE_PBASE,
1441.1Sjmcneill			     VEXPRESS_CORE_SIZE),
1451.2Sjmcneill		DEVMAP_ENTRY(VEXPRESS_GIC_VBASE,
1461.2Sjmcneill			     VEXPRESS_GIC_PBASE,
1471.2Sjmcneill			     VEXPRESS_GIC_SIZE),
1481.1Sjmcneill		DEVMAP_ENTRY_END
1491.6Sskrll	};
1501.1Sjmcneill
1511.1Sjmcneill	return devmap;
1521.1Sjmcneill}
1531.1Sjmcneill
1541.1Sjmcneillstatic void
1551.1Sjmcneillvexpress_platform_bootstrap(void)
1561.1Sjmcneill{
1571.1Sjmcneill	bus_space_map(sysreg_bst, SYSREG_BASE, SYSREG_SIZE, 0,
1581.1Sjmcneill	    &sysreg_bsh);
1591.2Sjmcneill
1601.11Sskrll#ifdef MULTIPROCESSOR
1611.2Sjmcneill	arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU);
1621.11Sskrll#endif
1631.3Sjmcneill
1641.3Sjmcneill	if (match_bootconf_option(boot_args, "console", "fb")) {
1651.3Sjmcneill		void *fdt_data = __UNCONST(fdtbus_get_data());
1661.3Sjmcneill		const int chosen_off = fdt_path_offset(fdt_data, "/chosen");
1671.3Sjmcneill		if (chosen_off >= 0)
1681.3Sjmcneill			fdt_setprop_string(fdt_data, chosen_off, "stdout-path",
1691.3Sjmcneill			    VEXPRESS_CLCD_NODE_PATH);
1701.3Sjmcneill	}
1711.1Sjmcneill}
1721.1Sjmcneill
1731.1Sjmcneillstatic void
1741.1Sjmcneillvexpress_platform_init_attach_args(struct fdt_attach_args *faa)
1751.1Sjmcneill{
1761.1Sjmcneill	faa->faa_bst = &armv7_generic_bs_tag;
1771.1Sjmcneill	faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
1781.7Sryo	faa->faa_dmat = &arm_generic_dma_tag;
1791.1Sjmcneill}
1801.1Sjmcneill
1811.11Sskrllvoid
1821.1Sjmcneillvexpress_platform_early_putchar(char c)
1831.1Sjmcneill{
1841.8Sjakllsch#ifdef CONSADDR
1851.8Sjakllsch#define CONSADDR_VA ((CONSADDR - VEXPRESS_CORE_PBASE) + VEXPRESS_CORE_VBASE)
1861.8Sjakllsch	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
1871.8Sjakllsch	    (volatile uint32_t *)CONSADDR_VA :
1881.8Sjakllsch	    (volatile uint32_t *)CONSADDR;
1891.8Sjakllsch
1901.8Sjakllsch	while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFF) != 0)
1911.8Sjakllsch		continue;
1921.8Sjakllsch
1931.8Sjakllsch	uartaddr[PL01XCOM_DR / 4] = htole32(c);
1941.8Sjakllsch	arm_dsb();
1951.8Sjakllsch
1961.8Sjakllsch	while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFE) == 0)
1971.8Sjakllsch		continue;
1981.8Sjakllsch#endif
1991.1Sjmcneill}
2001.1Sjmcneill
2011.1Sjmcneillstatic void
2021.1Sjmcneillvexpress_platform_device_register(device_t self, void *aux)
2031.1Sjmcneill{
2041.1Sjmcneill}
2051.1Sjmcneill
2061.1Sjmcneillstatic void
2071.1Sjmcneillvexpress_platform_reset(void)
2081.1Sjmcneill{
2091.1Sjmcneill	SYSREG_WRITE(SYS_CFGSTAT, 0);
2101.1Sjmcneill	SYSREG_WRITE(SYS_CFGDATA, 0);
2111.1Sjmcneill	SYSREG_WRITE(SYS_CFGCTRL,
2121.1Sjmcneill	    SYS_CFGCTRL_START |
2131.1Sjmcneill	    SYS_CFGCTRL_WRITE |
2141.1Sjmcneill	    __SHIFTIN(SYS_CFGCTRL_FUNCTION_REBOOT,
2151.1Sjmcneill		      SYS_CFGCTRL_FUNCTION));
2161.1Sjmcneill}
2171.1Sjmcneill
2181.1Sjmcneillstatic u_int
2191.1Sjmcneillvexpress_platform_uart_freq(void)
2201.1Sjmcneill{
2211.1Sjmcneill	return VEXPRESS_REF_FREQ;
2221.1Sjmcneill}
2231.1Sjmcneill
2241.1Sjmcneillstatic const struct arm_platform vexpress_platform = {
2251.9Sskrll	.ap_devmap = vexpress_platform_devmap,
2261.9Sskrll	.ap_bootstrap = vexpress_platform_bootstrap,
2271.11Sskrll	.ap_mpstart = vexpress_a15_smp_init,
2281.9Sskrll	.ap_init_attach_args = vexpress_platform_init_attach_args,
2291.9Sskrll	.ap_early_putchar = vexpress_platform_early_putchar,
2301.9Sskrll	.ap_device_register = vexpress_platform_device_register,
2311.9Sskrll	.ap_reset = vexpress_platform_reset,
2321.9Sskrll	.ap_delay = gtmr_delay,
2331.9Sskrll	.ap_uart_freq = vexpress_platform_uart_freq,
2341.1Sjmcneill};
2351.1Sjmcneill
2361.1SjmcneillARM_PLATFORM(vexpress, "arm,vexpress", &vexpress_platform);
237