vexpress_platform.c revision 1.3
11.3Sjmcneill/* $NetBSD: vexpress_platform.c,v 1.3 2017/06/06 09:56:57 jmcneill Exp $ */ 21.1Sjmcneill 31.1Sjmcneill/*- 41.1Sjmcneill * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 51.1Sjmcneill * All rights reserved. 61.1Sjmcneill * 71.1Sjmcneill * Redistribution and use in source and binary forms, with or without 81.1Sjmcneill * modification, are permitted provided that the following conditions 91.1Sjmcneill * are met: 101.1Sjmcneill * 1. Redistributions of source code must retain the above copyright 111.1Sjmcneill * notice, this list of conditions and the following disclaimer. 121.1Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright 131.1Sjmcneill * notice, this list of conditions and the following disclaimer in the 141.1Sjmcneill * documentation and/or other materials provided with the distribution. 151.1Sjmcneill * 161.1Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 171.1Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 181.1Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 191.1Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 201.1Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 211.1Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 221.1Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 231.1Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 241.1Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 251.1Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 261.1Sjmcneill * SUCH DAMAGE. 271.1Sjmcneill */ 281.1Sjmcneill 291.1Sjmcneill#include "opt_multiprocessor.h" 301.1Sjmcneill#include "opt_fdt_arm.h" 311.1Sjmcneill 321.1Sjmcneill#include <sys/cdefs.h> 331.3Sjmcneill__KERNEL_RCSID(0, "$NetBSD: vexpress_platform.c,v 1.3 2017/06/06 09:56:57 jmcneill Exp $"); 341.1Sjmcneill 351.1Sjmcneill#include <sys/param.h> 361.1Sjmcneill#include <sys/bus.h> 371.1Sjmcneill#include <sys/cpu.h> 381.1Sjmcneill#include <sys/device.h> 391.1Sjmcneill#include <sys/termios.h> 401.1Sjmcneill 411.1Sjmcneill#include <dev/fdt/fdtvar.h> 421.1Sjmcneill 431.1Sjmcneill#include <uvm/uvm_extern.h> 441.1Sjmcneill 451.1Sjmcneill#include <machine/bootconfig.h> 461.1Sjmcneill#include <arm/cpufunc.h> 471.1Sjmcneill 481.1Sjmcneill#include <arm/fdt/arm_fdtvar.h> 491.1Sjmcneill 501.1Sjmcneill#include <arm/cortex/gtmr_var.h> 511.1Sjmcneill 521.2Sjmcneill#include <arm/cortex/gic_reg.h> 531.2Sjmcneill 541.1Sjmcneill#include <evbarm/dev/plcomvar.h> 551.1Sjmcneill 561.2Sjmcneill#include <arm/vexpress/vexpress_platform.h> 571.2Sjmcneill 581.3Sjmcneill#include <libfdt.h> 591.3Sjmcneill 601.3Sjmcneill#define VEXPRESS_CLCD_NODE_PATH \ 611.3Sjmcneill "/smb@08000000/motherboard/iofpga@3,00000000/clcd@1f0000" 621.1Sjmcneill#define VEXPRESS_REF_FREQ 24000000 631.1Sjmcneill 641.1Sjmcneill#define DEVMAP_ALIGN(a) ((a) & ~L1_S_OFFSET) 651.1Sjmcneill#define DEVMAP_SIZE(s) roundup2((s), L1_S_SIZE) 661.1Sjmcneill#define DEVMAP_ENTRY(va, pa, sz) \ 671.1Sjmcneill { \ 681.1Sjmcneill .pd_va = DEVMAP_ALIGN(va), \ 691.1Sjmcneill .pd_pa = DEVMAP_ALIGN(pa), \ 701.1Sjmcneill .pd_size = DEVMAP_SIZE(sz), \ 711.1Sjmcneill .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ 721.1Sjmcneill .pd_cache = PTE_NOCACHE \ 731.1Sjmcneill } 741.1Sjmcneill#define DEVMAP_ENTRY_END { 0 } 751.1Sjmcneill 761.1Sjmcneillextern struct bus_space armv7_generic_bs_tag; 771.1Sjmcneillextern struct bus_space armv7_generic_a4x_bs_tag; 781.1Sjmcneillextern struct arm32_bus_dma_tag armv7_generic_dma_tag; 791.1Sjmcneill 801.1Sjmcneill#define SYSREG_BASE 0x1c010000 811.1Sjmcneill#define SYSREG_SIZE 0x1000 821.1Sjmcneill 831.1Sjmcneill#define SYS_FLAGS 0x0030 841.1Sjmcneill#define SYS_FLAGSCLR 0x0034 851.1Sjmcneill#define SYS_CFGDATA 0x00a0 861.1Sjmcneill#define SYS_CFGCTRL 0x00a4 871.1Sjmcneill#define SYS_CFGCTRL_START __BIT(31) 881.1Sjmcneill#define SYS_CFGCTRL_WRITE __BIT(30) 891.1Sjmcneill#define SYS_CFGCTRL_DCC __BITS(29,26) 901.1Sjmcneill#define SYS_CFGCTRL_FUNCTION __BITS(25,20) 911.1Sjmcneill#define SYS_CFGCTRL_FUNCTION_SHUTDOWN 8 921.1Sjmcneill#define SYS_CFGCTRL_FUNCTION_REBOOT 9 931.1Sjmcneill#define SYS_CFGCTRL_SITE __BITS(17,16) 941.1Sjmcneill#define SYS_CFGCTRL_POSITION __BITS(15,12) 951.1Sjmcneill#define SYS_CFGCTRL_DEVICE __BITS(11,0) 961.1Sjmcneill#define SYS_CFGSTAT 0x00a8 971.1Sjmcneill#define SYS_CFGSTAT_ERROR __BIT(1) 981.1Sjmcneill#define SYS_CFGSTAT_COMPLETE __BIT(0) 991.1Sjmcneill 1001.1Sjmcneillstatic bus_space_tag_t sysreg_bst = &armv7_generic_bs_tag; 1011.1Sjmcneillstatic bus_space_handle_t sysreg_bsh; 1021.1Sjmcneill 1031.1Sjmcneill#define SYSREG_WRITE(o, v) \ 1041.1Sjmcneill bus_space_write_4(sysreg_bst, sysreg_bsh, (o), (v)) 1051.1Sjmcneill 1061.1Sjmcneill 1071.2Sjmcneillstatic void 1081.2Sjmcneillvexpress_a15_smp_init(void) 1091.2Sjmcneill{ 1101.2Sjmcneill extern void cortex_mpstart(void); 1111.2Sjmcneill bus_space_tag_t gicd_bst = &armv7_generic_bs_tag; 1121.2Sjmcneill bus_space_handle_t gicd_bsh; 1131.2Sjmcneill int started = 0; 1141.2Sjmcneill 1151.2Sjmcneill /* Bitmask of CPUs (non-BSP) to start */ 1161.2Sjmcneill for (int i = 1; i < arm_cpu_max; i++) 1171.2Sjmcneill started |= __BIT(i); 1181.2Sjmcneill 1191.2Sjmcneill /* Write init vec to SYS_FLAGS register */ 1201.2Sjmcneill SYSREG_WRITE(SYS_FLAGSCLR, 0xffffffff); 1211.2Sjmcneill SYSREG_WRITE(SYS_FLAGS, (uint32_t)cortex_mpstart); 1221.2Sjmcneill 1231.2Sjmcneill /* Map GIC distributor */ 1241.2Sjmcneill bus_space_map(gicd_bst, VEXPRESS_GIC_PBASE + GICD_BASE, 1251.2Sjmcneill 0x1000, 0, &gicd_bsh); 1261.2Sjmcneill 1271.2Sjmcneill /* Enable GIC distributor */ 1281.2Sjmcneill bus_space_write_4(gicd_bst, gicd_bsh, 1291.2Sjmcneill GICD_CTRL, GICD_CTRL_Enable); 1301.2Sjmcneill 1311.2Sjmcneill /* Send sw interrupt to APs */ 1321.2Sjmcneill const uint32_t sgir = GICD_SGIR_TargetListFilter_NotMe; 1331.2Sjmcneill bus_space_write_4(gicd_bst, gicd_bsh, GICD_SGIR, sgir); 1341.2Sjmcneill 1351.2Sjmcneill /* Wait for APs to start */ 1361.2Sjmcneill for (u_int i = 0x10000000; i > 0; i--) { 1371.2Sjmcneill arm_dmb(); 1381.2Sjmcneill if (arm_cpu_hatched == started) 1391.2Sjmcneill break; 1401.2Sjmcneill } 1411.2Sjmcneill 1421.2Sjmcneill /* Disable GIC distributor */ 1431.2Sjmcneill bus_space_write_4(gicd_bst, gicd_bsh, GICD_CTRL, 0); 1441.2Sjmcneill} 1451.2Sjmcneill 1461.2Sjmcneill 1471.1Sjmcneillstatic const struct pmap_devmap * 1481.1Sjmcneillvexpress_platform_devmap(void) 1491.1Sjmcneill{ 1501.1Sjmcneill static const struct pmap_devmap devmap[] = { 1511.1Sjmcneill DEVMAP_ENTRY(VEXPRESS_CORE_VBASE, 1521.1Sjmcneill VEXPRESS_CORE_PBASE, 1531.1Sjmcneill VEXPRESS_CORE_SIZE), 1541.2Sjmcneill DEVMAP_ENTRY(VEXPRESS_GIC_VBASE, 1551.2Sjmcneill VEXPRESS_GIC_PBASE, 1561.2Sjmcneill VEXPRESS_GIC_SIZE), 1571.1Sjmcneill DEVMAP_ENTRY_END 1581.1Sjmcneill }; 1591.1Sjmcneill 1601.1Sjmcneill return devmap; 1611.1Sjmcneill} 1621.1Sjmcneill 1631.1Sjmcneillstatic void 1641.1Sjmcneillvexpress_platform_bootstrap(void) 1651.1Sjmcneill{ 1661.1Sjmcneill bus_space_map(sysreg_bst, SYSREG_BASE, SYSREG_SIZE, 0, 1671.1Sjmcneill &sysreg_bsh); 1681.2Sjmcneill 1691.2Sjmcneill arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU); 1701.2Sjmcneill 1711.2Sjmcneill vexpress_a15_smp_init(); 1721.3Sjmcneill 1731.3Sjmcneill if (match_bootconf_option(boot_args, "console", "fb")) { 1741.3Sjmcneill void *fdt_data = __UNCONST(fdtbus_get_data()); 1751.3Sjmcneill const int chosen_off = fdt_path_offset(fdt_data, "/chosen"); 1761.3Sjmcneill if (chosen_off >= 0) 1771.3Sjmcneill fdt_setprop_string(fdt_data, chosen_off, "stdout-path", 1781.3Sjmcneill VEXPRESS_CLCD_NODE_PATH); 1791.3Sjmcneill } 1801.1Sjmcneill} 1811.1Sjmcneill 1821.1Sjmcneillstatic void 1831.1Sjmcneillvexpress_platform_init_attach_args(struct fdt_attach_args *faa) 1841.1Sjmcneill{ 1851.1Sjmcneill faa->faa_bst = &armv7_generic_bs_tag; 1861.1Sjmcneill faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag; 1871.1Sjmcneill faa->faa_dmat = &armv7_generic_dma_tag; 1881.1Sjmcneill} 1891.1Sjmcneill 1901.1Sjmcneillstatic void 1911.1Sjmcneillvexpress_platform_early_putchar(char c) 1921.1Sjmcneill{ 1931.1Sjmcneill} 1941.1Sjmcneill 1951.1Sjmcneillstatic void 1961.1Sjmcneillvexpress_platform_device_register(device_t self, void *aux) 1971.1Sjmcneill{ 1981.1Sjmcneill} 1991.1Sjmcneill 2001.1Sjmcneillstatic void 2011.1Sjmcneillvexpress_platform_reset(void) 2021.1Sjmcneill{ 2031.1Sjmcneill SYSREG_WRITE(SYS_CFGSTAT, 0); 2041.1Sjmcneill SYSREG_WRITE(SYS_CFGDATA, 0); 2051.1Sjmcneill SYSREG_WRITE(SYS_CFGCTRL, 2061.1Sjmcneill SYS_CFGCTRL_START | 2071.1Sjmcneill SYS_CFGCTRL_WRITE | 2081.1Sjmcneill __SHIFTIN(SYS_CFGCTRL_FUNCTION_REBOOT, 2091.1Sjmcneill SYS_CFGCTRL_FUNCTION)); 2101.1Sjmcneill} 2111.1Sjmcneill 2121.1Sjmcneillstatic u_int 2131.1Sjmcneillvexpress_platform_uart_freq(void) 2141.1Sjmcneill{ 2151.1Sjmcneill return VEXPRESS_REF_FREQ; 2161.1Sjmcneill} 2171.1Sjmcneill 2181.1Sjmcneillstatic const struct arm_platform vexpress_platform = { 2191.1Sjmcneill .devmap = vexpress_platform_devmap, 2201.1Sjmcneill .bootstrap = vexpress_platform_bootstrap, 2211.1Sjmcneill .init_attach_args = vexpress_platform_init_attach_args, 2221.1Sjmcneill .early_putchar = vexpress_platform_early_putchar, 2231.1Sjmcneill .device_register = vexpress_platform_device_register, 2241.1Sjmcneill .reset = vexpress_platform_reset, 2251.1Sjmcneill .delay = gtmr_delay, 2261.1Sjmcneill .uart_freq = vexpress_platform_uart_freq, 2271.1Sjmcneill}; 2281.1Sjmcneill 2291.1SjmcneillARM_PLATFORM(vexpress, "arm,vexpress", &vexpress_platform); 230