vexpress_platform.c revision 1.5
11.5Sjmcneill/* $NetBSD: vexpress_platform.c,v 1.5 2017/11/18 00:25:43 jmcneill Exp $ */ 21.1Sjmcneill 31.1Sjmcneill/*- 41.1Sjmcneill * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 51.1Sjmcneill * All rights reserved. 61.1Sjmcneill * 71.1Sjmcneill * Redistribution and use in source and binary forms, with or without 81.1Sjmcneill * modification, are permitted provided that the following conditions 91.1Sjmcneill * are met: 101.1Sjmcneill * 1. Redistributions of source code must retain the above copyright 111.1Sjmcneill * notice, this list of conditions and the following disclaimer. 121.1Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright 131.1Sjmcneill * notice, this list of conditions and the following disclaimer in the 141.1Sjmcneill * documentation and/or other materials provided with the distribution. 151.1Sjmcneill * 161.1Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 171.1Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 181.1Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 191.1Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 201.1Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 211.1Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 221.1Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 231.1Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 241.1Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 251.1Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 261.1Sjmcneill * SUCH DAMAGE. 271.1Sjmcneill */ 281.1Sjmcneill 291.1Sjmcneill#include "opt_multiprocessor.h" 301.1Sjmcneill#include "opt_fdt_arm.h" 311.1Sjmcneill 321.1Sjmcneill#include <sys/cdefs.h> 331.5Sjmcneill__KERNEL_RCSID(0, "$NetBSD: vexpress_platform.c,v 1.5 2017/11/18 00:25:43 jmcneill Exp $"); 341.1Sjmcneill 351.1Sjmcneill#include <sys/param.h> 361.1Sjmcneill#include <sys/bus.h> 371.1Sjmcneill#include <sys/cpu.h> 381.1Sjmcneill#include <sys/device.h> 391.1Sjmcneill#include <sys/termios.h> 401.1Sjmcneill 411.1Sjmcneill#include <dev/fdt/fdtvar.h> 421.1Sjmcneill 431.1Sjmcneill#include <uvm/uvm_extern.h> 441.1Sjmcneill 451.1Sjmcneill#include <machine/bootconfig.h> 461.1Sjmcneill#include <arm/cpufunc.h> 471.1Sjmcneill 481.1Sjmcneill#include <arm/fdt/arm_fdtvar.h> 491.1Sjmcneill 501.1Sjmcneill#include <arm/cortex/gtmr_var.h> 511.1Sjmcneill 521.2Sjmcneill#include <arm/cortex/gic_reg.h> 531.2Sjmcneill 541.1Sjmcneill#include <evbarm/dev/plcomvar.h> 551.1Sjmcneill 561.2Sjmcneill#include <arm/vexpress/vexpress_platform.h> 571.2Sjmcneill 581.3Sjmcneill#include <libfdt.h> 591.3Sjmcneill 601.3Sjmcneill#define VEXPRESS_CLCD_NODE_PATH \ 611.5Sjmcneill "/smb@8000000/motherboard/iofpga@3,00000000/clcd@1f0000" 621.1Sjmcneill#define VEXPRESS_REF_FREQ 24000000 631.1Sjmcneill 641.1Sjmcneillextern struct bus_space armv7_generic_bs_tag; 651.1Sjmcneillextern struct bus_space armv7_generic_a4x_bs_tag; 661.1Sjmcneillextern struct arm32_bus_dma_tag armv7_generic_dma_tag; 671.1Sjmcneill 681.1Sjmcneill#define SYSREG_BASE 0x1c010000 691.1Sjmcneill#define SYSREG_SIZE 0x1000 701.1Sjmcneill 711.1Sjmcneill#define SYS_FLAGS 0x0030 721.1Sjmcneill#define SYS_FLAGSCLR 0x0034 731.1Sjmcneill#define SYS_CFGDATA 0x00a0 741.1Sjmcneill#define SYS_CFGCTRL 0x00a4 751.1Sjmcneill#define SYS_CFGCTRL_START __BIT(31) 761.1Sjmcneill#define SYS_CFGCTRL_WRITE __BIT(30) 771.1Sjmcneill#define SYS_CFGCTRL_DCC __BITS(29,26) 781.1Sjmcneill#define SYS_CFGCTRL_FUNCTION __BITS(25,20) 791.1Sjmcneill#define SYS_CFGCTRL_FUNCTION_SHUTDOWN 8 801.1Sjmcneill#define SYS_CFGCTRL_FUNCTION_REBOOT 9 811.1Sjmcneill#define SYS_CFGCTRL_SITE __BITS(17,16) 821.1Sjmcneill#define SYS_CFGCTRL_POSITION __BITS(15,12) 831.1Sjmcneill#define SYS_CFGCTRL_DEVICE __BITS(11,0) 841.1Sjmcneill#define SYS_CFGSTAT 0x00a8 851.1Sjmcneill#define SYS_CFGSTAT_ERROR __BIT(1) 861.1Sjmcneill#define SYS_CFGSTAT_COMPLETE __BIT(0) 871.1Sjmcneill 881.1Sjmcneillstatic bus_space_tag_t sysreg_bst = &armv7_generic_bs_tag; 891.1Sjmcneillstatic bus_space_handle_t sysreg_bsh; 901.1Sjmcneill 911.1Sjmcneill#define SYSREG_WRITE(o, v) \ 921.1Sjmcneill bus_space_write_4(sysreg_bst, sysreg_bsh, (o), (v)) 931.1Sjmcneill 941.1Sjmcneill 951.2Sjmcneillstatic void 961.2Sjmcneillvexpress_a15_smp_init(void) 971.2Sjmcneill{ 981.2Sjmcneill extern void cortex_mpstart(void); 991.2Sjmcneill bus_space_tag_t gicd_bst = &armv7_generic_bs_tag; 1001.2Sjmcneill bus_space_handle_t gicd_bsh; 1011.2Sjmcneill int started = 0; 1021.2Sjmcneill 1031.2Sjmcneill /* Bitmask of CPUs (non-BSP) to start */ 1041.2Sjmcneill for (int i = 1; i < arm_cpu_max; i++) 1051.2Sjmcneill started |= __BIT(i); 1061.2Sjmcneill 1071.2Sjmcneill /* Write init vec to SYS_FLAGS register */ 1081.2Sjmcneill SYSREG_WRITE(SYS_FLAGSCLR, 0xffffffff); 1091.2Sjmcneill SYSREG_WRITE(SYS_FLAGS, (uint32_t)cortex_mpstart); 1101.2Sjmcneill 1111.2Sjmcneill /* Map GIC distributor */ 1121.2Sjmcneill bus_space_map(gicd_bst, VEXPRESS_GIC_PBASE + GICD_BASE, 1131.2Sjmcneill 0x1000, 0, &gicd_bsh); 1141.2Sjmcneill 1151.2Sjmcneill /* Enable GIC distributor */ 1161.2Sjmcneill bus_space_write_4(gicd_bst, gicd_bsh, 1171.2Sjmcneill GICD_CTRL, GICD_CTRL_Enable); 1181.2Sjmcneill 1191.2Sjmcneill /* Send sw interrupt to APs */ 1201.2Sjmcneill const uint32_t sgir = GICD_SGIR_TargetListFilter_NotMe; 1211.2Sjmcneill bus_space_write_4(gicd_bst, gicd_bsh, GICD_SGIR, sgir); 1221.2Sjmcneill 1231.2Sjmcneill /* Wait for APs to start */ 1241.2Sjmcneill for (u_int i = 0x10000000; i > 0; i--) { 1251.2Sjmcneill arm_dmb(); 1261.2Sjmcneill if (arm_cpu_hatched == started) 1271.2Sjmcneill break; 1281.2Sjmcneill } 1291.2Sjmcneill 1301.2Sjmcneill /* Disable GIC distributor */ 1311.2Sjmcneill bus_space_write_4(gicd_bst, gicd_bsh, GICD_CTRL, 0); 1321.2Sjmcneill} 1331.2Sjmcneill 1341.2Sjmcneill 1351.1Sjmcneillstatic const struct pmap_devmap * 1361.1Sjmcneillvexpress_platform_devmap(void) 1371.1Sjmcneill{ 1381.1Sjmcneill static const struct pmap_devmap devmap[] = { 1391.1Sjmcneill DEVMAP_ENTRY(VEXPRESS_CORE_VBASE, 1401.1Sjmcneill VEXPRESS_CORE_PBASE, 1411.1Sjmcneill VEXPRESS_CORE_SIZE), 1421.2Sjmcneill DEVMAP_ENTRY(VEXPRESS_GIC_VBASE, 1431.2Sjmcneill VEXPRESS_GIC_PBASE, 1441.2Sjmcneill VEXPRESS_GIC_SIZE), 1451.1Sjmcneill DEVMAP_ENTRY_END 1461.1Sjmcneill }; 1471.1Sjmcneill 1481.1Sjmcneill return devmap; 1491.1Sjmcneill} 1501.1Sjmcneill 1511.1Sjmcneillstatic void 1521.1Sjmcneillvexpress_platform_bootstrap(void) 1531.1Sjmcneill{ 1541.1Sjmcneill bus_space_map(sysreg_bst, SYSREG_BASE, SYSREG_SIZE, 0, 1551.1Sjmcneill &sysreg_bsh); 1561.2Sjmcneill 1571.2Sjmcneill arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU); 1581.2Sjmcneill 1591.2Sjmcneill vexpress_a15_smp_init(); 1601.3Sjmcneill 1611.3Sjmcneill if (match_bootconf_option(boot_args, "console", "fb")) { 1621.3Sjmcneill void *fdt_data = __UNCONST(fdtbus_get_data()); 1631.3Sjmcneill const int chosen_off = fdt_path_offset(fdt_data, "/chosen"); 1641.3Sjmcneill if (chosen_off >= 0) 1651.3Sjmcneill fdt_setprop_string(fdt_data, chosen_off, "stdout-path", 1661.3Sjmcneill VEXPRESS_CLCD_NODE_PATH); 1671.3Sjmcneill } 1681.1Sjmcneill} 1691.1Sjmcneill 1701.1Sjmcneillstatic void 1711.1Sjmcneillvexpress_platform_init_attach_args(struct fdt_attach_args *faa) 1721.1Sjmcneill{ 1731.1Sjmcneill faa->faa_bst = &armv7_generic_bs_tag; 1741.1Sjmcneill faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag; 1751.1Sjmcneill faa->faa_dmat = &armv7_generic_dma_tag; 1761.1Sjmcneill} 1771.1Sjmcneill 1781.1Sjmcneillstatic void 1791.1Sjmcneillvexpress_platform_early_putchar(char c) 1801.1Sjmcneill{ 1811.1Sjmcneill} 1821.1Sjmcneill 1831.1Sjmcneillstatic void 1841.1Sjmcneillvexpress_platform_device_register(device_t self, void *aux) 1851.1Sjmcneill{ 1861.1Sjmcneill} 1871.1Sjmcneill 1881.1Sjmcneillstatic void 1891.1Sjmcneillvexpress_platform_reset(void) 1901.1Sjmcneill{ 1911.1Sjmcneill SYSREG_WRITE(SYS_CFGSTAT, 0); 1921.1Sjmcneill SYSREG_WRITE(SYS_CFGDATA, 0); 1931.1Sjmcneill SYSREG_WRITE(SYS_CFGCTRL, 1941.1Sjmcneill SYS_CFGCTRL_START | 1951.1Sjmcneill SYS_CFGCTRL_WRITE | 1961.1Sjmcneill __SHIFTIN(SYS_CFGCTRL_FUNCTION_REBOOT, 1971.1Sjmcneill SYS_CFGCTRL_FUNCTION)); 1981.1Sjmcneill} 1991.1Sjmcneill 2001.1Sjmcneillstatic u_int 2011.1Sjmcneillvexpress_platform_uart_freq(void) 2021.1Sjmcneill{ 2031.1Sjmcneill return VEXPRESS_REF_FREQ; 2041.1Sjmcneill} 2051.1Sjmcneill 2061.1Sjmcneillstatic const struct arm_platform vexpress_platform = { 2071.1Sjmcneill .devmap = vexpress_platform_devmap, 2081.1Sjmcneill .bootstrap = vexpress_platform_bootstrap, 2091.1Sjmcneill .init_attach_args = vexpress_platform_init_attach_args, 2101.1Sjmcneill .early_putchar = vexpress_platform_early_putchar, 2111.1Sjmcneill .device_register = vexpress_platform_device_register, 2121.1Sjmcneill .reset = vexpress_platform_reset, 2131.1Sjmcneill .delay = gtmr_delay, 2141.1Sjmcneill .uart_freq = vexpress_platform_uart_freq, 2151.1Sjmcneill}; 2161.1Sjmcneill 2171.1SjmcneillARM_PLATFORM(vexpress, "arm,vexpress", &vexpress_platform); 218