pmap_vfp.S revision 1.5
1 /*- 2 * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas of 3am Software Foundry. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include "opt_cputypes.h" 31 32 #include <machine/asm.h> 33 #include "assym.h" 34 35 RCSID("$NetBSD: pmap_vfp.S,v 1.5 2012/12/26 18:35:47 matt Exp $") 36 37 /* 38 * This zeroes a page 64-bytes at a time. 64 was chosen over 32 since 39 * 64 is the cache line size of the Cortex-A8. 40 */ 41 /* LINTSTUB: void bzero_page_vfp(vaddr_t); */ 42 ENTRY(bzero_page_vfp) 43 #if 0 44 str lr, [sp, #-8]! 45 bl _C_LABEL(vfp_kernel_acquire) 46 #else 47 mrc p10, 7, r3, c8, c0, 0 48 tst r3, #VFP_FPEXC_EN 49 orreq r2, r3, #VFP_FPEXC_EN 50 mcreq p10, 7, r2, c8, c0, 0 51 vpush {d0-d7} 52 #endif 53 #if (CPU_CORTEX == 0) 54 mov ip, #0 55 vmov s0, ip 56 vmov s1, ip 57 vmov.f64 d1, d0 58 vmov.f64 d2, d0 59 vmov.f64 d3, d0 60 vmov.f64 d4, d0 61 vmov.f64 d5, d0 62 vmov.f64 d6, d0 63 vmov.f64 d7, d0 64 #else 65 veor q0, q0, q0 66 veor q1, q1, q1 67 veor q2, q2, q2 68 veor q3, q3, q3 69 #endif 70 add r2, r0, #PAGE_SIZE 71 1: vstmia r0!, {d0-d7} 72 vstmia r0!, {d0-d7} 73 vstmia r0!, {d0-d7} 74 vstmia r0!, {d0-d7} 75 cmp r0, r2 76 blt 1b 77 #if 0 78 ldr lr, [sp], #8 /* fetch LR */ 79 b _C_LABEL(vfp_kernel_release) /* tailcall the vfp release */ 80 #else 81 vpop {d0-d7} 82 mcr p10, 7, r3, c8, c0, 0 83 RET 84 #endif 85 END(bzero_page_vfp) 86 87 /* 88 * This copies a page 64-bytes at a time. 64 was chosen over 32 since 89 * 64 is the cache line size of the Cortex-A8. 90 */ 91 /* LINTSTUB: void bcopy_page_vfp(vaddr_t, vaddr_t); */ 92 ENTRY(bcopy_page_vfp) 93 #ifdef _ARM_ARCH_DWORD_OK 94 pld [r0] @ preload the first 128 bytes 95 pld [r0, #32] 96 pld [r0, #64] 97 pld [r0, #96] 98 #endif 99 #if 0 100 str lr, [sp, #-8]! 101 bl _C_LABEL(vfp_kernel_acquire) 102 #else 103 mrc p10, 7, r3, c8, c0, 0 104 tst r3, #VFP_FPEXC_EN 105 orreq r2, r3, #VFP_FPEXC_EN 106 mcreq p10, 7, r2, c8, c0, 0 107 vpush {d0-d7} 108 add r2, r0, #PAGE_SIZE-128 109 #endif 110 1: 111 #ifdef _ARM_ARCH_DWORD_OK 112 pld [r0, #128] @ preload the next 128 113 pld [r0, #160] 114 pld [r0, #192] 115 pld [r0, #224] 116 #endif 117 2: vldmia r0!, {d0-d7} @ read 0-63 118 vstmia r1!, {d0-d7} @ write 0-63 119 vldmia r0!, {d0-d7} @ read 64-127 120 vstmia r1!, {d0-d7} @ write 64-127 121 cmp r0, r2 122 blt 1b 123 beq 2b 124 #if 0 125 ldr lr, [sp], #8 /* fetch LR */ 126 b _C_LABEL(vfp_kernel_release) /* tailcall the vfp release */ 127 #else 128 vpop {d0-d7} 129 mcr p10, 7, r3, c8, c0, 0 130 RET 131 #endif 132 END(bcopy_page_vfp) 133
Indexes created Wed Sep 24 15:09:51 GMT 2025