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vfp_init.c revision 1.6
      1  1.6      matt /*      $NetBSD: vfp_init.c,v 1.6 2012/09/22 01:44:12 matt Exp $ */
      2  1.1  rearnsha 
      3  1.1  rearnsha /*
      4  1.1  rearnsha  * Copyright (c) 2008 ARM Ltd
      5  1.1  rearnsha  * All rights reserved.
      6  1.1  rearnsha  *
      7  1.1  rearnsha  * Redistribution and use in source and binary forms, with or without
      8  1.1  rearnsha  * modification, are permitted provided that the following conditions
      9  1.1  rearnsha  * are met:
     10  1.1  rearnsha  * 1. Redistributions of source code must retain the above copyright
     11  1.1  rearnsha  *    notice, this list of conditions and the following disclaimer.
     12  1.1  rearnsha  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  rearnsha  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  rearnsha  *    documentation and/or other materials provided with the distribution.
     15  1.1  rearnsha  * 3. The name of the company may not be used to endorse or promote
     16  1.1  rearnsha  *    products derived from this software without specific prior written
     17  1.1  rearnsha  *    permission.
     18  1.1  rearnsha  *
     19  1.1  rearnsha  * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR
     20  1.1  rearnsha  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     21  1.1  rearnsha  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22  1.1  rearnsha  * ARE DISCLAIMED.  IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY
     23  1.1  rearnsha  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24  1.1  rearnsha  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
     25  1.1  rearnsha  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1  rearnsha  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     27  1.1  rearnsha  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
     28  1.1  rearnsha  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     29  1.1  rearnsha  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  1.1  rearnsha  */
     31  1.1  rearnsha 
     32  1.1  rearnsha #include <sys/param.h>
     33  1.1  rearnsha #include <sys/types.h>
     34  1.1  rearnsha #include <sys/systm.h>
     35  1.1  rearnsha #include <sys/device.h>
     36  1.1  rearnsha #include <sys/proc.h>
     37  1.4      matt #include <sys/cpu.h>
     38  1.1  rearnsha 
     39  1.5      matt #include <arm/pcb.h>
     40  1.1  rearnsha #include <arm/undefined.h>
     41  1.1  rearnsha #include <arm/vfpreg.h>
     42  1.1  rearnsha 
     43  1.1  rearnsha /*
     44  1.1  rearnsha  * Use generic co-processor instructions to avoid assembly problems.
     45  1.1  rearnsha  */
     46  1.1  rearnsha 
     47  1.1  rearnsha /* FMRX <X>, fpsid */
     48  1.4      matt static inline uint32_t
     49  1.4      matt read_fpsid(void)
     50  1.4      matt {
     51  1.4      matt 	uint32_t rv;
     52  1.4      matt 	__asm __volatile("mrc p10, 7, %0, c0, c0, 0" : "=r" (rv));
     53  1.4      matt 	return rv;
     54  1.4      matt }
     55  1.4      matt 
     56  1.4      matt /* FMRX <X>, fpexc */
     57  1.4      matt static inline uint32_t
     58  1.4      matt read_fpscr(void)
     59  1.4      matt {
     60  1.4      matt 	uint32_t rv;
     61  1.4      matt 	__asm __volatile("mrc p10, 7, %0, c1, c0, 0" : "=r" (rv));
     62  1.4      matt 	return rv;
     63  1.4      matt }
     64  1.4      matt 
     65  1.1  rearnsha /* FMRX <X>, fpexc */
     66  1.4      matt static inline uint32_t
     67  1.4      matt read_fpexc(void)
     68  1.4      matt {
     69  1.4      matt 	uint32_t rv;
     70  1.4      matt 	__asm __volatile("mrc p10, 7, %0, c8, c0, 0" : "=r" (rv));
     71  1.4      matt 	return rv;
     72  1.4      matt }
     73  1.4      matt 
     74  1.1  rearnsha /* FMRX <X>, fpinst */
     75  1.4      matt static inline uint32_t
     76  1.4      matt read_fpinst(void)
     77  1.4      matt {
     78  1.4      matt 	uint32_t rv;
     79  1.4      matt 	__asm __volatile("mrc p10, 7, %0, c9, c0, 0" : "=r" (rv));
     80  1.4      matt 	return rv;
     81  1.4      matt }
     82  1.4      matt 
     83  1.1  rearnsha /* FMRX <X>, fpinst2 */
     84  1.4      matt static inline uint32_t
     85  1.4      matt read_fpinst2(void)
     86  1.4      matt {
     87  1.4      matt 	uint32_t rv;
     88  1.4      matt 	__asm __volatile("mrc p10, 7, %0, c10, c0, 0" : "=r" (rv));
     89  1.4      matt 	return rv;
     90  1.4      matt }
     91  1.4      matt 
     92  1.1  rearnsha /* FSTMD <X>, {d0-d15} */
     93  1.1  rearnsha #define save_vfpregs(X)	__asm __volatile("stc p11, c0, [%0], {32}" : \
     94  1.1  rearnsha 			    : "r" (X) : "memory")
     95  1.1  rearnsha 
     96  1.1  rearnsha /* FMXR <X>, fpscr */
     97  1.1  rearnsha #define write_fpscr(X)	__asm __volatile("mcr p10, 7, %0, c1, c0, 0" : \
     98  1.1  rearnsha 			    : "r" (X))
     99  1.1  rearnsha /* FMXR <X>, fpexc */
    100  1.1  rearnsha #define write_fpexc(X)	__asm __volatile("mcr p10, 7, %0, c8, c0, 0" : \
    101  1.1  rearnsha 			    : "r" (X))
    102  1.1  rearnsha /* FMXR <X>, fpinst */
    103  1.1  rearnsha #define write_fpinst(X)	__asm __volatile("mcr p10, 7, %0, c9, c0, 0" : \
    104  1.1  rearnsha 			    : "r" (X))
    105  1.1  rearnsha /* FMXR <X>, fpinst2 */
    106  1.1  rearnsha #define write_fpinst2(X) __asm __volatile("mcr p10, 7, %0, c10, c0, 0" : \
    107  1.1  rearnsha 			    : "r" (X))
    108  1.1  rearnsha /* FLDMD <X>, {d0-d15} */
    109  1.1  rearnsha #define load_vfpregs(X)	__asm __volatile("ldc p11, c0, [%0], {32}" : \
    110  1.1  rearnsha 			    : "r" (X) : "memory");
    111  1.1  rearnsha 
    112  1.4      matt #ifdef FPU_VFP
    113  1.4      matt 
    114  1.1  rearnsha /* The real handler for VFP bounces.  */
    115  1.1  rearnsha static int vfp_handler(u_int, u_int, trapframe_t *, int);
    116  1.4      matt static int vfp_handler(u_int, u_int, trapframe_t *, int);
    117  1.1  rearnsha 
    118  1.4      matt static void vfp_state_load(lwp_t *, bool);
    119  1.4      matt static void vfp_state_save(lwp_t *);
    120  1.4      matt static void vfp_state_release(lwp_t *);
    121  1.4      matt 
    122  1.4      matt const pcu_ops_t arm_vfp_ops = {
    123  1.4      matt 	.pcu_id = PCU_FPU,
    124  1.4      matt 	.pcu_state_load = vfp_state_load,
    125  1.4      matt 	.pcu_state_save = vfp_state_save,
    126  1.4      matt 	.pcu_state_release = vfp_state_release,
    127  1.4      matt };
    128  1.1  rearnsha 
    129  1.1  rearnsha struct evcnt vfpevent_use;
    130  1.1  rearnsha struct evcnt vfpevent_reuse;
    131  1.1  rearnsha 
    132  1.1  rearnsha /*
    133  1.1  rearnsha  * Used to test for a VFP. The following function is installed as a coproc10
    134  1.1  rearnsha  * handler on the undefined instruction vector and then we issue a VFP
    135  1.1  rearnsha  * instruction. If undefined_test is non zero then the VFP did not handle
    136  1.1  rearnsha  * the instruction so must be absent, or disabled.
    137  1.1  rearnsha  */
    138  1.1  rearnsha 
    139  1.1  rearnsha static int undefined_test;
    140  1.1  rearnsha 
    141  1.1  rearnsha static int
    142  1.4      matt vfp_test(u_int address, u_int insn, trapframe_t *frame, int fault_code)
    143  1.1  rearnsha {
    144  1.1  rearnsha 
    145  1.1  rearnsha 	frame->tf_pc += INSN_SIZE;
    146  1.1  rearnsha 	++undefined_test;
    147  1.4      matt 	return 0;
    148  1.4      matt }
    149  1.4      matt 
    150  1.4      matt #endif /* FPU_VFP */
    151  1.4      matt 
    152  1.4      matt struct evcnt vfp_fpscr_ev =
    153  1.4      matt     EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, NULL, "VFP", "FPSCR traps");
    154  1.4      matt EVCNT_ATTACH_STATIC(vfp_fpscr_ev);
    155  1.4      matt 
    156  1.4      matt static int
    157  1.4      matt vfp_fpscr_handler(u_int address, u_int insn, trapframe_t *frame, int fault_code)
    158  1.4      matt {
    159  1.4      matt 	struct lwp * const l = curlwp;
    160  1.4      matt 	const u_int regno = (insn >> 12) & 0xf;
    161  1.4      matt 	/*
    162  1.4      matt 	 * Only match move to/from the FPSCR register and we
    163  1.4      matt 	 * can't be using the SP,LR,PC as a source.
    164  1.4      matt 	 */
    165  1.4      matt 	if ((insn & 0xffef0fff) != 0xeee10a10 || regno > 12)
    166  1.4      matt 		return 1;
    167  1.4      matt 
    168  1.4      matt 	struct pcb * const pcb = lwp_getpcb(l);
    169  1.4      matt 
    170  1.4      matt #ifdef FPU_VFP
    171  1.4      matt 	/*
    172  1.4      matt 	 * If FPU is valid somewhere, let's just reenable VFP and
    173  1.4      matt 	 * retry the instruction (only safe thing to do since the
    174  1.4      matt 	 * pcb has a stale copy).
    175  1.4      matt 	 */
    176  1.4      matt 	if (pcb->pcb_vfp.vfp_fpexc & VFP_FPEXC_EN)
    177  1.4      matt 		return 1;
    178  1.4      matt #endif
    179  1.4      matt 
    180  1.4      matt 	if (__predict_false((l->l_md.md_flags & MDLWP_VFPUSED) == 0)) {
    181  1.4      matt 		l->l_md.md_flags |= MDLWP_VFPUSED;
    182  1.4      matt 		pcb->pcb_vfp.vfp_fpscr =
    183  1.4      matt 		    (VFP_FPSCR_DN | VFP_FPSCR_FZ);	/* Runfast */
    184  1.4      matt 	}
    185  1.4      matt 
    186  1.4      matt 	/*
    187  1.4      matt 	 * We know know the pcb has the saved copy.
    188  1.4      matt 	 */
    189  1.4      matt 	register_t * const regp = &frame->tf_r0 + regno;
    190  1.4      matt 	if (insn & 0x00100000) {
    191  1.4      matt 		*regp = pcb->pcb_vfp.vfp_fpscr;
    192  1.4      matt 	} else {
    193  1.4      matt 		pcb->pcb_vfp.vfp_fpscr = *regp;
    194  1.4      matt 	}
    195  1.4      matt 
    196  1.4      matt 	vfp_fpscr_ev.ev_count++;
    197  1.4      matt 
    198  1.4      matt 	frame->tf_pc += INSN_SIZE;
    199  1.4      matt 	return 0;
    200  1.1  rearnsha }
    201  1.1  rearnsha 
    202  1.4      matt #ifndef FPU_VFP
    203  1.4      matt /*
    204  1.4      matt  * If we don't want VFP support, we still need to handle emulating VFP FPSCR
    205  1.4      matt  * instructions.
    206  1.4      matt  */
    207  1.4      matt void
    208  1.4      matt vfp_attach(void)
    209  1.4      matt {
    210  1.4      matt 	install_coproc_handler(VFP_COPROC, vfp_fpscr_handler);
    211  1.4      matt }
    212  1.4      matt 
    213  1.4      matt #else
    214  1.1  rearnsha void
    215  1.2    cegger vfp_attach(void)
    216  1.1  rearnsha {
    217  1.4      matt 	struct cpu_info * const ci = curcpu();
    218  1.4      matt 	const char *model = NULL;
    219  1.1  rearnsha 	void *uh;
    220  1.1  rearnsha 
    221  1.1  rearnsha 	uh = install_coproc_handler(VFP_COPROC, vfp_test);
    222  1.1  rearnsha 
    223  1.1  rearnsha 	undefined_test = 0;
    224  1.1  rearnsha 
    225  1.6      matt #ifdef FPU_VFP
    226  1.6      matt 	uint32_t cpacr = armreg_cpacr_read();
    227  1.6      matt 	cpacr &= ~__BITS(21,20);
    228  1.6      matt 	cpacr &= ~__BITS(23,22);
    229  1.6      matt 
    230  1.6      matt 	cpacr |= __SHIFTIN(1, __BITS(21,20));
    231  1.6      matt 	cpacr |= __SHIFTIN(1, __BITS(23,22));
    232  1.6      matt 	armreg_cpacr_write(cpacr);
    233  1.6      matt 	cpacr = armreg_cpacr_read();
    234  1.6      matt 	if ((cpacr & __BITS(23,22)) == 0) {
    235  1.6      matt 		aprint_normal_dev(ci->ci_dev, "NEON not present\n");
    236  1.6      matt 	}
    237  1.6      matt 	if ((cpacr & __BITS(21,20)) == 0) {
    238  1.6      matt 		aprint_normal_dev(ci->ci_dev, "VFP not present\n");
    239  1.6      matt 	}
    240  1.6      matt #endif
    241  1.6      matt 
    242  1.4      matt 	const uint32_t fpsid = read_fpsid();
    243  1.1  rearnsha 
    244  1.1  rearnsha 	remove_coproc_handler(uh);
    245  1.1  rearnsha 
    246  1.1  rearnsha 	if (undefined_test != 0) {
    247  1.4      matt 		aprint_normal_dev(ci->ci_dev, "No VFP detected\n");
    248  1.4      matt 		install_coproc_handler(VFP_COPROC, vfp_fpscr_handler);
    249  1.4      matt 		ci->ci_vfp_id = 0;
    250  1.1  rearnsha 		return;
    251  1.1  rearnsha 	}
    252  1.1  rearnsha 
    253  1.4      matt 	ci->ci_vfp_id = fpsid;
    254  1.4      matt 	switch (fpsid & ~ VFP_FPSID_REV_MSK) {
    255  1.4      matt 	case FPU_VFP10_ARM10E:
    256  1.4      matt 		model = "VFP10 R1";
    257  1.4      matt 		break;
    258  1.4      matt 	case FPU_VFP11_ARM11:
    259  1.4      matt 		model = "VFP11";
    260  1.4      matt 		break;
    261  1.6      matt 	case FPU_VFP30_CORTEXA9:
    262  1.6      matt 		model = "NEON MPE w/ VFP 3.0";
    263  1.6      matt 		break;
    264  1.4      matt 	default:
    265  1.4      matt 		aprint_normal_dev(ci->ci_dev, "unrecognized VFP version %x\n",
    266  1.4      matt 		    fpsid);
    267  1.4      matt 		install_coproc_handler(VFP_COPROC, vfp_fpscr_handler);
    268  1.4      matt 		return;
    269  1.4      matt 	}
    270  1.1  rearnsha 
    271  1.1  rearnsha 	if (fpsid != 0) {
    272  1.1  rearnsha 		aprint_normal("vfp%d at %s: %s\n",
    273  1.6      matt 		    device_unit(curcpu()->ci_dev), device_xname(curcpu()->ci_dev),
    274  1.1  rearnsha 		    model);
    275  1.1  rearnsha 	}
    276  1.1  rearnsha 	evcnt_attach_dynamic(&vfpevent_use, EVCNT_TYPE_MISC, NULL,
    277  1.1  rearnsha 	    "VFP", "proc use");
    278  1.1  rearnsha 	evcnt_attach_dynamic(&vfpevent_reuse, EVCNT_TYPE_MISC, NULL,
    279  1.1  rearnsha 	    "VFP", "proc re-use");
    280  1.1  rearnsha 	install_coproc_handler(VFP_COPROC, vfp_handler);
    281  1.1  rearnsha 	install_coproc_handler(VFP_COPROC2, vfp_handler);
    282  1.1  rearnsha }
    283  1.1  rearnsha 
    284  1.1  rearnsha /* The real handler for VFP bounces.  */
    285  1.4      matt static int
    286  1.4      matt vfp_handler(u_int address, u_int insn, trapframe_t *frame,
    287  1.1  rearnsha     int fault_code)
    288  1.1  rearnsha {
    289  1.4      matt 	struct cpu_info * const ci = curcpu();
    290  1.1  rearnsha 
    291  1.1  rearnsha 	/* This shouldn't ever happen.  */
    292  1.1  rearnsha 	if (fault_code != FAULT_USER)
    293  1.1  rearnsha 		panic("VFP fault in non-user mode");
    294  1.1  rearnsha 
    295  1.4      matt 	if (ci->ci_vfp_id == 0)
    296  1.1  rearnsha 		/* No VFP detected, just fault.  */
    297  1.1  rearnsha 		return 1;
    298  1.1  rearnsha 
    299  1.4      matt 	/*
    300  1.4      matt 	 * If we are just changing/fetching FPSCR, don't bother loading it.
    301  1.4      matt 	 */
    302  1.4      matt 	if (!vfp_fpscr_handler(address, insn, frame, fault_code))
    303  1.4      matt 		return 0;
    304  1.1  rearnsha 
    305  1.4      matt 	pcu_load(&arm_vfp_ops);
    306  1.3     rmind 
    307  1.4      matt 	/* Need to restart the faulted instruction.  */
    308  1.4      matt //	frame->tf_pc -= INSN_SIZE;
    309  1.4      matt 	return 0;
    310  1.4      matt }
    311  1.1  rearnsha 
    312  1.4      matt static void
    313  1.4      matt vfp_state_load(lwp_t *l, bool used)
    314  1.4      matt {
    315  1.4      matt 	struct pcb * const pcb = lwp_getpcb(l);
    316  1.4      matt 	struct vfpreg * const fregs = &pcb->pcb_vfp;
    317  1.1  rearnsha 
    318  1.1  rearnsha 	/*
    319  1.1  rearnsha 	 * Instrument VFP usage -- if a process has not previously
    320  1.1  rearnsha 	 * used the VFP, mark it as having used VFP for the first time,
    321  1.1  rearnsha 	 * and count this event.
    322  1.1  rearnsha 	 *
    323  1.1  rearnsha 	 * If a process has used the VFP, count a "used VFP, and took
    324  1.1  rearnsha 	 * a trap to use it again" event.
    325  1.1  rearnsha 	 */
    326  1.4      matt 	if (__predict_false((l->l_md.md_flags & MDLWP_VFPUSED) == 0)) {
    327  1.1  rearnsha 		vfpevent_use.ev_count++;
    328  1.4      matt 		l->l_md.md_flags |= MDLWP_VFPUSED;
    329  1.3     rmind 		pcb->pcb_vfp.vfp_fpscr =
    330  1.1  rearnsha 		    (VFP_FPSCR_DN | VFP_FPSCR_FZ);	/* Runfast */
    331  1.4      matt 	} else {
    332  1.1  rearnsha 		vfpevent_reuse.ev_count++;
    333  1.4      matt 	}
    334  1.1  rearnsha 
    335  1.4      matt 	if (fregs->vfp_fpexc & VFP_FPEXC_EN) {
    336  1.4      matt 		/*
    337  1.4      matt 		 * If we think the VFP is enabled, it must have be disabled by
    338  1.4      matt 		 * vfp_state_release for another LWP so we can just restore
    339  1.4      matt 		 * FPEXC and return since our VFP state is still loaded.
    340  1.4      matt 		 */
    341  1.4      matt 		write_fpexc(fregs->vfp_fpexc);
    342  1.4      matt 		return;
    343  1.4      matt 	}
    344  1.1  rearnsha 
    345  1.1  rearnsha 	/* Enable the VFP (so that we can write the registers).  */
    346  1.4      matt 	uint32_t fpexc = read_fpexc();
    347  1.1  rearnsha 	KDASSERT((fpexc & VFP_FPEXC_EX) == 0);
    348  1.1  rearnsha 	write_fpexc(fpexc | VFP_FPEXC_EN);
    349  1.1  rearnsha 
    350  1.1  rearnsha 	load_vfpregs(fregs->vfp_regs);
    351  1.1  rearnsha 	write_fpscr(fregs->vfp_fpscr);
    352  1.4      matt 
    353  1.1  rearnsha 	if (fregs->vfp_fpexc & VFP_FPEXC_EX) {
    354  1.4      matt 		struct cpu_info * const ci = curcpu();
    355  1.1  rearnsha 		/* Need to restore the exception handling state.  */
    356  1.4      matt 		switch (ci->ci_vfp_id) {
    357  1.1  rearnsha 		case FPU_VFP10_ARM10E:
    358  1.1  rearnsha 		case FPU_VFP11_ARM11:
    359  1.1  rearnsha 			write_fpinst2(fregs->vfp_fpinst2);
    360  1.1  rearnsha 			write_fpinst(fregs->vfp_fpinst);
    361  1.1  rearnsha 			break;
    362  1.1  rearnsha 		default:
    363  1.4      matt 			panic("%s: Unsupported VFP %#x",
    364  1.4      matt 			    __func__, ci->ci_vfp_id);
    365  1.1  rearnsha 		}
    366  1.1  rearnsha 	}
    367  1.4      matt 
    368  1.4      matt 	/* Finally, restore the FPEXC but don't enable the VFP. */
    369  1.4      matt 	fregs->vfp_fpexc |= VFP_FPEXC_EN;
    370  1.4      matt 	write_fpexc(fregs->vfp_fpexc);
    371  1.1  rearnsha }
    372  1.1  rearnsha 
    373  1.1  rearnsha void
    374  1.4      matt vfp_state_save(lwp_t *l)
    375  1.1  rearnsha {
    376  1.4      matt 	struct pcb * const pcb = lwp_getpcb(l);
    377  1.4      matt 	struct vfpreg * const fregs = &pcb->pcb_vfp;
    378  1.1  rearnsha 
    379  1.4      matt 	/*
    380  1.4      matt 	 * If it's already disabled, then the state has been saved
    381  1.4      matt 	 * (or discarded).
    382  1.4      matt 	 */
    383  1.4      matt 	if ((fregs->vfp_fpexc & VFP_FPEXC_EN) == 0)
    384  1.1  rearnsha 		return;
    385  1.1  rearnsha 
    386  1.4      matt 	/*
    387  1.4      matt 	 * Enable the VFP (so we can read the registers).
    388  1.4      matt 	 * Make sure the exception bit is cleared so that we can
    389  1.4      matt 	 * safely dump the registers.
    390  1.4      matt 	 */
    391  1.4      matt 	uint32_t fpexc = read_fpexc();
    392  1.4      matt 	write_fpexc((fpexc | VFP_FPEXC_EN) & ~VFP_FPEXC_EX);
    393  1.1  rearnsha 
    394  1.4      matt 	fregs->vfp_fpexc = fpexc;
    395  1.4      matt 	if (fpexc & VFP_FPEXC_EX) {
    396  1.4      matt 		struct cpu_info * const ci = curcpu();
    397  1.4      matt 		/* Need to save the exception handling state */
    398  1.4      matt 		switch (ci->ci_vfp_id) {
    399  1.4      matt 		case FPU_VFP10_ARM10E:
    400  1.4      matt 		case FPU_VFP11_ARM11:
    401  1.4      matt 			fregs->vfp_fpinst = read_fpinst();
    402  1.4      matt 			fregs->vfp_fpinst2 = read_fpinst2();
    403  1.4      matt 			break;
    404  1.4      matt 		default:
    405  1.4      matt 			panic("%s: Unsupported VFP %#x",
    406  1.4      matt 			    __func__, ci->ci_vfp_id);
    407  1.1  rearnsha 		}
    408  1.1  rearnsha 	}
    409  1.4      matt 	fregs->vfp_fpscr = read_fpscr();
    410  1.4      matt 	save_vfpregs(fregs->vfp_regs);
    411  1.4      matt 
    412  1.1  rearnsha 	/* Disable the VFP.  */
    413  1.4      matt 	write_fpexc(fpexc);
    414  1.1  rearnsha }
    415  1.1  rearnsha 
    416  1.1  rearnsha void
    417  1.4      matt vfp_state_release(lwp_t *l)
    418  1.1  rearnsha {
    419  1.4      matt 	struct pcb * const pcb = lwp_getpcb(l);
    420  1.1  rearnsha 
    421  1.4      matt 	/*
    422  1.4      matt 	 * Now mark the VFP as disabled (and our state has been already
    423  1.4      matt 	 * saved or is being discarded).
    424  1.4      matt 	 */
    425  1.4      matt 	pcb->pcb_vfp.vfp_fpexc &= ~VFP_FPEXC_EN;
    426  1.1  rearnsha 
    427  1.1  rearnsha 	/*
    428  1.4      matt 	 * Turn off the FPU so the next time a VFP instruction is issued
    429  1.4      matt 	 * an exception happens.  We don't know if this LWP's state was
    430  1.4      matt 	 * loaded but if we turned off the FPU for some other LWP, when
    431  1.4      matt 	 * pcu_load invokes vfp_state_load it will see that VFP_FPEXC_EN
    432  1.4      matt 	 * is still set so it just restroe fpexc and return since its
    433  1.4      matt 	 * contents are still sitting in the VFP.
    434  1.1  rearnsha 	 */
    435  1.4      matt 	write_fpexc(read_fpexc() & ~VFP_FPEXC_EN);
    436  1.1  rearnsha }
    437  1.1  rearnsha 
    438  1.1  rearnsha void
    439  1.2    cegger vfp_savecontext(void)
    440  1.1  rearnsha {
    441  1.4      matt 	pcu_save(&arm_vfp_ops);
    442  1.1  rearnsha }
    443  1.1  rearnsha 
    444  1.1  rearnsha void
    445  1.4      matt vfp_discardcontext(void)
    446  1.1  rearnsha {
    447  1.4      matt 	pcu_discard(&arm_vfp_ops);
    448  1.4      matt }
    449  1.1  rearnsha 
    450  1.4      matt #endif /* FPU_VFP */
    451