files.zynq revision 1.2
11.2Sjmcneill# $NetBSD: files.zynq,v 1.2 2022/10/25 22:27:49 jmcneill Exp $ 21.1Sskrll# 31.1Sskrll# Configuration info for Xilinx Zynq-7000 SoC 41.1Sskrll# 51.1Sskrll# 61.1Sskrll 71.1Sskrllfile arch/arm/xilinx/zynq_platform.c soc_zynq 81.1Sskrll 91.1Sskrll# SOC parameters 101.1Sskrlldefflag opt_soc.h SOC_ZYNQ 111.1Sskrlldefflag opt_soc.h SOC_ZYNQ7000: SOC_ZYNQ 121.1Sskrll 131.1Sskrll# System Level Control Module 141.1Sskrll#device zynqslcr 151.1Sskrll#attach zynqslcr at fdt 161.1Sskrll#file arch/arm/xilinx/zynq_slcr.c zynqslcr needs-flag 171.1Sskrll 181.2Sjmcneill# PS clock subsystem 191.2Sjmcneilldevice zynqclk 201.2Sjmcneillattach zynqclk at fdt with zynq7000_clkc 211.2Sjmcneillfile arch/arm/xilinx/zynq7000_clkc.c zynq7000_clkc 221.2Sjmcneill 231.1Sskrll# UART 241.1Sskrlldevice zynquart 251.1Sskrllattach zynquart at fdt 261.1Sskrllfile arch/arm/xilinx/zynq_uart.c zynquart needs-flag 271.1Sskrllfile arch/arm/xilinx/zynq7000_uart.c zynquart 281.1Sskrlldefflag opt_zynquart.h ZYNQUARTCONSOLE 291.1Sskrll 301.1Sskrll# Gigabit Ethernet Controller 311.1Sskrlldevice cemac: ether, ifnet, arp, mii, bus_dma_generic 321.1Sskrllattach cemac at fdt 331.1Sskrllfile dev/cadence/if_cemac.c cemac 341.1Sskrllfile arch/arm/xilinx/zynq_cemac.c cemac 351.1Sskrll 361.1Sskrll# USB controller 371.1Sskrllattach ehci at fdt with zynqusb 381.1Sskrllfile arch/arm/xilinx/zynq_usb.c zynqusb 391.1Sskrllfile arch/arm/xilinx/zynq7000_usb.c zynqusb 401.1Sskrll 411.1Sskrll# SD host controller for SD/MMC 421.1Sskrllattach sdhc at fdt with sdhc_fdt 431.1Sskrllfile arch/arm/xilinx/zynq7000_sdhc.c sdhc_fdt 441.1Sskrll 45