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becc_intr.h revision 1.4 
      1 /*	$NetBSD: becc_intr.h,v 1.4 2008/04/27 18:58:45 matt Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #ifndef _BECC_INTR_H_
     39 #define	_BECC_INTR_H_
     40 
     41 #include <arm/armreg.h>
     42 #include <arm/cpufunc.h>
     43 #include <arm/cpu.h>
     44 
     45 #include <arm/xscale/beccreg.h>
     46 #include <arm/xscale/becc_csrvar.h>
     47 
     48 #ifdef __PROG32
     49 static inline void __attribute__((__unused__))
     50 becc_set_intrmask(void)
     51 {
     52 	extern volatile uint32_t intr_enabled;
     53 
     54 	/*
     55 	 * The bits in the ICMR indicate which interrupts are masked
     56 	 * (disabled), so we must invert our intr_enabled mask.
     57 	 */
     58 
     59 	BECC_CSR_WRITE(BECC_ICMR, ~intr_enabled & ICU_VALID_MASK);
     60 	(void) BECC_CSR_READ(BECC_ICMR);
     61 }
     62 
     63 static inline int __attribute__((__unused__))
     64 becc_splraise(int ipl)
     65 {
     66 	extern uint32_t becc_imask[];
     67 	uint32_t old = curcpl();
     68 
     69 	set_curcpl(old | becc_imask[ipl]);
     70 
     71 	return (old);
     72 }
     73 
     74 static inline void __attribute__((__unused__))
     75 becc_splx(int new)
     76 {
     77 	extern volatile uint32_t intr_enabled, becc_ipending;
     78 	uint32_t oldirqstate, hwpend;
     79 
     80 	set_curcpl(new);
     81 
     82 	/*
     83 	 * If there are pending HW interrupts which are being
     84 	 * unmasked, then enable them in the ICMR register.
     85 	 * This will cause them to come flooding in.  This
     86 	 * includes soft interrupts.
     87 	 */
     88 	hwpend = becc_ipending & ~new;
     89 	if (hwpend != 0) {
     90 		oldirqstate = disable_interrupts(I32_bit);
     91 		intr_enabled |= hwpend;
     92 		becc_set_intrmask();
     93 		restore_interrupts(oldirqstate);
     94 	}
     95 }
     96 
     97 static inline int __attribute__((__unused__))
     98 becc_spllower(int ipl)
     99 {
    100 	extern uint32_t becc_imask[];
    101 	uint32_t old = curcpl();
    102 
    103 	becc_splx(becc_imask[ipl]);
    104 	return (old);
    105 }
    106 
    107 #ifdef __HAVE_FAST_SOFTINTS
    108 static inline void __attribute__((__unused__))
    109 becc_setsoftintr(int si)
    110 {
    111 	extern volatile uint32_t	becc_sipending;
    112 
    113 	becc_sipending |= (1 << si);
    114 	BECC_CSR_WRITE(BECC_ICSR, (1U << ICU_SOFT));
    115 }
    116 #endif /* __PROG32 */
    117 
    118 int	becc_softint(void *arg);
    119 #endif
    120 
    121 #if !defined(EVBARM_SPL_NOINLINE)
    122 
    123 #define	_splraise(ipl)		becc_splraise(ipl)
    124 #define	splx(new)		becc_splx(new)
    125 #define	_spllower(ipl)		becc_spllower(ipl)
    126 #ifdef __HAVE_FAST_SOFTINTS
    127 #define	_setsoftintr(si)	becc_setsoftintr(si)
    128 #endif
    129 
    130 #else
    131 
    132 int	_splraise(int);
    133 void	splx(int);
    134 int	_spllower(int);
    135 #ifdef __HAVE_FAST_SOFTINTS
    136 void	_setsoftintr(int);
    137 #endif
    138 
    139 #endif /* ! EVBARM_SPL_NOINLINE */
    140 
    141 #endif /* _BECC_INTR_H_ */
    142