becc_pci.c revision 1.21 1 1.21 thorpej /* $NetBSD: becc_pci.c,v 1.21 2020/07/07 03:38:46 thorpej Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*
4 1.1 thorpej * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.1 thorpej *
9 1.1 thorpej * Redistribution and use in source and binary forms, with or without
10 1.1 thorpej * modification, are permitted provided that the following conditions
11 1.1 thorpej * are met:
12 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
13 1.1 thorpej * notice, this list of conditions and the following disclaimer.
14 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
16 1.1 thorpej * documentation and/or other materials provided with the distribution.
17 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
18 1.1 thorpej * must display the following acknowledgement:
19 1.1 thorpej * This product includes software developed for the NetBSD Project by
20 1.1 thorpej * Wasabi Systems, Inc.
21 1.1 thorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 thorpej * or promote products derived from this software without specific prior
23 1.1 thorpej * written permission.
24 1.1 thorpej *
25 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
36 1.1 thorpej */
37 1.1 thorpej
38 1.1 thorpej /*
39 1.1 thorpej * PCI configuration support for the ADI Engineering Big Endian Companion
40 1.1 thorpej * Chip.
41 1.1 thorpej */
42 1.4 lukem
43 1.4 lukem #include <sys/cdefs.h>
44 1.21 thorpej __KERNEL_RCSID(0, "$NetBSD: becc_pci.c,v 1.21 2020/07/07 03:38:46 thorpej Exp $");
45 1.14 matt
46 1.14 matt #include "opt_pci.h"
47 1.14 matt #include "pci.h"
48 1.1 thorpej
49 1.1 thorpej #include <sys/param.h>
50 1.1 thorpej #include <sys/systm.h>
51 1.1 thorpej #include <sys/device.h>
52 1.1 thorpej #include <sys/malloc.h>
53 1.14 matt #include <sys/bus.h>
54 1.1 thorpej
55 1.1 thorpej #include <uvm/uvm_extern.h>
56 1.1 thorpej
57 1.14 matt #include <dev/pci/ppbreg.h>
58 1.14 matt #include <dev/pci/pcivar.h>
59 1.14 matt #include <dev/pci/pciconf.h>
60 1.14 matt
61 1.14 matt #include <arm/locore.h>
62 1.1 thorpej
63 1.1 thorpej #include <arm/xscale/beccreg.h>
64 1.1 thorpej #include <arm/xscale/beccvar.h>
65 1.1 thorpej
66 1.13 msaitoh void becc_pci_attach_hook(device_t, device_t,
67 1.1 thorpej struct pcibus_attach_args *);
68 1.1 thorpej int becc_pci_bus_maxdevs(void *, int);
69 1.1 thorpej pcitag_t becc_pci_make_tag(void *, int, int, int);
70 1.1 thorpej void becc_pci_decompose_tag(void *, pcitag_t, int *, int *,
71 1.1 thorpej int *);
72 1.1 thorpej pcireg_t becc_pci_conf_read(void *, pcitag_t, int);
73 1.1 thorpej void becc_pci_conf_write(void *, pcitag_t, int, pcireg_t);
74 1.12 matt void becc_pci_conf_interrupt(void *, int, int, int, int, int *);
75 1.1 thorpej
76 1.9 dyoung int becc_pci_intr_map(const struct pci_attach_args *,
77 1.1 thorpej pci_intr_handle_t *);
78 1.16 christos const char *becc_pci_intr_string(void *, pci_intr_handle_t,
79 1.16 christos char *, size_t);
80 1.1 thorpej const struct evcnt *becc_pci_intr_evcnt(void *, pci_intr_handle_t);
81 1.1 thorpej void *becc_pci_intr_establish(void *, pci_intr_handle_t,
82 1.19 jmcneill int, int (*)(void *), void *, const char *);
83 1.1 thorpej void becc_pci_intr_disestablish(void *, void *);
84 1.1 thorpej
85 1.1 thorpej #define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
86 1.1 thorpej #define PCI_CONF_UNLOCK(s) restore_interrupts((s))
87 1.1 thorpej
88 1.1 thorpej #if 0
89 1.1 thorpej #define DPRINTF(x) printf(x)
90 1.1 thorpej #else
91 1.1 thorpej #define DPRINTF(x)
92 1.1 thorpej #endif
93 1.1 thorpej
94 1.1 thorpej void
95 1.1 thorpej becc_pci_init(pci_chipset_tag_t pc, void *cookie)
96 1.1 thorpej {
97 1.1 thorpej #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
98 1.1 thorpej struct becc_softc *sc = cookie;
99 1.21 thorpej struct pciconf_resources *pcires;
100 1.1 thorpej #endif
101 1.1 thorpej
102 1.1 thorpej pc->pc_conf_v = cookie;
103 1.1 thorpej pc->pc_attach_hook = becc_pci_attach_hook;
104 1.1 thorpej pc->pc_bus_maxdevs = becc_pci_bus_maxdevs;
105 1.1 thorpej pc->pc_make_tag = becc_pci_make_tag;
106 1.1 thorpej pc->pc_decompose_tag = becc_pci_decompose_tag;
107 1.1 thorpej pc->pc_conf_read = becc_pci_conf_read;
108 1.1 thorpej pc->pc_conf_write = becc_pci_conf_write;
109 1.12 matt pc->pc_conf_interrupt = becc_pci_conf_interrupt;
110 1.1 thorpej
111 1.1 thorpej pc->pc_intr_v = cookie;
112 1.1 thorpej pc->pc_intr_map = becc_pci_intr_map;
113 1.1 thorpej pc->pc_intr_string = becc_pci_intr_string;
114 1.1 thorpej pc->pc_intr_evcnt = becc_pci_intr_evcnt;
115 1.1 thorpej pc->pc_intr_establish = becc_pci_intr_establish;
116 1.1 thorpej pc->pc_intr_disestablish = becc_pci_intr_disestablish;
117 1.1 thorpej
118 1.1 thorpej #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
119 1.1 thorpej /*
120 1.1 thorpej * Configure the PCI bus.
121 1.1 thorpej *
122 1.1 thorpej * XXX We need to revisit this. We only configure the Secondary
123 1.1 thorpej * bus (and its children). The bus configure code needs changes
124 1.1 thorpej * to support how the busses are arranged on this chip. We also
125 1.1 thorpej * need to only configure devices in the private device space on
126 1.1 thorpej * the Secondary bus.
127 1.1 thorpej */
128 1.1 thorpej
129 1.21 thorpej pcires = pciconf_resource_init();
130 1.21 thorpej
131 1.1 thorpej /* Reserve the bottom 32K of the PCI address space. */
132 1.21 thorpej pciconf_resource_add(pcires, PCICONF_RESOURCE_IO,
133 1.21 thorpej sc->sc_ioout_xlate + (32 * 1024), (32 * 1024));
134 1.21 thorpej pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM,
135 1.21 thorpej sc->sc_owin_xlate[0], BECC_PCI_MEM1_SIZE);
136 1.1 thorpej
137 1.13 msaitoh aprint_normal("%s: configuring PCI bus\n", device_xname(sc->sc_dev));
138 1.21 thorpej pci_configure_bus(pc, pcires, 0, arm_dcache_align);
139 1.1 thorpej
140 1.21 thorpej pciconf_resource_fini(pcires);
141 1.1 thorpej #endif
142 1.1 thorpej }
143 1.1 thorpej
144 1.1 thorpej void
145 1.12 matt becc_pci_conf_interrupt(void *v, int a, int b, int c, int d, int *p)
146 1.1 thorpej {
147 1.1 thorpej }
148 1.1 thorpej
149 1.1 thorpej void
150 1.13 msaitoh becc_pci_attach_hook(device_t parent, device_t self,
151 1.1 thorpej struct pcibus_attach_args *pba)
152 1.1 thorpej {
153 1.1 thorpej
154 1.1 thorpej /* Nothing to do. */
155 1.1 thorpej }
156 1.1 thorpej
157 1.1 thorpej int
158 1.1 thorpej becc_pci_bus_maxdevs(void *v, int busno)
159 1.1 thorpej {
160 1.1 thorpej
161 1.1 thorpej return (32);
162 1.1 thorpej }
163 1.1 thorpej
164 1.1 thorpej pcitag_t
165 1.1 thorpej becc_pci_make_tag(void *v, int b, int d, int f)
166 1.1 thorpej {
167 1.1 thorpej
168 1.1 thorpej return ((b << 16) | (d << 11) | (f << 8));
169 1.1 thorpej }
170 1.1 thorpej
171 1.1 thorpej void
172 1.1 thorpej becc_pci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
173 1.1 thorpej {
174 1.1 thorpej
175 1.1 thorpej if (bp != NULL)
176 1.1 thorpej *bp = (tag >> 16) & 0xff;
177 1.1 thorpej if (dp != NULL)
178 1.1 thorpej *dp = (tag >> 11) & 0x1f;
179 1.1 thorpej if (fp != NULL)
180 1.1 thorpej *fp = (tag >> 8) & 0x7;
181 1.1 thorpej }
182 1.1 thorpej
183 1.1 thorpej struct pciconf_state {
184 1.1 thorpej uint32_t ps_offset;
185 1.1 thorpej
186 1.1 thorpej int ps_b, ps_d, ps_f;
187 1.1 thorpej int ps_type;
188 1.1 thorpej };
189 1.1 thorpej
190 1.1 thorpej static int
191 1.1 thorpej becc_pci_conf_setup(struct becc_softc *sc, pcitag_t tag, int offset,
192 1.1 thorpej struct pciconf_state *ps)
193 1.1 thorpej {
194 1.1 thorpej
195 1.18 msaitoh if ((unsigned int)offset >= PCI_CONF_SIZE)
196 1.18 msaitoh return (1);
197 1.18 msaitoh
198 1.1 thorpej becc_pci_decompose_tag(sc, tag, &ps->ps_b, &ps->ps_d, &ps->ps_f);
199 1.1 thorpej
200 1.1 thorpej /*
201 1.1 thorpej * If the bus # is the same as our own, then use Type 0 cycles,
202 1.1 thorpej * else use Type 1.
203 1.1 thorpej */
204 1.1 thorpej if (ps->ps_b == 0) {
205 1.1 thorpej /* XXX This is a platform-specific parameter. */
206 1.1 thorpej if (ps->ps_d > (14 - BECC_IDSEL_BIT))
207 1.1 thorpej return (1);
208 1.1 thorpej ps->ps_offset = (1U << (ps->ps_d + BECC_IDSEL_BIT)) |
209 1.1 thorpej (ps->ps_f << 8) | offset;
210 1.1 thorpej ps->ps_type = 0;
211 1.1 thorpej } else {
212 1.1 thorpej /* The tag is already in the correct format. */
213 1.1 thorpej ps->ps_offset = tag | offset | 1;
214 1.1 thorpej ps->ps_type = 1;
215 1.1 thorpej }
216 1.1 thorpej
217 1.1 thorpej return (0);
218 1.1 thorpej }
219 1.1 thorpej
220 1.1 thorpej static int becc_pci_conf_cleanup(struct becc_softc *sc);
221 1.1 thorpej static int
222 1.1 thorpej becc_pci_conf_cleanup(struct becc_softc *sc)
223 1.1 thorpej {
224 1.1 thorpej uint32_t reg;
225 1.1 thorpej int err=0;
226 1.1 thorpej
227 1.1 thorpej BECC_CSR_WRITE(BECC_POCR, 0);
228 1.1 thorpej
229 1.1 thorpej reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG);
230 1.1 thorpej if (reg & 0xf9000000) {
231 1.1 thorpej DPRINTF((" ** pci status error: %08x (%08x) **\n",
232 1.1 thorpej reg, reg & 0xf9000000));
233 1.1 thorpej
234 1.1 thorpej err = 1;
235 1.1 thorpej becc_pcicore_write(sc, PCI_COMMAND_STATUS_REG,
236 1.1 thorpej reg & 0xf900ffff);
237 1.1 thorpej reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG);
238 1.1 thorpej
239 1.1 thorpej DPRINTF((" ** pci status after clearing: %08x (%08x) **\n",
240 1.1 thorpej reg, reg & 0xf9000000));
241 1.1 thorpej }
242 1.1 thorpej reg = BECC_CSR_READ(BECC_PMISR);
243 1.1 thorpej if (reg & 0x000f000d) {
244 1.1 thorpej DPRINTF((" ** pci master isr: %08x (%08x) **\n",
245 1.1 thorpej reg, reg & 0x000f000d));
246 1.1 thorpej
247 1.1 thorpej err = 1;
248 1.1 thorpej BECC_CSR_WRITE(BECC_PMISR, reg & 0x000f000d);
249 1.1 thorpej reg = BECC_CSR_READ(BECC_PMISR);
250 1.1 thorpej
251 1.1 thorpej DPRINTF((" ** pci master isr after clearing: %08x (%08x) **\n",
252 1.1 thorpej reg, reg & 0x000f000d));
253 1.1 thorpej }
254 1.1 thorpej reg = BECC_CSR_READ(BECC_PSISR);
255 1.1 thorpej if (reg & 0x000f0210) {
256 1.1 thorpej DPRINTF((" ** pci slave isr: %08x (%08x) **\n",
257 1.1 thorpej reg, reg & 0x000f0210));
258 1.1 thorpej
259 1.1 thorpej err = 1;
260 1.1 thorpej BECC_CSR_WRITE(BECC_PSISR, reg & 0x000f0210);
261 1.1 thorpej reg = BECC_CSR_READ(BECC_PSISR);
262 1.1 thorpej
263 1.1 thorpej DPRINTF((" ** pci slave isr after clearing: %08x (%08x) **\n",
264 1.1 thorpej reg, reg & 0x000f0210));
265 1.1 thorpej }
266 1.1 thorpej
267 1.1 thorpej return err;
268 1.1 thorpej }
269 1.1 thorpej
270 1.1 thorpej pcireg_t
271 1.1 thorpej becc_pci_conf_read(void *v, pcitag_t tag, int offset)
272 1.1 thorpej {
273 1.1 thorpej struct becc_softc *sc = v;
274 1.1 thorpej struct pciconf_state ps;
275 1.1 thorpej vaddr_t va;
276 1.1 thorpej pcireg_t rv;
277 1.1 thorpej u_int s;
278 1.1 thorpej
279 1.1 thorpej if (becc_pci_conf_setup(sc, tag, offset, &ps))
280 1.1 thorpej return ((pcireg_t) -1);
281 1.1 thorpej
282 1.1 thorpej /*
283 1.1 thorpej * Skip device 0 (the BECC itself). We don't want it
284 1.1 thorpej * to appear as part of the PCI device space.
285 1.1 thorpej */
286 1.1 thorpej if (ps.ps_b == 0 && ps.ps_d == 0)
287 1.1 thorpej return ((pcireg_t) -1);
288 1.1 thorpej
289 1.1 thorpej PCI_CONF_LOCK(s);
290 1.1 thorpej
291 1.1 thorpej va = sc->sc_pci_cfg_base + ps.ps_offset;
292 1.1 thorpej BECC_CSR_WRITE(BECC_POCR, ps.ps_type);
293 1.1 thorpej
294 1.1 thorpej if (badaddr_read((void *) va, sizeof(rv), &rv)) {
295 1.1 thorpej /* XXX Check master/target abort? */
296 1.1 thorpej #if 0
297 1.1 thorpej printf("conf_read: %d/%d/%d bad address\n",
298 1.1 thorpej ps.ps_b, ps.ps_d, ps.ps_f);
299 1.1 thorpej #endif
300 1.1 thorpej rv = (pcireg_t) -1;
301 1.1 thorpej }
302 1.1 thorpej
303 1.1 thorpej if (becc_pci_conf_cleanup(sc))
304 1.1 thorpej rv = (pcireg_t) -1;
305 1.1 thorpej
306 1.1 thorpej PCI_CONF_UNLOCK(s);
307 1.1 thorpej
308 1.1 thorpej return (rv);
309 1.1 thorpej }
310 1.1 thorpej
311 1.1 thorpej void
312 1.1 thorpej becc_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)
313 1.1 thorpej {
314 1.1 thorpej struct becc_softc *sc = v;
315 1.1 thorpej struct pciconf_state ps;
316 1.1 thorpej vaddr_t va;
317 1.1 thorpej u_int s;
318 1.1 thorpej
319 1.1 thorpej if (becc_pci_conf_setup(sc, tag, offset, &ps))
320 1.1 thorpej return;
321 1.1 thorpej
322 1.1 thorpej PCI_CONF_LOCK(s);
323 1.1 thorpej BECC_CSR_WRITE(BECC_POCR, ps.ps_type);
324 1.1 thorpej
325 1.1 thorpej va = sc->sc_pci_cfg_base + ps.ps_offset;
326 1.1 thorpej
327 1.8 perry *(volatile pcireg_t *)va = val;
328 1.1 thorpej
329 1.1 thorpej becc_pci_conf_cleanup(sc);
330 1.1 thorpej
331 1.1 thorpej PCI_CONF_UNLOCK(s);
332 1.1 thorpej }
333 1.1 thorpej
334 1.1 thorpej int
335 1.9 dyoung becc_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
336 1.1 thorpej {
337 1.1 thorpej int irq;
338 1.1 thorpej
339 1.1 thorpej if (pa->pa_bus == 0) {
340 1.1 thorpej switch (pa->pa_device) {
341 1.1 thorpej case 1: irq = ICU_PCI_INTB; break; /* Ethernet #0 */
342 1.1 thorpej case 2: irq = ICU_PCI_INTC; break; /* Ethernet #1 */
343 1.2 briggs case 3: /* Card slot */
344 1.2 briggs switch (pa->pa_intrpin) {
345 1.2 briggs case 1: irq = ICU_PCI_INTA; break;
346 1.2 briggs case 2: irq = ICU_PCI_INTB; break;
347 1.2 briggs case 3: irq = ICU_PCI_INTC; break;
348 1.2 briggs case 4: irq = ICU_PCI_INTD; break;
349 1.2 briggs default:
350 1.2 briggs printf("becc_pci_intr_map: bogus pin: %d\n",
351 1.2 briggs pa->pa_intrpin);
352 1.2 briggs return (1);
353 1.2 briggs }
354 1.2 briggs break;
355 1.1 thorpej default:
356 1.6 thorpej printf("becc_pci_intr_map: bogus device: %d\n",
357 1.6 thorpej pa->pa_device);
358 1.5 matt return (1);
359 1.1 thorpej }
360 1.1 thorpej } else {
361 1.1 thorpej switch (pa->pa_intrpin) {
362 1.1 thorpej case 1: irq = ICU_PCI_INTA; break;
363 1.1 thorpej case 2: irq = ICU_PCI_INTB; break;
364 1.1 thorpej case 3: irq = ICU_PCI_INTC; break;
365 1.1 thorpej case 4: irq = ICU_PCI_INTD; break;
366 1.1 thorpej default:
367 1.1 thorpej printf("becc_pci_intr_map: bogus pin: %d\n",
368 1.1 thorpej pa->pa_intrpin);
369 1.1 thorpej return (1);
370 1.1 thorpej }
371 1.1 thorpej }
372 1.1 thorpej
373 1.1 thorpej *ihp = irq;
374 1.1 thorpej return (0);
375 1.1 thorpej }
376 1.1 thorpej
377 1.1 thorpej const char *
378 1.15 christos becc_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
379 1.1 thorpej {
380 1.1 thorpej
381 1.17 htodd strlcpy(buf, becc_irqnames[ih], len);
382 1.15 christos return buf;
383 1.1 thorpej }
384 1.1 thorpej
385 1.1 thorpej const struct evcnt *
386 1.1 thorpej becc_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
387 1.1 thorpej {
388 1.1 thorpej
389 1.1 thorpej /* XXX For now. */
390 1.1 thorpej return (NULL);
391 1.1 thorpej }
392 1.1 thorpej
393 1.1 thorpej void *
394 1.1 thorpej becc_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
395 1.19 jmcneill int (*func)(void *), void *arg, const char *xname)
396 1.1 thorpej {
397 1.1 thorpej
398 1.1 thorpej return (becc_intr_establish(ih, ipl, func, arg));
399 1.1 thorpej }
400 1.1 thorpej
401 1.1 thorpej void
402 1.1 thorpej becc_pci_intr_disestablish(void *v, void *cookie)
403 1.1 thorpej {
404 1.1 thorpej
405 1.1 thorpej becc_intr_disestablish(cookie);
406 1.1 thorpej }
407