becc_pci.c revision 1.13
1 /* $NetBSD: becc_pci.c,v 1.13 2012/10/14 14:20:57 msaitoh Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * PCI configuration support for the ADI Engineering Big Endian Companion 40 * Chip. 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: becc_pci.c,v 1.13 2012/10/14 14:20:57 msaitoh Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/extent.h> 50 #include <sys/malloc.h> 51 52 #include <uvm/uvm_extern.h> 53 54 #include <sys/bus.h> 55 56 #include <arm/xscale/beccreg.h> 57 #include <arm/xscale/beccvar.h> 58 59 #include <dev/pci/ppbreg.h> 60 #include <dev/pci/pciconf.h> 61 62 #include "opt_pci.h" 63 #include "pci.h" 64 65 void becc_pci_attach_hook(device_t, device_t, 66 struct pcibus_attach_args *); 67 int becc_pci_bus_maxdevs(void *, int); 68 pcitag_t becc_pci_make_tag(void *, int, int, int); 69 void becc_pci_decompose_tag(void *, pcitag_t, int *, int *, 70 int *); 71 pcireg_t becc_pci_conf_read(void *, pcitag_t, int); 72 void becc_pci_conf_write(void *, pcitag_t, int, pcireg_t); 73 void becc_pci_conf_interrupt(void *, int, int, int, int, int *); 74 75 int becc_pci_intr_map(const struct pci_attach_args *, 76 pci_intr_handle_t *); 77 const char *becc_pci_intr_string(void *, pci_intr_handle_t); 78 const struct evcnt *becc_pci_intr_evcnt(void *, pci_intr_handle_t); 79 void *becc_pci_intr_establish(void *, pci_intr_handle_t, 80 int, int (*)(void *), void *); 81 void becc_pci_intr_disestablish(void *, void *); 82 83 #define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit) 84 #define PCI_CONF_UNLOCK(s) restore_interrupts((s)) 85 86 #if 0 87 #define DPRINTF(x) printf(x) 88 #else 89 #define DPRINTF(x) 90 #endif 91 92 void 93 becc_pci_init(pci_chipset_tag_t pc, void *cookie) 94 { 95 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) 96 struct becc_softc *sc = cookie; 97 struct extent *ioext, *memext; 98 #endif 99 100 pc->pc_conf_v = cookie; 101 pc->pc_attach_hook = becc_pci_attach_hook; 102 pc->pc_bus_maxdevs = becc_pci_bus_maxdevs; 103 pc->pc_make_tag = becc_pci_make_tag; 104 pc->pc_decompose_tag = becc_pci_decompose_tag; 105 pc->pc_conf_read = becc_pci_conf_read; 106 pc->pc_conf_write = becc_pci_conf_write; 107 pc->pc_conf_interrupt = becc_pci_conf_interrupt; 108 109 pc->pc_intr_v = cookie; 110 pc->pc_intr_map = becc_pci_intr_map; 111 pc->pc_intr_string = becc_pci_intr_string; 112 pc->pc_intr_evcnt = becc_pci_intr_evcnt; 113 pc->pc_intr_establish = becc_pci_intr_establish; 114 pc->pc_intr_disestablish = becc_pci_intr_disestablish; 115 116 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) 117 /* 118 * Configure the PCI bus. 119 * 120 * XXX We need to revisit this. We only configure the Secondary 121 * bus (and its children). The bus configure code needs changes 122 * to support how the busses are arranged on this chip. We also 123 * need to only configure devices in the private device space on 124 * the Secondary bus. 125 */ 126 127 /* Reserve the bottom 32K of the PCI address space. */ 128 ioext = extent_create("pciio", sc->sc_ioout_xlate + (32 * 1024), 129 sc->sc_ioout_xlate + (64 * 1024) - 1, 130 NULL, 0, EX_NOWAIT); 131 memext = extent_create("pcimem", sc->sc_owin_xlate[0], 132 sc->sc_owin_xlate[0] + BECC_PCI_MEM1_SIZE - 1, 133 NULL, 0, EX_NOWAIT); 134 135 aprint_normal("%s: configuring PCI bus\n", device_xname(sc->sc_dev)); 136 pci_configure_bus(pc, ioext, memext, NULL, 0, arm_dcache_align); 137 138 extent_destroy(ioext); 139 extent_destroy(memext); 140 #endif 141 } 142 143 void 144 becc_pci_conf_interrupt(void *v, int a, int b, int c, int d, int *p) 145 { 146 } 147 148 void 149 becc_pci_attach_hook(device_t parent, device_t self, 150 struct pcibus_attach_args *pba) 151 { 152 153 /* Nothing to do. */ 154 } 155 156 int 157 becc_pci_bus_maxdevs(void *v, int busno) 158 { 159 160 return (32); 161 } 162 163 pcitag_t 164 becc_pci_make_tag(void *v, int b, int d, int f) 165 { 166 167 return ((b << 16) | (d << 11) | (f << 8)); 168 } 169 170 void 171 becc_pci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 172 { 173 174 if (bp != NULL) 175 *bp = (tag >> 16) & 0xff; 176 if (dp != NULL) 177 *dp = (tag >> 11) & 0x1f; 178 if (fp != NULL) 179 *fp = (tag >> 8) & 0x7; 180 } 181 182 struct pciconf_state { 183 uint32_t ps_offset; 184 185 int ps_b, ps_d, ps_f; 186 int ps_type; 187 }; 188 189 static int 190 becc_pci_conf_setup(struct becc_softc *sc, pcitag_t tag, int offset, 191 struct pciconf_state *ps) 192 { 193 194 becc_pci_decompose_tag(sc, tag, &ps->ps_b, &ps->ps_d, &ps->ps_f); 195 196 /* 197 * If the bus # is the same as our own, then use Type 0 cycles, 198 * else use Type 1. 199 */ 200 if (ps->ps_b == 0) { 201 /* XXX This is a platform-specific parameter. */ 202 if (ps->ps_d > (14 - BECC_IDSEL_BIT)) 203 return (1); 204 ps->ps_offset = (1U << (ps->ps_d + BECC_IDSEL_BIT)) | 205 (ps->ps_f << 8) | offset; 206 ps->ps_type = 0; 207 } else { 208 /* The tag is already in the correct format. */ 209 ps->ps_offset = tag | offset | 1; 210 ps->ps_type = 1; 211 } 212 213 return (0); 214 } 215 216 static int becc_pci_conf_cleanup(struct becc_softc *sc); 217 static int 218 becc_pci_conf_cleanup(struct becc_softc *sc) 219 { 220 uint32_t reg; 221 int err=0; 222 223 BECC_CSR_WRITE(BECC_POCR, 0); 224 225 reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG); 226 if (reg & 0xf9000000) { 227 DPRINTF((" ** pci status error: %08x (%08x) **\n", 228 reg, reg & 0xf9000000)); 229 230 err = 1; 231 becc_pcicore_write(sc, PCI_COMMAND_STATUS_REG, 232 reg & 0xf900ffff); 233 reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG); 234 235 DPRINTF((" ** pci status after clearing: %08x (%08x) **\n", 236 reg, reg & 0xf9000000)); 237 } 238 reg = BECC_CSR_READ(BECC_PMISR); 239 if (reg & 0x000f000d) { 240 DPRINTF((" ** pci master isr: %08x (%08x) **\n", 241 reg, reg & 0x000f000d)); 242 243 err = 1; 244 BECC_CSR_WRITE(BECC_PMISR, reg & 0x000f000d); 245 reg = BECC_CSR_READ(BECC_PMISR); 246 247 DPRINTF((" ** pci master isr after clearing: %08x (%08x) **\n", 248 reg, reg & 0x000f000d)); 249 } 250 reg = BECC_CSR_READ(BECC_PSISR); 251 if (reg & 0x000f0210) { 252 DPRINTF((" ** pci slave isr: %08x (%08x) **\n", 253 reg, reg & 0x000f0210)); 254 255 err = 1; 256 BECC_CSR_WRITE(BECC_PSISR, reg & 0x000f0210); 257 reg = BECC_CSR_READ(BECC_PSISR); 258 259 DPRINTF((" ** pci slave isr after clearing: %08x (%08x) **\n", 260 reg, reg & 0x000f0210)); 261 } 262 263 return err; 264 } 265 266 pcireg_t 267 becc_pci_conf_read(void *v, pcitag_t tag, int offset) 268 { 269 struct becc_softc *sc = v; 270 struct pciconf_state ps; 271 vaddr_t va; 272 pcireg_t rv; 273 u_int s; 274 275 if (becc_pci_conf_setup(sc, tag, offset, &ps)) 276 return ((pcireg_t) -1); 277 278 /* 279 * Skip device 0 (the BECC itself). We don't want it 280 * to appear as part of the PCI device space. 281 */ 282 if (ps.ps_b == 0 && ps.ps_d == 0) 283 return ((pcireg_t) -1); 284 285 PCI_CONF_LOCK(s); 286 287 va = sc->sc_pci_cfg_base + ps.ps_offset; 288 BECC_CSR_WRITE(BECC_POCR, ps.ps_type); 289 290 if (badaddr_read((void *) va, sizeof(rv), &rv)) { 291 /* XXX Check master/target abort? */ 292 #if 0 293 printf("conf_read: %d/%d/%d bad address\n", 294 ps.ps_b, ps.ps_d, ps.ps_f); 295 #endif 296 rv = (pcireg_t) -1; 297 } 298 299 if (becc_pci_conf_cleanup(sc)) 300 rv = (pcireg_t) -1; 301 302 PCI_CONF_UNLOCK(s); 303 304 return (rv); 305 } 306 307 void 308 becc_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val) 309 { 310 struct becc_softc *sc = v; 311 struct pciconf_state ps; 312 vaddr_t va; 313 u_int s; 314 315 if (becc_pci_conf_setup(sc, tag, offset, &ps)) 316 return; 317 318 PCI_CONF_LOCK(s); 319 BECC_CSR_WRITE(BECC_POCR, ps.ps_type); 320 321 va = sc->sc_pci_cfg_base + ps.ps_offset; 322 323 *(volatile pcireg_t *)va = val; 324 325 becc_pci_conf_cleanup(sc); 326 327 PCI_CONF_UNLOCK(s); 328 } 329 330 int 331 becc_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 332 { 333 int irq; 334 335 if (pa->pa_bus == 0) { 336 switch (pa->pa_device) { 337 case 1: irq = ICU_PCI_INTB; break; /* Ethernet #0 */ 338 case 2: irq = ICU_PCI_INTC; break; /* Ethernet #1 */ 339 case 3: /* Card slot */ 340 switch (pa->pa_intrpin) { 341 case 1: irq = ICU_PCI_INTA; break; 342 case 2: irq = ICU_PCI_INTB; break; 343 case 3: irq = ICU_PCI_INTC; break; 344 case 4: irq = ICU_PCI_INTD; break; 345 default: 346 printf("becc_pci_intr_map: bogus pin: %d\n", 347 pa->pa_intrpin); 348 return (1); 349 } 350 break; 351 default: 352 printf("becc_pci_intr_map: bogus device: %d\n", 353 pa->pa_device); 354 return (1); 355 } 356 } else { 357 switch (pa->pa_intrpin) { 358 case 1: irq = ICU_PCI_INTA; break; 359 case 2: irq = ICU_PCI_INTB; break; 360 case 3: irq = ICU_PCI_INTC; break; 361 case 4: irq = ICU_PCI_INTD; break; 362 default: 363 printf("becc_pci_intr_map: bogus pin: %d\n", 364 pa->pa_intrpin); 365 return (1); 366 } 367 } 368 369 *ihp = irq; 370 return (0); 371 } 372 373 const char * 374 becc_pci_intr_string(void *v, pci_intr_handle_t ih) 375 { 376 377 return (becc_irqnames[ih]); 378 } 379 380 const struct evcnt * 381 becc_pci_intr_evcnt(void *v, pci_intr_handle_t ih) 382 { 383 384 /* XXX For now. */ 385 return (NULL); 386 } 387 388 void * 389 becc_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 390 int (*func)(void *), void *arg) 391 { 392 393 return (becc_intr_establish(ih, ipl, func, arg)); 394 } 395 396 void 397 becc_pci_intr_disestablish(void *v, void *cookie) 398 { 399 400 becc_intr_disestablish(cookie); 401 } 402
Indexes created Tue Sep 23 22:09:46 GMT 2025