becc_pci.c revision 1.15
1 /* $NetBSD: becc_pci.c,v 1.15 2014/03/29 19:28:26 christos Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * PCI configuration support for the ADI Engineering Big Endian Companion 40 * Chip. 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: becc_pci.c,v 1.15 2014/03/29 19:28:26 christos Exp $"); 45 46 #include "opt_pci.h" 47 #include "pci.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/extent.h> 53 #include <sys/malloc.h> 54 #include <sys/bus.h> 55 56 #include <uvm/uvm_extern.h> 57 58 #include <dev/pci/ppbreg.h> 59 #include <dev/pci/pcivar.h> 60 #include <dev/pci/pciconf.h> 61 62 #include <arm/locore.h> 63 64 #include <arm/xscale/beccreg.h> 65 #include <arm/xscale/beccvar.h> 66 67 void becc_pci_attach_hook(device_t, device_t, 68 struct pcibus_attach_args *); 69 int becc_pci_bus_maxdevs(void *, int); 70 pcitag_t becc_pci_make_tag(void *, int, int, int); 71 void becc_pci_decompose_tag(void *, pcitag_t, int *, int *, 72 int *); 73 pcireg_t becc_pci_conf_read(void *, pcitag_t, int); 74 void becc_pci_conf_write(void *, pcitag_t, int, pcireg_t); 75 void becc_pci_conf_interrupt(void *, int, int, int, int, int *); 76 77 int becc_pci_intr_map(const struct pci_attach_args *, 78 pci_intr_handle_t *); 79 const char *becc_pci_intr_string(void *, pci_intr_handle_t, char *, size_t); 80 const struct evcnt *becc_pci_intr_evcnt(void *, pci_intr_handle_t); 81 void *becc_pci_intr_establish(void *, pci_intr_handle_t, 82 int, int (*)(void *), void *); 83 void becc_pci_intr_disestablish(void *, void *); 84 85 #define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit) 86 #define PCI_CONF_UNLOCK(s) restore_interrupts((s)) 87 88 #if 0 89 #define DPRINTF(x) printf(x) 90 #else 91 #define DPRINTF(x) 92 #endif 93 94 void 95 becc_pci_init(pci_chipset_tag_t pc, void *cookie) 96 { 97 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) 98 struct becc_softc *sc = cookie; 99 struct extent *ioext, *memext; 100 #endif 101 102 pc->pc_conf_v = cookie; 103 pc->pc_attach_hook = becc_pci_attach_hook; 104 pc->pc_bus_maxdevs = becc_pci_bus_maxdevs; 105 pc->pc_make_tag = becc_pci_make_tag; 106 pc->pc_decompose_tag = becc_pci_decompose_tag; 107 pc->pc_conf_read = becc_pci_conf_read; 108 pc->pc_conf_write = becc_pci_conf_write; 109 pc->pc_conf_interrupt = becc_pci_conf_interrupt; 110 111 pc->pc_intr_v = cookie; 112 pc->pc_intr_map = becc_pci_intr_map; 113 pc->pc_intr_string = becc_pci_intr_string; 114 pc->pc_intr_evcnt = becc_pci_intr_evcnt; 115 pc->pc_intr_establish = becc_pci_intr_establish; 116 pc->pc_intr_disestablish = becc_pci_intr_disestablish; 117 118 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) 119 /* 120 * Configure the PCI bus. 121 * 122 * XXX We need to revisit this. We only configure the Secondary 123 * bus (and its children). The bus configure code needs changes 124 * to support how the busses are arranged on this chip. We also 125 * need to only configure devices in the private device space on 126 * the Secondary bus. 127 */ 128 129 /* Reserve the bottom 32K of the PCI address space. */ 130 ioext = extent_create("pciio", sc->sc_ioout_xlate + (32 * 1024), 131 sc->sc_ioout_xlate + (64 * 1024) - 1, 132 NULL, 0, EX_NOWAIT); 133 memext = extent_create("pcimem", sc->sc_owin_xlate[0], 134 sc->sc_owin_xlate[0] + BECC_PCI_MEM1_SIZE - 1, 135 NULL, 0, EX_NOWAIT); 136 137 aprint_normal("%s: configuring PCI bus\n", device_xname(sc->sc_dev)); 138 pci_configure_bus(pc, ioext, memext, NULL, 0, arm_dcache_align); 139 140 extent_destroy(ioext); 141 extent_destroy(memext); 142 #endif 143 } 144 145 void 146 becc_pci_conf_interrupt(void *v, int a, int b, int c, int d, int *p) 147 { 148 } 149 150 void 151 becc_pci_attach_hook(device_t parent, device_t self, 152 struct pcibus_attach_args *pba) 153 { 154 155 /* Nothing to do. */ 156 } 157 158 int 159 becc_pci_bus_maxdevs(void *v, int busno) 160 { 161 162 return (32); 163 } 164 165 pcitag_t 166 becc_pci_make_tag(void *v, int b, int d, int f) 167 { 168 169 return ((b << 16) | (d << 11) | (f << 8)); 170 } 171 172 void 173 becc_pci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 174 { 175 176 if (bp != NULL) 177 *bp = (tag >> 16) & 0xff; 178 if (dp != NULL) 179 *dp = (tag >> 11) & 0x1f; 180 if (fp != NULL) 181 *fp = (tag >> 8) & 0x7; 182 } 183 184 struct pciconf_state { 185 uint32_t ps_offset; 186 187 int ps_b, ps_d, ps_f; 188 int ps_type; 189 }; 190 191 static int 192 becc_pci_conf_setup(struct becc_softc *sc, pcitag_t tag, int offset, 193 struct pciconf_state *ps) 194 { 195 196 becc_pci_decompose_tag(sc, tag, &ps->ps_b, &ps->ps_d, &ps->ps_f); 197 198 /* 199 * If the bus # is the same as our own, then use Type 0 cycles, 200 * else use Type 1. 201 */ 202 if (ps->ps_b == 0) { 203 /* XXX This is a platform-specific parameter. */ 204 if (ps->ps_d > (14 - BECC_IDSEL_BIT)) 205 return (1); 206 ps->ps_offset = (1U << (ps->ps_d + BECC_IDSEL_BIT)) | 207 (ps->ps_f << 8) | offset; 208 ps->ps_type = 0; 209 } else { 210 /* The tag is already in the correct format. */ 211 ps->ps_offset = tag | offset | 1; 212 ps->ps_type = 1; 213 } 214 215 return (0); 216 } 217 218 static int becc_pci_conf_cleanup(struct becc_softc *sc); 219 static int 220 becc_pci_conf_cleanup(struct becc_softc *sc) 221 { 222 uint32_t reg; 223 int err=0; 224 225 BECC_CSR_WRITE(BECC_POCR, 0); 226 227 reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG); 228 if (reg & 0xf9000000) { 229 DPRINTF((" ** pci status error: %08x (%08x) **\n", 230 reg, reg & 0xf9000000)); 231 232 err = 1; 233 becc_pcicore_write(sc, PCI_COMMAND_STATUS_REG, 234 reg & 0xf900ffff); 235 reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG); 236 237 DPRINTF((" ** pci status after clearing: %08x (%08x) **\n", 238 reg, reg & 0xf9000000)); 239 } 240 reg = BECC_CSR_READ(BECC_PMISR); 241 if (reg & 0x000f000d) { 242 DPRINTF((" ** pci master isr: %08x (%08x) **\n", 243 reg, reg & 0x000f000d)); 244 245 err = 1; 246 BECC_CSR_WRITE(BECC_PMISR, reg & 0x000f000d); 247 reg = BECC_CSR_READ(BECC_PMISR); 248 249 DPRINTF((" ** pci master isr after clearing: %08x (%08x) **\n", 250 reg, reg & 0x000f000d)); 251 } 252 reg = BECC_CSR_READ(BECC_PSISR); 253 if (reg & 0x000f0210) { 254 DPRINTF((" ** pci slave isr: %08x (%08x) **\n", 255 reg, reg & 0x000f0210)); 256 257 err = 1; 258 BECC_CSR_WRITE(BECC_PSISR, reg & 0x000f0210); 259 reg = BECC_CSR_READ(BECC_PSISR); 260 261 DPRINTF((" ** pci slave isr after clearing: %08x (%08x) **\n", 262 reg, reg & 0x000f0210)); 263 } 264 265 return err; 266 } 267 268 pcireg_t 269 becc_pci_conf_read(void *v, pcitag_t tag, int offset) 270 { 271 struct becc_softc *sc = v; 272 struct pciconf_state ps; 273 vaddr_t va; 274 pcireg_t rv; 275 u_int s; 276 277 if (becc_pci_conf_setup(sc, tag, offset, &ps)) 278 return ((pcireg_t) -1); 279 280 /* 281 * Skip device 0 (the BECC itself). We don't want it 282 * to appear as part of the PCI device space. 283 */ 284 if (ps.ps_b == 0 && ps.ps_d == 0) 285 return ((pcireg_t) -1); 286 287 PCI_CONF_LOCK(s); 288 289 va = sc->sc_pci_cfg_base + ps.ps_offset; 290 BECC_CSR_WRITE(BECC_POCR, ps.ps_type); 291 292 if (badaddr_read((void *) va, sizeof(rv), &rv)) { 293 /* XXX Check master/target abort? */ 294 #if 0 295 printf("conf_read: %d/%d/%d bad address\n", 296 ps.ps_b, ps.ps_d, ps.ps_f); 297 #endif 298 rv = (pcireg_t) -1; 299 } 300 301 if (becc_pci_conf_cleanup(sc)) 302 rv = (pcireg_t) -1; 303 304 PCI_CONF_UNLOCK(s); 305 306 return (rv); 307 } 308 309 void 310 becc_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val) 311 { 312 struct becc_softc *sc = v; 313 struct pciconf_state ps; 314 vaddr_t va; 315 u_int s; 316 317 if (becc_pci_conf_setup(sc, tag, offset, &ps)) 318 return; 319 320 PCI_CONF_LOCK(s); 321 BECC_CSR_WRITE(BECC_POCR, ps.ps_type); 322 323 va = sc->sc_pci_cfg_base + ps.ps_offset; 324 325 *(volatile pcireg_t *)va = val; 326 327 becc_pci_conf_cleanup(sc); 328 329 PCI_CONF_UNLOCK(s); 330 } 331 332 int 333 becc_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 334 { 335 int irq; 336 337 if (pa->pa_bus == 0) { 338 switch (pa->pa_device) { 339 case 1: irq = ICU_PCI_INTB; break; /* Ethernet #0 */ 340 case 2: irq = ICU_PCI_INTC; break; /* Ethernet #1 */ 341 case 3: /* Card slot */ 342 switch (pa->pa_intrpin) { 343 case 1: irq = ICU_PCI_INTA; break; 344 case 2: irq = ICU_PCI_INTB; break; 345 case 3: irq = ICU_PCI_INTC; break; 346 case 4: irq = ICU_PCI_INTD; break; 347 default: 348 printf("becc_pci_intr_map: bogus pin: %d\n", 349 pa->pa_intrpin); 350 return (1); 351 } 352 break; 353 default: 354 printf("becc_pci_intr_map: bogus device: %d\n", 355 pa->pa_device); 356 return (1); 357 } 358 } else { 359 switch (pa->pa_intrpin) { 360 case 1: irq = ICU_PCI_INTA; break; 361 case 2: irq = ICU_PCI_INTB; break; 362 case 3: irq = ICU_PCI_INTC; break; 363 case 4: irq = ICU_PCI_INTD; break; 364 default: 365 printf("becc_pci_intr_map: bogus pin: %d\n", 366 pa->pa_intrpin); 367 return (1); 368 } 369 } 370 371 *ihp = irq; 372 return (0); 373 } 374 375 const char * 376 becc_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 377 { 378 379 strlcpy(buf, becc_irqnames[ih]), len); 380 return buf; 381 } 382 383 const struct evcnt * 384 becc_pci_intr_evcnt(void *v, pci_intr_handle_t ih) 385 { 386 387 /* XXX For now. */ 388 return (NULL); 389 } 390 391 void * 392 becc_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 393 int (*func)(void *), void *arg) 394 { 395 396 return (becc_intr_establish(ih, ipl, func, arg)); 397 } 398 399 void 400 becc_pci_intr_disestablish(void *v, void *cookie) 401 { 402 403 becc_intr_disestablish(cookie); 404 } 405
Indexes created Fri Sep 26 20:09:58 GMT 2025