files.pxa2x0 revision 1.3
11.3Sthorpej# $NetBSD: files.pxa2x0,v 1.3 2003/01/03 01:13:58 thorpej Exp $ 21.1Sbsh# 31.1Sbsh# Configuration info for Intel PXA2[51]0 CPU support 41.1Sbsh# 51.1Sbsh 61.1Sbshfile arch/arm/arm/softintr.c # Use the generic ARM soft interrupt code. 71.1Sbsh 81.1Sbsh# PXA2[51]0's integrated peripherals bus. 91.1Sbshdevice pxaip { [addr=-1], [size=0], [intr=-1], [gpio=-1], [index=-1]} : bus_space_generic 101.1Sbshattach pxaip at mainbus 111.1Sbshfile arch/arm/xscale/pxa2x0.c 121.1Sbshfile arch/arm/xscale/pxa2x0_intr.c 131.3Sthorpejfile arch/arm/arm32/irq_dispatch.S 141.1Sbshfile arch/arm/xscale/pxa2x0_space.c 151.2Sbsh#file arch/arm/xscale/pxa2x0_freqchg.S 161.1Sbshfile arch/arm/xscale/pxa2x0_dma.c 171.1Sbsh#file arch/arm/xscale/pxa2x0_i2c.c 181.1Sbsh 191.1Sbsh# clock device 201.1Sbsh# PXA2x0's built-in timer is compatible to SA-1110. 211.1Sbshdevice saost 221.1Sbshattach saost at pxaip 231.1Sbshfile arch/arm/sa11x0/sa11x0_ost.c saost needs-flag 241.1Sbsh 251.1Sbsh# Cotulla integrated peripherals. 261.1Sbshattach com at pxaip with com_pxaip 271.1Sbshfile arch/arm/xscale/pxa2x0_com.c com_pxaip 281.1Sbshfile arch/arm/xscale/pxa2x0_a4x_space.c com_pxaip|obio 291.1Sbshfile arch/arm/xscale/pxa2x0_a4x_io.S com_pxaip|obio 301.1Sbshdefflag opt_com.h FFUARTCONSOLE BTUARTCONSOLE COM_PXA2X0 311.1Sbsh 321.1Sbsh 331.1Sbsh# XXX this is a hack to use dev/pcmcia without fdc.c 341.1Sbshdevice fdc 351.1Sbsh 361.1Sbsh 371.1Sbsh# LCD controller 381.1Sbshdevice lcd: wsemuldisplaydev, rasops16, rasops8, rasops4 391.1Sbshfile arch/arm/xscale/pxa2x0_lcd.c lcd needs-flag 40