files.pxa2x0 revision 1.4
11.4Sscw# $NetBSD: files.pxa2x0,v 1.4 2003/06/05 13:48:26 scw Exp $ 21.1Sbsh# 31.1Sbsh# Configuration info for Intel PXA2[51]0 CPU support 41.1Sbsh# 51.1Sbsh 61.1Sbshfile arch/arm/arm/softintr.c # Use the generic ARM soft interrupt code. 71.1Sbsh 81.1Sbsh# PXA2[51]0's integrated peripherals bus. 91.4Sscwdevice pxaip { [addr=-1], [size=0], [intr=-1], [index=-1]} : bus_space_generic 101.1Sbshattach pxaip at mainbus 111.1Sbshfile arch/arm/xscale/pxa2x0.c 121.3Sthorpejfile arch/arm/arm32/irq_dispatch.S 131.1Sbshfile arch/arm/xscale/pxa2x0_space.c 141.2Sbsh#file arch/arm/xscale/pxa2x0_freqchg.S 151.1Sbshfile arch/arm/xscale/pxa2x0_dma.c 161.1Sbsh#file arch/arm/xscale/pxa2x0_i2c.c 171.1Sbsh 181.4Sscw# Cotulla integrated peripherals. 191.4Sscw 201.4Sscw# INTC controller 211.4Sscwdevice pxaintc 221.4Sscwattach pxaintc at pxaip 231.4Sscwfile arch/arm/xscale/pxa2x0_intr.c pxaintc needs-flag 241.4Sscwdefopt opt_pxa2x0_gpio.h PXAGPIO_HAS_GPION_INTRS 251.4Sscw 261.4Sscw# GPIO controller 271.4Sscwdevice pxagpio 281.4Sscwattach pxagpio at pxaip 291.4Sscwfile arch/arm/xscale/pxa2x0_gpio.c pxagpio needs-flag 301.4Sscw 311.4Sscw# NS16550 compatible serial ports 321.4Sscwattach com at pxaip with pxauart 331.4Sscwfile arch/arm/xscale/pxa2x0_com.c pxauart 341.4Sscwfile arch/arm/xscale/pxa2x0_a4x_space.c pxauart | obio 351.4Sscwfile arch/arm/xscale/pxa2x0_a4x_io.S pxauart | obio 361.4Sscwdefflag opt_com.h FFUARTCONSOLE STUARTCONSOLE BTUARTCONSOLE COM_PXA2X0 371.4Sscw 381.1Sbsh# clock device 391.1Sbsh# PXA2x0's built-in timer is compatible to SA-1110. 401.1Sbshdevice saost 411.1Sbshattach saost at pxaip 421.1Sbshfile arch/arm/sa11x0/sa11x0_ost.c saost needs-flag 431.1Sbsh 441.4Sscw# LCD controller 451.4Sscwdevice lcd: wsemuldisplaydev, rasops16, rasops8, rasops4 461.4Sscwfile arch/arm/xscale/pxa2x0_lcd.c lcd needs-flag 471.1Sbsh 481.1Sbsh# XXX this is a hack to use dev/pcmcia without fdc.c 491.1Sbshdevice fdc 501.1Sbsh 51