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i80200_irq.S revision 1.13 
      1 /*	$NetBSD: i80200_irq.S,v 1.13 2005/12/11 12:16:51 christos Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #include "assym.h"
     39 #include "opt_perfctrs.h"
     40 
     41 #include <machine/asm.h>
     42 #include <machine/cpu.h>
     43 #include <machine/frame.h>
     44 
     45 #include <arm/xscale/i80200reg.h>
     46 
     47 /*
     48  * irq_entry:
     49  *
     50  *	Main entry point for the IRQ vector on i80200 CPUs.  Calls
     51  *	board-specific external interrupt dispatch routine.
     52  */
     53 
     54 	.text
     55 	.align	0
     56 
     57 .Lcurrent_intr_depth:
     58 	.word	_C_LABEL(current_intr_depth)
     59 
     60 .Lintr_dispatch:
     61 	.word	_C_LABEL(i80200_extirq_dispatch)
     62 
     63 #if defined(PERFCTRS)
     64 .Lpmc_dispatch:
     65 	.word	_C_LABEL(xscale_pmc_dispatch)
     66 #endif
     67 
     68 AST_ALIGNMENT_FAULT_LOCALS
     69 
     70 ASENTRY_NP(irq_entry)
     71 	sub	lr, lr, #0x00000004	/* Adjust the lr */
     72 
     73 	PUSHFRAMEINSVC			/* Push an interrupt frame */
     74 	ENABLE_ALIGNMENT_FAULTS
     75 
     76 	/*
     77 	 * Note that we have entered the IRQ handler.  We are
     78 	 * in SVC mode so we cannot use the processor mode to
     79 	 * determine if we are in an IRQ.  Instead, we will
     80 	 * count each time the interrupt handler is nested.
     81 	 */
     82 	ldr	r0, .Lcurrent_intr_depth
     83 	ldr	r1, [r0]
     84 	add	r1, r1, #1
     85 	str	r1, [r0]
     86 
     87 	/*
     88 	 * Get the interrupt status into a callee-save register.
     89 	 */
     90 	mrc	p13, 0, r4, c4, c0, 0
     91 
     92 #if defined(PERFCTRS)
     93 	/*
     94 	 * Check for PMU interrupts.
     95 	 * If we have one, call the routine to handle it.
     96 	 */
     97 	tst	r4, #(INTSRC_PI)
     98 	beq	.Lpmc_intr_return
     99 	mov	r1, r4
    100 	mov	r0, sp
    101 	mov	lr, pc
    102 	ldr	pc, .Lpmc_dispatch
    103 .Lpmc_intr_return:
    104 #endif
    105 
    106 	/*
    107 	 * XXX - any need to handle BMU interrupts?
    108 	 */
    109 
    110 	/*
    111 	 * Check for external IRQs.  If we have one, call the
    112 	 * external IRQ dispatcher.  The argument is a pointer
    113 	 * to the stack frame.  This function will be called with
    114 	 * interrupts disabled, and will return with interrupts
    115 	 * disabled.
    116 	 */
    117 	tst	r4, #(INTSRC_II)
    118 	beq	.Lextirq_return		/* no external IRQ pending */
    119 	ldr	r1, .Lintr_dispatch
    120 	mov	r0, sp
    121 	mov	lr, pc
    122 	ldr	pc, [r1]
    123 .Lextirq_return:
    124 
    125 	/* Decremement the nest count. */
    126 	ldr	r0, .Lcurrent_intr_depth
    127 	ldr	r1, [r0]
    128 	sub	r1, r1, #1
    129 	str	r1, [r0]
    130 
    131 	DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
    132 	PULLFRAMEFROMSVCANDEXIT
    133 	movs	pc, lr			/* Exit */
    134 
    135 	.bss
    136 	.align	0
    137 
    138 	.global _C_LABEL(astpending)
    139 _C_LABEL(astpending):
    140 	.word	0
    141 
    142 	.global	_C_LABEL(current_intr_depth)
    143 _C_LABEL(current_intr_depth):
    144 	.word	0
    145