Home | History | Annotate | Line # | Download | only in xscale
i80200_irq.S revision 1.17 
      1 /*	$NetBSD: i80200_irq.S,v 1.17 2013/08/18 06:28:18 matt Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #include "assym.h"
     39 #include "opt_perfctrs.h"
     40 
     41 #include <arm/asm.h>
     42 #include <arm/locore.h>
     43 
     44 #include <arm/xscale/i80200reg.h>
     45 
     46 /*
     47  * irq_entry:
     48  *
     49  *	Main entry point for the IRQ vector on i80200 CPUs.  Calls
     50  *	board-specific external interrupt dispatch routine.
     51  */
     52 
     53 	.text
     54 	.align	0
     55 
     56 .Lintr_dispatch:
     57 	.word	_C_LABEL(i80200_extirq_dispatch)
     58 
     59 #if defined(PERFCTRS)
     60 .Lpmc_dispatch:
     61 	.word	_C_LABEL(xscale_pmc_dispatch)
     62 #endif
     63 
     64 LOCK_CAS_CHECK_LOCALS
     65 
     66 AST_ALIGNMENT_FAULT_LOCALS
     67 
     68 ASENTRY_NP(irq_entry)
     69 	sub	lr, lr, #0x00000004	/* Adjust the lr */
     70 
     71 	PUSHFRAMEINSVC			/* Push an interrupt frame */
     72 	ENABLE_ALIGNMENT_FAULTS
     73 
     74 	/*
     75 	 * Note that we have entered the IRQ handler.  We are
     76 	 * in SVC mode so we cannot use the processor mode to
     77 	 * determine if we are in an IRQ.  Instead, we will
     78 	 * count each time the interrupt handler is nested.
     79 	 */
     80 	ldr	r1, [r4, #CI_INTR_DEPTH]
     81 	add	r1, r1, #1
     82 	str	r1, [r4, #CI_INTR_DEPTH]
     83 
     84 	/*
     85 	 * Get the interrupt status into a callee-save register.
     86 	 */
     87 	mrc	p13, 0, r5, c4, c0, 0
     88 
     89 #if defined(PERFCTRS)
     90 	/*
     91 	 * Check for PMU interrupts.
     92 	 * If we have one, call the routine to handle it.
     93 	 */
     94 	tst	r5, #(INTSRC_PI)
     95 	beq	.Lpmc_intr_return
     96 	mov	r1, r5
     97 	mov	r0, sp
     98 	mov	lr, pc
     99 	ldr	pc, .Lpmc_dispatch
    100 .Lpmc_intr_return:
    101 #endif
    102 
    103 	/*
    104 	 * XXX - any need to handle BMU interrupts?
    105 	 */
    106 
    107 	/*
    108 	 * Check for external IRQs.  If we have one, call the
    109 	 * external IRQ dispatcher.  The argument is a pointer
    110 	 * to the stack frame.  This function will be called with
    111 	 * interrupts disabled, and will return with interrupts
    112 	 * disabled.
    113 	 */
    114 	tst	r5, #(INTSRC_II)
    115 	beq	.Lextirq_return		/* no external IRQ pending */
    116 	ldr	r1, .Lintr_dispatch
    117 	mov	r0, sp
    118 	mov	lr, pc
    119 	ldr	pc, [r1]
    120 .Lextirq_return:
    121 
    122 	/* Decremement the nest count. */
    123 	ldr	r1, [r4, #CI_INTR_DEPTH]
    124 	sub	r1, r1, #1
    125 	str	r1, [r4, #CI_INTR_DEPTH]
    126 
    127 	LOCK_CAS_CHECK
    128 
    129 	DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
    130 	PULLFRAMEFROMSVCANDEXIT
    131 	movs	pc, lr			/* Exit */
    132