i80200_irq.S revision 1.19 1 /* $NetBSD: i80200_irq.S,v 1.19 2020/11/21 19:55:49 skrll Exp $ */
2
3 /*
4 * Copyright (c) 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #include "assym.h"
39
40 #include <arm/asm.h>
41 #include <arm/locore.h>
42
43 #include <arm/xscale/i80200reg.h>
44
45 /*
46 * irq_entry:
47 *
48 * Main entry point for the IRQ vector on i80200 CPUs. Calls
49 * board-specific external interrupt dispatch routine.
50 */
51
52 .text
53 .align 0
54
55 .Lintr_dispatch:
56 .word _C_LABEL(i80200_extirq_dispatch)
57
58 LOCK_CAS_CHECK_LOCALS
59
60 AST_ALIGNMENT_FAULT_LOCALS
61
62 ASENTRY_NP(irq_entry)
63 sub lr, lr, #0x00000004 /* Adjust the lr */
64
65 PUSHFRAMEINSVC /* Push an interrupt frame */
66 ENABLE_ALIGNMENT_FAULTS /* puts cur{cpu,lwp} in r4/r5 */
67
68 /*
69 * Note that we have entered the IRQ handler. We are
70 * in SVC mode so we cannot use the processor mode to
71 * determine if we are in an IRQ. Instead, we will
72 * count each time the interrupt handler is nested.
73 */
74 ldr r1, [r4, #CI_INTR_DEPTH]
75 add r1, r1, #1
76 str r1, [r4, #CI_INTR_DEPTH]
77
78 /*
79 * Get the interrupt status into a callee-save register.
80 */
81 mrc p13, 0, r6, c4, c0, 0
82
83 /*
84 * XXX - any need to handle BMU interrupts?
85 */
86
87 /*
88 * Check for external IRQs. If we have one, call the
89 * external IRQ dispatcher. The argument is a pointer
90 * to the stack frame. This function will be called with
91 * interrupts disabled, and will return with interrupts
92 * disabled.
93 */
94 tst r6, #(INTSRC_II)
95 beq .Lextirq_return /* no external IRQ pending */
96 ldr r1, .Lintr_dispatch
97 mov r0, sp
98 mov lr, pc
99 ldr pc, [r1]
100 .Lextirq_return:
101
102 /* Decremement the nest count. */
103 ldr r1, [r4, #CI_INTR_DEPTH]
104 sub r1, r1, #1
105 str r1, [r4, #CI_INTR_DEPTH]
106
107 LOCK_CAS_CHECK
108
109 DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
110 PULLFRAMEFROMSVCANDEXIT
111 movs pc, lr /* Exit */
112