i80312_mem.c revision 1.1 1 1.1 thorpej /* $NetBSD: i80312_mem.c,v 1.1 2001/11/05 23:37:01 thorpej Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*
4 1.1 thorpej * Copyright (c) 2001 Wasabi Systems, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.1 thorpej *
9 1.1 thorpej * Redistribution and use in source and binary forms, with or without
10 1.1 thorpej * modification, are permitted provided that the following conditions
11 1.1 thorpej * are met:
12 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
13 1.1 thorpej * notice, this list of conditions and the following disclaimer.
14 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
16 1.1 thorpej * documentation and/or other materials provided with the distribution.
17 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
18 1.1 thorpej * must display the following acknowledgement:
19 1.1 thorpej * This product includes software developed for the NetBSD Project by
20 1.1 thorpej * Wasabi Systems, Inc.
21 1.1 thorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 thorpej * or promote products derived from this software without specific prior
23 1.1 thorpej * written permission.
24 1.1 thorpej *
25 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
36 1.1 thorpej */
37 1.1 thorpej
38 1.1 thorpej /*
39 1.1 thorpej * Intel i80312 Companion I/O memory controller support.
40 1.1 thorpej */
41 1.1 thorpej
42 1.1 thorpej #include <sys/param.h>
43 1.1 thorpej #include <sys/systm.h>
44 1.1 thorpej
45 1.1 thorpej #include <machine/bus.h>
46 1.1 thorpej
47 1.1 thorpej #include <arm/xscale/i80312reg.h>
48 1.1 thorpej #include <arm/xscale/i80312var.h>
49 1.1 thorpej
50 1.1 thorpej /*
51 1.1 thorpej * i80312_sdram_bounds:
52 1.1 thorpej *
53 1.1 thorpej * Retrieve the start and size of SDRAM.
54 1.1 thorpej */
55 1.1 thorpej void
56 1.1 thorpej i80312_sdram_bounds(bus_space_tag_t st, bus_space_handle_t sh,
57 1.1 thorpej paddr_t *start, psize_t *size)
58 1.1 thorpej {
59 1.1 thorpej uint32_t sdbr, sbr0, sbr1;
60 1.1 thorpej uint32_t bank0, bank1;
61 1.1 thorpej
62 1.1 thorpej sdbr = bus_space_read_4(st, sh, I80312_MEM_SB);
63 1.1 thorpej sbr0 = bus_space_read_4(st, sh, I80312_MEM_SB0);
64 1.1 thorpej sbr1 = bus_space_read_4(st, sh, I80312_MEM_SB1);
65 1.1 thorpej
66 1.1 thorpej #if 0
67 1.1 thorpej printf("i80312: SBDR = 0x%08x SBR0 = 0x%08x SBR1 = 0x%08x\n",
68 1.1 thorpej sdbr, sbr0, sbr1);
69 1.1 thorpej #endif
70 1.1 thorpej
71 1.1 thorpej *start = sdbr;
72 1.1 thorpej
73 1.1 thorpej sdbr = (sdbr >> 25) & 0xf;
74 1.1 thorpej
75 1.1 thorpej sbr0 = ((sbr0 >> 3) & 0x1f) - sdbr;
76 1.1 thorpej sbr1 = ((sbr1 >> 3) & 0x1f) - sbr0;
77 1.1 thorpej
78 1.1 thorpej bank0 = sbr0 << 25;
79 1.1 thorpej bank1 = sbr1 << 25;
80 1.1 thorpej
81 1.1 thorpej #if 0
82 1.1 thorpej printf("i80312: BANK0 = 0x%08x BANK1 = 0x%08x\n", bank0, bank1);
83 1.1 thorpej #endif
84 1.1 thorpej
85 1.1 thorpej *size = bank0 + bank1;
86 1.1 thorpej }
87