i80312_space.c revision 1.1.4.2 1 1.1.4.2 nathanw /* $NetBSD: i80312_space.c,v 1.1.4.2 2002/01/08 00:23:19 nathanw Exp $ */
2 1.1.4.2 nathanw
3 1.1.4.2 nathanw /*
4 1.1.4.2 nathanw * Copyright (c) 2001 Wasabi Systems, Inc.
5 1.1.4.2 nathanw * All rights reserved.
6 1.1.4.2 nathanw *
7 1.1.4.2 nathanw * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.1.4.2 nathanw *
9 1.1.4.2 nathanw * Redistribution and use in source and binary forms, with or without
10 1.1.4.2 nathanw * modification, are permitted provided that the following conditions
11 1.1.4.2 nathanw * are met:
12 1.1.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
13 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer.
14 1.1.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
15 1.1.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
16 1.1.4.2 nathanw * documentation and/or other materials provided with the distribution.
17 1.1.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
18 1.1.4.2 nathanw * must display the following acknowledgement:
19 1.1.4.2 nathanw * This product includes software developed for the NetBSD Project by
20 1.1.4.2 nathanw * Wasabi Systems, Inc.
21 1.1.4.2 nathanw * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1.4.2 nathanw * or promote products derived from this software without specific prior
23 1.1.4.2 nathanw * written permission.
24 1.1.4.2 nathanw *
25 1.1.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1.4.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1.4.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1.4.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1.4.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1.4.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1.4.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1.4.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1.4.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1.4.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1.4.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
36 1.1.4.2 nathanw */
37 1.1.4.2 nathanw
38 1.1.4.2 nathanw /*
39 1.1.4.2 nathanw * bus_space functions for i80312 Companion I/O chip.
40 1.1.4.2 nathanw */
41 1.1.4.2 nathanw
42 1.1.4.2 nathanw #include <sys/param.h>
43 1.1.4.2 nathanw #include <sys/systm.h>
44 1.1.4.2 nathanw
45 1.1.4.2 nathanw #include <uvm/uvm_extern.h>
46 1.1.4.2 nathanw
47 1.1.4.2 nathanw #include <machine/bus.h>
48 1.1.4.2 nathanw
49 1.1.4.2 nathanw #include <arm/xscale/i80312reg.h>
50 1.1.4.2 nathanw #include <arm/xscale/i80312var.h>
51 1.1.4.2 nathanw
52 1.1.4.2 nathanw /* Prototypes for all the bus_space structure functions */
53 1.1.4.2 nathanw bs_protos(i80312);
54 1.1.4.2 nathanw bs_protos(i80312_io);
55 1.1.4.2 nathanw bs_protos(i80312_mem);
56 1.1.4.2 nathanw bs_protos(bs_notimpl);
57 1.1.4.2 nathanw
58 1.1.4.2 nathanw /*
59 1.1.4.2 nathanw * Template bus_space -- copied, and the bits that are NULL are
60 1.1.4.2 nathanw * filled in.
61 1.1.4.2 nathanw */
62 1.1.4.2 nathanw const struct bus_space i80312_bs_tag_template = {
63 1.1.4.2 nathanw /* cookie */
64 1.1.4.2 nathanw (void *) 0,
65 1.1.4.2 nathanw
66 1.1.4.2 nathanw /* mapping/unmapping */
67 1.1.4.2 nathanw NULL,
68 1.1.4.2 nathanw NULL,
69 1.1.4.2 nathanw i80312_bs_subregion,
70 1.1.4.2 nathanw
71 1.1.4.2 nathanw /* allocation/deallocation */
72 1.1.4.2 nathanw NULL,
73 1.1.4.2 nathanw NULL,
74 1.1.4.2 nathanw
75 1.1.4.2 nathanw /* get kernel virtual address */
76 1.1.4.2 nathanw i80312_bs_vaddr,
77 1.1.4.2 nathanw
78 1.1.4.2 nathanw /* mmap */
79 1.1.4.2 nathanw i80312_bs_mmap,
80 1.1.4.2 nathanw
81 1.1.4.2 nathanw /* barrier */
82 1.1.4.2 nathanw i80312_bs_barrier,
83 1.1.4.2 nathanw
84 1.1.4.2 nathanw /* read (single) */
85 1.1.4.2 nathanw i80312_bs_r_1,
86 1.1.4.2 nathanw i80312_bs_r_2,
87 1.1.4.2 nathanw i80312_bs_r_4,
88 1.1.4.2 nathanw bs_notimpl_bs_r_8,
89 1.1.4.2 nathanw
90 1.1.4.2 nathanw /* read multiple */
91 1.1.4.2 nathanw i80312_bs_rm_1,
92 1.1.4.2 nathanw i80312_bs_rm_2,
93 1.1.4.2 nathanw i80312_bs_rm_4,
94 1.1.4.2 nathanw bs_notimpl_bs_rm_8,
95 1.1.4.2 nathanw
96 1.1.4.2 nathanw /* read region */
97 1.1.4.2 nathanw bs_notimpl_bs_rr_1,
98 1.1.4.2 nathanw i80312_bs_rr_2,
99 1.1.4.2 nathanw i80312_bs_rr_4,
100 1.1.4.2 nathanw bs_notimpl_bs_rr_8,
101 1.1.4.2 nathanw
102 1.1.4.2 nathanw /* write (single) */
103 1.1.4.2 nathanw i80312_bs_w_1,
104 1.1.4.2 nathanw i80312_bs_w_2,
105 1.1.4.2 nathanw i80312_bs_w_4,
106 1.1.4.2 nathanw bs_notimpl_bs_w_8,
107 1.1.4.2 nathanw
108 1.1.4.2 nathanw /* write multiple */
109 1.1.4.2 nathanw i80312_bs_wm_1,
110 1.1.4.2 nathanw i80312_bs_wm_2,
111 1.1.4.2 nathanw i80312_bs_wm_4,
112 1.1.4.2 nathanw bs_notimpl_bs_wm_8,
113 1.1.4.2 nathanw
114 1.1.4.2 nathanw /* write region */
115 1.1.4.2 nathanw bs_notimpl_bs_wr_1,
116 1.1.4.2 nathanw i80312_bs_wr_2,
117 1.1.4.2 nathanw i80312_bs_wr_4,
118 1.1.4.2 nathanw bs_notimpl_bs_wr_8,
119 1.1.4.2 nathanw
120 1.1.4.2 nathanw /* set multiple */
121 1.1.4.2 nathanw bs_notimpl_bs_sm_1,
122 1.1.4.2 nathanw bs_notimpl_bs_sm_2,
123 1.1.4.2 nathanw bs_notimpl_bs_sm_4,
124 1.1.4.2 nathanw bs_notimpl_bs_sm_8,
125 1.1.4.2 nathanw
126 1.1.4.2 nathanw /* set region */
127 1.1.4.2 nathanw bs_notimpl_bs_sr_1,
128 1.1.4.2 nathanw i80312_bs_sr_2,
129 1.1.4.2 nathanw bs_notimpl_bs_sr_4,
130 1.1.4.2 nathanw bs_notimpl_bs_sr_8,
131 1.1.4.2 nathanw
132 1.1.4.2 nathanw /* copy */
133 1.1.4.2 nathanw bs_notimpl_bs_c_1,
134 1.1.4.2 nathanw i80312_bs_c_2,
135 1.1.4.2 nathanw bs_notimpl_bs_c_4,
136 1.1.4.2 nathanw bs_notimpl_bs_c_8,
137 1.1.4.2 nathanw };
138 1.1.4.2 nathanw
139 1.1.4.2 nathanw void
140 1.1.4.2 nathanw i80312_bs_init(bus_space_tag_t bs, void *cookie)
141 1.1.4.2 nathanw {
142 1.1.4.2 nathanw
143 1.1.4.2 nathanw *bs = i80312_bs_tag_template;
144 1.1.4.2 nathanw bs->bs_cookie = cookie;
145 1.1.4.2 nathanw }
146 1.1.4.2 nathanw
147 1.1.4.2 nathanw void
148 1.1.4.2 nathanw i80312_io_bs_init(bus_space_tag_t bs, void *cookie)
149 1.1.4.2 nathanw {
150 1.1.4.2 nathanw
151 1.1.4.2 nathanw *bs = i80312_bs_tag_template;
152 1.1.4.2 nathanw bs->bs_cookie = cookie;
153 1.1.4.2 nathanw
154 1.1.4.2 nathanw bs->bs_map = i80312_io_bs_map;
155 1.1.4.2 nathanw bs->bs_unmap = i80312_io_bs_unmap;
156 1.1.4.2 nathanw bs->bs_alloc = i80312_io_bs_alloc;
157 1.1.4.2 nathanw bs->bs_free = i80312_io_bs_free;
158 1.1.4.2 nathanw
159 1.1.4.2 nathanw bs->bs_vaddr = i80312_io_bs_vaddr;
160 1.1.4.2 nathanw }
161 1.1.4.2 nathanw
162 1.1.4.2 nathanw void
163 1.1.4.2 nathanw i80312_mem_bs_init(bus_space_tag_t bs, void *cookie)
164 1.1.4.2 nathanw {
165 1.1.4.2 nathanw
166 1.1.4.2 nathanw *bs = i80312_bs_tag_template;
167 1.1.4.2 nathanw bs->bs_cookie = cookie;
168 1.1.4.2 nathanw
169 1.1.4.2 nathanw bs->bs_map = i80312_mem_bs_map;
170 1.1.4.2 nathanw bs->bs_unmap = i80312_mem_bs_unmap;
171 1.1.4.2 nathanw bs->bs_alloc = i80312_mem_bs_alloc;
172 1.1.4.2 nathanw bs->bs_free = i80312_mem_bs_free;
173 1.1.4.2 nathanw
174 1.1.4.2 nathanw bs->bs_mmap = i80312_mem_bs_mmap;
175 1.1.4.2 nathanw }
176 1.1.4.2 nathanw
177 1.1.4.2 nathanw /* *** Routines shared by i80312, PCI IO, and PCI MEM. *** */
178 1.1.4.2 nathanw
179 1.1.4.2 nathanw int
180 1.1.4.2 nathanw i80312_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
181 1.1.4.2 nathanw bus_size_t size, bus_space_handle_t *nbshp)
182 1.1.4.2 nathanw {
183 1.1.4.2 nathanw
184 1.1.4.2 nathanw *nbshp = bsh + offset;
185 1.1.4.2 nathanw return (0);
186 1.1.4.2 nathanw }
187 1.1.4.2 nathanw
188 1.1.4.2 nathanw void
189 1.1.4.2 nathanw i80312_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
190 1.1.4.2 nathanw bus_size_t len, int flags)
191 1.1.4.2 nathanw {
192 1.1.4.2 nathanw
193 1.1.4.2 nathanw /* Nothing to do. */
194 1.1.4.2 nathanw }
195 1.1.4.2 nathanw
196 1.1.4.2 nathanw void *
197 1.1.4.2 nathanw i80312_bs_vaddr(void *t, bus_space_handle_t bsh)
198 1.1.4.2 nathanw {
199 1.1.4.2 nathanw
200 1.1.4.2 nathanw return ((void *)bsh);
201 1.1.4.2 nathanw }
202 1.1.4.2 nathanw
203 1.1.4.2 nathanw paddr_t
204 1.1.4.2 nathanw i80312_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
205 1.1.4.2 nathanw {
206 1.1.4.2 nathanw
207 1.1.4.2 nathanw /* Not supported. */
208 1.1.4.2 nathanw return (-1);
209 1.1.4.2 nathanw }
210 1.1.4.2 nathanw
211 1.1.4.2 nathanw /* *** Routines for PCI IO. *** */
212 1.1.4.2 nathanw
213 1.1.4.2 nathanw int
214 1.1.4.2 nathanw i80312_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
215 1.1.4.2 nathanw bus_space_handle_t *bshp)
216 1.1.4.2 nathanw {
217 1.1.4.2 nathanw struct i80312_softc *sc = t;
218 1.1.4.2 nathanw vaddr_t winvaddr;
219 1.1.4.2 nathanw uint32_t busbase, bussize;
220 1.1.4.2 nathanw
221 1.1.4.2 nathanw if (bpa >= sc->sc_pioout_base &&
222 1.1.4.2 nathanw bpa < (sc->sc_pioout_base + sc->sc_pioout_size)) {
223 1.1.4.2 nathanw busbase = sc->sc_pioout_base;
224 1.1.4.2 nathanw bussize = sc->sc_pioout_size;
225 1.1.4.2 nathanw winvaddr = sc->sc_piow_vaddr;
226 1.1.4.2 nathanw } else if (bpa >= sc->sc_sioout_base &&
227 1.1.4.2 nathanw bpa < (sc->sc_sioout_base + sc->sc_sioout_size)) {
228 1.1.4.2 nathanw busbase = sc->sc_sioout_base;
229 1.1.4.2 nathanw bussize = sc->sc_sioout_size;
230 1.1.4.2 nathanw winvaddr = sc->sc_siow_vaddr;
231 1.1.4.2 nathanw } else
232 1.1.4.2 nathanw return (EINVAL);
233 1.1.4.2 nathanw
234 1.1.4.2 nathanw if ((bpa + size) >= (busbase + bussize))
235 1.1.4.2 nathanw return (EINVAL);
236 1.1.4.2 nathanw
237 1.1.4.2 nathanw /*
238 1.1.4.2 nathanw * Found the window -- PCI I/O space is mapped at a fixed
239 1.1.4.2 nathanw * virtual address by board-specific code. Translate the
240 1.1.4.2 nathanw * bus address to the virtual address.
241 1.1.4.2 nathanw */
242 1.1.4.2 nathanw *bshp = winvaddr + (bpa - busbase);
243 1.1.4.2 nathanw
244 1.1.4.2 nathanw return (0);
245 1.1.4.2 nathanw }
246 1.1.4.2 nathanw
247 1.1.4.2 nathanw void
248 1.1.4.2 nathanw i80312_io_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
249 1.1.4.2 nathanw {
250 1.1.4.2 nathanw
251 1.1.4.2 nathanw /* Nothing to do. */
252 1.1.4.2 nathanw }
253 1.1.4.2 nathanw
254 1.1.4.2 nathanw int
255 1.1.4.2 nathanw i80312_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
256 1.1.4.2 nathanw bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
257 1.1.4.2 nathanw bus_addr_t *bpap, bus_space_handle_t *bshp)
258 1.1.4.2 nathanw {
259 1.1.4.2 nathanw
260 1.1.4.2 nathanw panic("i80312_io_bs_alloc(): not implemented\n");
261 1.1.4.2 nathanw }
262 1.1.4.2 nathanw
263 1.1.4.2 nathanw void
264 1.1.4.2 nathanw i80312_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
265 1.1.4.2 nathanw {
266 1.1.4.2 nathanw
267 1.1.4.2 nathanw panic("i80312_io_bs_free(): not implemented\n");
268 1.1.4.2 nathanw }
269 1.1.4.2 nathanw
270 1.1.4.2 nathanw void *
271 1.1.4.2 nathanw i80312_io_bs_vaddr(void *t, bus_space_handle_t bsh)
272 1.1.4.2 nathanw {
273 1.1.4.2 nathanw
274 1.1.4.2 nathanw /* Not supported. */
275 1.1.4.2 nathanw return (NULL);
276 1.1.4.2 nathanw }
277 1.1.4.2 nathanw
278 1.1.4.2 nathanw /* *** Routines for PCI MEM. *** */
279 1.1.4.2 nathanw
280 1.1.4.2 nathanw int
281 1.1.4.2 nathanw i80312_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
282 1.1.4.2 nathanw bus_space_handle_t *bshp)
283 1.1.4.2 nathanw {
284 1.1.4.2 nathanw
285 1.1.4.2 nathanw struct i80312_softc *sc = t;
286 1.1.4.2 nathanw vaddr_t va;
287 1.1.4.2 nathanw uint32_t busbase, bussize;
288 1.1.4.2 nathanw paddr_t pa, endpa, physbase;
289 1.1.4.2 nathanw
290 1.1.4.2 nathanw if (bpa >= sc->sc_pmemout_base &&
291 1.1.4.2 nathanw bpa < (sc->sc_pmemout_base + sc->sc_pmemout_size)) {
292 1.1.4.2 nathanw busbase = sc->sc_pmemout_base;
293 1.1.4.2 nathanw bussize = sc->sc_pmemout_size;
294 1.1.4.2 nathanw physbase = I80312_PCI_XLATE_PMW_BASE;
295 1.1.4.2 nathanw } else if (bpa >= sc->sc_smemout_base &&
296 1.1.4.2 nathanw bpa < (sc->sc_smemout_base + sc->sc_smemout_size)) {
297 1.1.4.2 nathanw busbase = sc->sc_smemout_base;
298 1.1.4.2 nathanw bussize = sc->sc_smemout_size;
299 1.1.4.2 nathanw physbase = I80312_PCI_XLATE_SMW_BASE;
300 1.1.4.2 nathanw } else
301 1.1.4.2 nathanw return (EINVAL);
302 1.1.4.2 nathanw
303 1.1.4.2 nathanw if ((bpa + size) >= (busbase + bussize))
304 1.1.4.2 nathanw return (EINVAL);
305 1.1.4.2 nathanw
306 1.1.4.2 nathanw /*
307 1.1.4.2 nathanw * Found the window -- PCI MEM space is not mapped by allocating
308 1.1.4.2 nathanw * some kernel VA space and mapping the pages with pmap_enter().
309 1.1.4.2 nathanw * pmap_enter() will map unmanaged pages as non-cacheable.
310 1.1.4.2 nathanw */
311 1.1.4.2 nathanw pa = trunc_page((bpa - busbase) + physbase);
312 1.1.4.2 nathanw endpa = round_page(((bpa - busbase) + physbase) + size);
313 1.1.4.2 nathanw
314 1.1.4.2 nathanw va = uvm_km_valloc(kernel_map, endpa - pa);
315 1.1.4.2 nathanw if (va == 0)
316 1.1.4.2 nathanw return (ENOMEM);
317 1.1.4.2 nathanw
318 1.1.4.2 nathanw *bshp = va + (bpa & PAGE_MASK);
319 1.1.4.2 nathanw
320 1.1.4.2 nathanw for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
321 1.1.4.2 nathanw pmap_enter(pmap_kernel(), va, pa,
322 1.1.4.2 nathanw VM_PROT_READ | VM_PROT_WRITE, PMAP_WIRED);
323 1.1.4.2 nathanw }
324 1.1.4.2 nathanw pmap_update(pmap_kernel());
325 1.1.4.2 nathanw
326 1.1.4.2 nathanw return (0);
327 1.1.4.2 nathanw }
328 1.1.4.2 nathanw
329 1.1.4.2 nathanw void
330 1.1.4.2 nathanw i80312_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
331 1.1.4.2 nathanw {
332 1.1.4.2 nathanw vaddr_t va, endva;
333 1.1.4.2 nathanw
334 1.1.4.2 nathanw va = trunc_page(bsh);
335 1.1.4.2 nathanw endva = round_page(bsh + size);
336 1.1.4.2 nathanw
337 1.1.4.2 nathanw /* Free the kernel virtual mapping. */
338 1.1.4.2 nathanw uvm_km_free(kernel_map, va, endva - va);
339 1.1.4.2 nathanw }
340 1.1.4.2 nathanw
341 1.1.4.2 nathanw int
342 1.1.4.2 nathanw i80312_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
343 1.1.4.2 nathanw bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
344 1.1.4.2 nathanw bus_addr_t *bpap, bus_space_handle_t *bshp)
345 1.1.4.2 nathanw {
346 1.1.4.2 nathanw
347 1.1.4.2 nathanw panic("i80312_mem_bs_alloc(): not implemented\n");
348 1.1.4.2 nathanw }
349 1.1.4.2 nathanw
350 1.1.4.2 nathanw void
351 1.1.4.2 nathanw i80312_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
352 1.1.4.2 nathanw {
353 1.1.4.2 nathanw
354 1.1.4.2 nathanw panic("i80312_mem_bs_free(): not implemented\n");
355 1.1.4.2 nathanw }
356 1.1.4.2 nathanw
357 1.1.4.2 nathanw paddr_t
358 1.1.4.2 nathanw i80312_mem_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
359 1.1.4.2 nathanw {
360 1.1.4.2 nathanw
361 1.1.4.2 nathanw /* XXX */
362 1.1.4.2 nathanw return (-1);
363 1.1.4.2 nathanw }
364