ixp425_a4x_io.S revision 1.1 1 1.1 scw /* $NetBSD: ixp425_a4x_io.S,v 1.1 2003/10/08 14:55:04 scw Exp $ */
2 1.1 scw
3 1.1 scw /*
4 1.1 scw * Copyright 2003 Wasabi Systems, Inc.
5 1.1 scw * All rights reserved.
6 1.1 scw *
7 1.1 scw * Written by Steve C. Woodford for Wasabi Systems, Inc.
8 1.1 scw *
9 1.1 scw * Redistribution and use in source and binary forms, with or without
10 1.1 scw * modification, are permitted provided that the following conditions
11 1.1 scw * are met:
12 1.1 scw * 1. Redistributions of source code must retain the above copyright
13 1.1 scw * notice, this list of conditions and the following disclaimer.
14 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 scw * notice, this list of conditions and the following disclaimer in the
16 1.1 scw * documentation and/or other materials provided with the distribution.
17 1.1 scw * 3. All advertising materials mentioning features or use of this software
18 1.1 scw * must display the following acknowledgement:
19 1.1 scw * This product includes software developed for the NetBSD Project by
20 1.1 scw * Wasabi Systems, Inc.
21 1.1 scw * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 scw * or promote products derived from this software without specific prior
23 1.1 scw * written permission.
24 1.1 scw *
25 1.1 scw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 scw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 scw * POSSIBILITY OF SUCH DAMAGE.
36 1.1 scw */
37 1.1 scw
38 1.1 scw /*
39 1.1 scw * There are simple bus space functions for IO registers mapped at
40 1.1 scw * 32-bit aligned positions. offset is multiplied by 4.
41 1.1 scw *
42 1.1 scw * Based loosely on pxa2x0_a2x_io.S
43 1.1 scw */
44 1.1 scw
45 1.1 scw #include <machine/asm.h>
46 1.1 scw
47 1.1 scw /*
48 1.1 scw * bus_space I/O functions with offset*4
49 1.1 scw */
50 1.1 scw
51 1.1 scw /*
52 1.1 scw * Read single
53 1.1 scw */
54 1.1 scw ENTRY(a4x_bs_r_1)
55 1.1 scw ldr r0, [r1, r2, LSL #2]
56 1.1 scw and r0, r0, #0xff
57 1.1 scw mov pc, lr
58 1.1 scw
59 1.1 scw ENTRY(a4x_bs_r_2)
60 1.1 scw ldr r0, [r1, r2, LSL #2]
61 1.1 scw mov r1, #0xff
62 1.1 scw orr r1, r1, r1, lsl #8
63 1.1 scw and r0, r0, r1
64 1.1 scw mov pc, lr
65 1.1 scw
66 1.1 scw ENTRY(a4x_bs_r_4)
67 1.1 scw ldr r0, [r1, r2, LSL #2]
68 1.1 scw mov pc, lr
69 1.1 scw
70 1.1 scw /*
71 1.1 scw * Write single
72 1.1 scw */
73 1.1 scw ENTRY(a4x_bs_w_1)
74 1.1 scw and r3, r3, #0xff
75 1.1 scw str r3, [r1, r2, LSL #2]
76 1.1 scw mov pc, lr
77 1.1 scw
78 1.1 scw ENTRY(a4x_bs_w_2)
79 1.1 scw mov r0, #0xff
80 1.1 scw orr r0, r0, r0, lsl #8
81 1.1 scw and r3, r3, r0
82 1.1 scw str r3, [r1, r2, LSL #2]
83 1.1 scw mov pc, lr
84 1.1 scw
85 1.1 scw ENTRY(a4x_bs_w_4)
86 1.1 scw str r3, [r1, r2, LSL #2]
87 1.1 scw mov pc, lr
88 1.1 scw
89 1.1 scw /*
90 1.1 scw * Read multiple
91 1.1 scw */
92 1.1 scw ENTRY(a4x_bs_rm_1)
93 1.1 scw add r0, r1, r2, lsl #2
94 1.1 scw ldr r2, [sp, #0]
95 1.1 scw mov r1, r3
96 1.1 scw teq r2, #0
97 1.1 scw moveq pc, lr
98 1.1 scw 1: ldr r3, [r0]
99 1.1 scw subs r2, r2, #1
100 1.1 scw strb r3, [r1], #1
101 1.1 scw bne 1b
102 1.1 scw mov pc, lr
103 1.1 scw
104 1.1 scw ENTRY(a4x_bs_rm_2)
105 1.1 scw add r0, r1, r2, lsl #2
106 1.1 scw ldr r2, [sp, #0]
107 1.1 scw mov r1, r3
108 1.1 scw teq r2, #0
109 1.1 scw moveq pc, lr
110 1.1 scw 1: ldr r3, [r0]
111 1.1 scw subs r2, r2, #1
112 1.1 scw strh r3, [r1], #2
113 1.1 scw bne 1b
114 1.1 scw mov pc, lr
115 1.1 scw
116 1.1 scw /*
117 1.1 scw * Write multiple
118 1.1 scw */
119 1.1 scw ENTRY(a4x_bs_wm_1)
120 1.1 scw add r0, r1, r2, lsl #2
121 1.1 scw ldr r2, [sp, #0]
122 1.1 scw mov r1, r3
123 1.1 scw teq r2, #0
124 1.1 scw moveq pc, lr
125 1.1 scw 1: ldrb r3, [r1], #1
126 1.1 scw subs r2, r2, #1
127 1.1 scw str r3, [r0]
128 1.1 scw bne 1b
129 1.1 scw mov pc, lr
130 1.1 scw
131 1.1 scw ENTRY(a4x_bs_wm_2)
132 1.1 scw add r0, r1, r2, lsl #2
133 1.1 scw ldr r2, [sp, #0]
134 1.1 scw mov r1, r3
135 1.1 scw teq r2, #0
136 1.1 scw moveq pc, lr
137 1.1 scw 1: ldrh r3, [r1], #2
138 1.1 scw subs r2, r2, #1
139 1.1 scw str r3, [r0]
140 1.1 scw bne 1b
141 1.1 scw mov pc, lr
142