ixp425_com.c revision 1.4 1 1.4 ichiro /* $NetBSD: ixp425_com.c,v 1.4 2003/05/31 11:27:01 ichiro Exp $ */
2 1.1 ichiro /*
3 1.1 ichiro * Copyright (c) 2003
4 1.1 ichiro * Ichiro FUKUHARA <ichiro (at) ichiro.org>.
5 1.1 ichiro * All rights reserved.
6 1.1 ichiro *
7 1.1 ichiro * Redistribution and use in source and binary forms, with or without
8 1.1 ichiro * modification, are permitted provided that the following conditions
9 1.1 ichiro * are met:
10 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
11 1.1 ichiro * notice, this list of conditions and the following disclaimer.
12 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
14 1.1 ichiro * documentation and/or other materials provided with the distribution.
15 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
16 1.1 ichiro * must display the following acknowledgement:
17 1.1 ichiro * This product includes software developed by Ichiro FUKUHARA.
18 1.1 ichiro * 4. The name of the company nor the name of the author may be used to
19 1.1 ichiro * endorse or promote products derived from this software without specific
20 1.1 ichiro * prior written permission.
21 1.1 ichiro *
22 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
23 1.1 ichiro * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 ichiro * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 ichiro * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
26 1.1 ichiro * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 ichiro * SUCH DAMAGE.
33 1.1 ichiro */
34 1.1 ichiro
35 1.1 ichiro /*
36 1.1 ichiro * Copyright (c) 1991 The Regents of the University of California.
37 1.1 ichiro * All rights reserved.
38 1.1 ichiro *
39 1.1 ichiro * Redistribution and use in source and binary forms, with or without
40 1.1 ichiro * modification, are permitted provided that the following conditions
41 1.1 ichiro * are met:
42 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
43 1.1 ichiro * notice, this list of conditions and the following disclaimer.
44 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
45 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
46 1.1 ichiro * documentation and/or other materials provided with the distribution.
47 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
48 1.1 ichiro * must display the following acknowledgement:
49 1.1 ichiro * This product includes software developed by the University of
50 1.1 ichiro * California, Berkeley and its contributors.
51 1.1 ichiro * 4. Neither the name of the University nor the names of its contributors
52 1.1 ichiro * may be used to endorse or promote products derived from this software
53 1.1 ichiro * without specific prior written permission.
54 1.1 ichiro *
55 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
56 1.1 ichiro * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
57 1.1 ichiro * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
58 1.1 ichiro * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
59 1.1 ichiro * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
60 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
61 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
62 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
63 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
64 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
65 1.1 ichiro * SUCH DAMAGE.
66 1.1 ichiro *
67 1.1 ichiro * @(#)com.c 7.5 (Berkeley) 5/16/91
68 1.1 ichiro */
69 1.1 ichiro
70 1.1 ichiro #include <sys/cdefs.h>
71 1.4 ichiro __KERNEL_RCSID(0, "$NetBSD: ixp425_com.c,v 1.4 2003/05/31 11:27:01 ichiro Exp $");
72 1.1 ichiro
73 1.1 ichiro #include "opt_ddb.h"
74 1.1 ichiro #include "opt_kgdb.h"
75 1.1 ichiro
76 1.1 ichiro #include "rnd.h"
77 1.1 ichiro #if NRND > 0 && defined(RND_COM)
78 1.1 ichiro #include <sys/rnd.h>
79 1.1 ichiro #endif
80 1.1 ichiro
81 1.1 ichiro #include <sys/param.h>
82 1.1 ichiro #include <sys/systm.h>
83 1.1 ichiro #include <sys/types.h>
84 1.1 ichiro #include <sys/conf.h>
85 1.1 ichiro #include <sys/file.h>
86 1.1 ichiro #include <sys/device.h>
87 1.1 ichiro #include <sys/kernel.h>
88 1.1 ichiro #include <sys/malloc.h>
89 1.1 ichiro #include <sys/tty.h>
90 1.1 ichiro #include <sys/uio.h>
91 1.1 ichiro #include <sys/vnode.h>
92 1.1 ichiro
93 1.1 ichiro #include <machine/intr.h>
94 1.1 ichiro #include <machine/bus.h>
95 1.1 ichiro
96 1.1 ichiro #include <arm/xscale/ixp425reg.h>
97 1.1 ichiro #include <arm/xscale/ixp425_comvar.h>
98 1.1 ichiro
99 1.1 ichiro #include <dev/cons.h>
100 1.1 ichiro
101 1.1 ichiro #include "ixpcom.h"
102 1.1 ichiro
103 1.1 ichiro static int ixp4xx_comparam(struct tty *, struct termios *);
104 1.1 ichiro static void ixp4xx_comstart(struct tty *);
105 1.1 ichiro static int ixp4xx_comhwiflow(struct tty *, int);
106 1.1 ichiro
107 1.1 ichiro static u_int cflag2lcr(tcflag_t);
108 1.1 ichiro static void ixp4xx_com_modem(struct ixp4xx_com_softc *, int);
109 1.1 ichiro static void ixp4xx_com_iflush(struct ixp4xx_com_softc *);
110 1.1 ichiro static void tiocm_to_ixp4xx_com(struct ixp4xx_com_softc *, u_long, int);
111 1.1 ichiro static int ixp4xx_com_to_tiocm(struct ixp4xx_com_softc *);
112 1.1 ichiro
113 1.1 ichiro static void ixp4xx_com_set_cr(struct ixp4xx_com_softc *);
114 1.1 ichiro
115 1.1 ichiro static void ixp4xxcomsoft(void *);
116 1.1 ichiro inline static void ixp4xx_com_txsoft(struct ixp4xx_com_softc *, struct tty *);
117 1.1 ichiro inline static void ixp4xx_com_rxsoft(struct ixp4xx_com_softc *, struct tty *);
118 1.1 ichiro
119 1.1 ichiro int ixp4xx_cominit(bus_space_tag_t, bus_space_handle_t, int, int, tcflag_t);
120 1.1 ichiro
121 1.1 ichiro int ixp4xx_comcngetc(dev_t);
122 1.1 ichiro void ixp4xx_comcnputc(dev_t, int);
123 1.1 ichiro void ixp4xx_comcnpollc(dev_t, int);
124 1.1 ichiro void ixp4xx_comcnprobe(struct consdev *);
125 1.1 ichiro void ixp4xx_comcninit(struct consdev *);
126 1.1 ichiro
127 1.1 ichiro static struct ixp4xx_com_cons_softc {
128 1.1 ichiro bus_space_tag_t sc_iot;
129 1.1 ichiro bus_space_handle_t sc_ioh;
130 1.1 ichiro bus_addr_t sc_baseaddr;
131 1.1 ichiro int sc_ospeed;
132 1.1 ichiro tcflag_t sc_cflag;
133 1.1 ichiro int sc_attached;
134 1.1 ichiro } ixp4xx_comcn_sc;
135 1.1 ichiro
136 1.1 ichiro static struct cnm_state ixp4xx_com_cnm_state;
137 1.1 ichiro
138 1.1 ichiro struct ixp4xx_com_softc* ixp4xx_com_sc = NULL;
139 1.1 ichiro
140 1.1 ichiro extern struct cfdriver ixpcom_cd;
141 1.1 ichiro
142 1.1 ichiro dev_type_open(ixp4xx_comopen);
143 1.1 ichiro dev_type_close(ixp4xx_comclose);
144 1.1 ichiro dev_type_read(ixp4xx_comread);
145 1.1 ichiro dev_type_write(ixp4xx_comwrite);
146 1.1 ichiro dev_type_ioctl(ixp4xx_comioctl);
147 1.1 ichiro dev_type_stop(ixp4xx_comstop);
148 1.1 ichiro dev_type_tty(ixp4xx_comtty);
149 1.1 ichiro dev_type_poll(ixp4xx_compoll);
150 1.1 ichiro
151 1.1 ichiro const struct cdevsw ixpcom_cdevsw = {
152 1.1 ichiro ixp4xx_comopen, ixp4xx_comclose, ixp4xx_comread, ixp4xx_comwrite,
153 1.1 ichiro ixp4xx_comioctl, ixp4xx_comstop, ixp4xx_comtty, ixp4xx_compoll,
154 1.1 ichiro nommap, ttykqfilter, D_TTY
155 1.1 ichiro };
156 1.1 ichiro
157 1.1 ichiro #define COMUNIT_MASK 0x7ffff
158 1.1 ichiro #define COMDIALOUT_MASK 0x80000
159 1.1 ichiro
160 1.1 ichiro #define COMUNIT(x) (minor(x) & COMUNIT_MASK)
161 1.1 ichiro #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK)
162 1.1 ichiro
163 1.1 ichiro #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \
164 1.1 ichiro ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE))
165 1.1 ichiro
166 1.1 ichiro #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f))
167 1.1 ichiro
168 1.1 ichiro #define COM_LOCK(sc);
169 1.1 ichiro #define COM_UNLOCK(sc);
170 1.1 ichiro
171 1.1 ichiro #ifndef COM_TOLERANCE
172 1.1 ichiro #define COM_TOLERANCE 30 /* XXX: baud rate tolerance, in 0.1% units */
173 1.1 ichiro #endif
174 1.1 ichiro
175 1.1 ichiro #define SET(t, f) (t) |= (f)
176 1.1 ichiro #define CLR(t, f) (t) &= ~(f)
177 1.1 ichiro #define ISSET(t, f) ((t) & (f))
178 1.1 ichiro
179 1.1 ichiro #ifdef COM_DEBUG
180 1.1 ichiro int com_debug = 0;
181 1.1 ichiro #endif
182 1.1 ichiro
183 1.1 ichiro int
184 1.1 ichiro ixp4xx_comspeed(long speed, long frequency)
185 1.1 ichiro {
186 1.1 ichiro #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
187 1.1 ichiro
188 1.1 ichiro int x, err;
189 1.1 ichiro
190 1.1 ichiro if (speed <= 0)
191 1.1 ichiro return (-1);
192 1.1 ichiro x = divrnd(frequency / 16, speed);
193 1.1 ichiro if (x <= 0)
194 1.1 ichiro return (-1);
195 1.1 ichiro err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000;
196 1.1 ichiro if (err < 0)
197 1.1 ichiro err = -err;
198 1.1 ichiro if (err > COM_TOLERANCE)
199 1.1 ichiro return (-1);
200 1.1 ichiro return (x);
201 1.1 ichiro #undef divrnd
202 1.1 ichiro }
203 1.1 ichiro
204 1.1 ichiro #if XXX
205 1.1 ichiro static void
206 1.1 ichiro ixp4xx_enable_debugport(struct ixp4xx_com_softc *sc)
207 1.1 ichiro {
208 1.1 ichiro int s;
209 1.1 ichiro
210 1.1 ichiro /* Turn on line break interrupt, set carrier. */
211 1.1 ichiro s = splserial();
212 1.1 ichiro COM_LOCK(sc);
213 1.3 ichiro SET(sc->sc_ier, IER_RAVIE | IER_UUE);
214 1.1 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER, sc->sc_ier);
215 1.1 ichiro SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
216 1.1 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_MCR, sc->sc_mcr);
217 1.1 ichiro COM_UNLOCK(sc);
218 1.1 ichiro splx(s);
219 1.1 ichiro }
220 1.1 ichiro #endif
221 1.1 ichiro
222 1.1 ichiro void
223 1.1 ichiro ixp4xx_com_attach_subr(struct ixp4xx_com_softc *sc)
224 1.1 ichiro {
225 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
226 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
227 1.1 ichiro
228 1.1 ichiro struct tty *tp;
229 1.1 ichiro
230 1.1 ichiro ixp4xx_com_sc = sc;
231 1.1 ichiro #if 0
232 1.1 ichiro callout_init(&sc->sc_diag_callout);
233 1.1 ichiro #endif
234 1.4 ichiro /* configuring the device. */
235 1.4 ichiro sc->sc_frequency = FREQ;
236 1.4 ichiro sc->sc_dlbl = ixp4xx_comspeed(CONSPEED, sc->sc_frequency);
237 1.4 ichiro sc->sc_dlbh = ixp4xx_comspeed(CONSPEED, sc->sc_frequency) >> 8;
238 1.4 ichiro
239 1.4 ichiro /* Disabling interrupt */
240 1.4 ichiro sc->sc_ier = IER_UUE;
241 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_IER, sc->sc_ier);
242 1.1 ichiro
243 1.4 ichiro sc->sc_fcr = FCR_TRIGGER_8 | FCR_RESETTF | FCR_RESETRF | FCR_ENABLE;
244 1.4 ichiro bus_space_write_4(iot, ioh, IXP425_UART_FCR, sc->sc_fcr);
245 1.4 ichiro
246 1.1 ichiro if (iot == ixp4xx_comcn_sc.sc_iot
247 1.1 ichiro && sc->sc_baseaddr == ixp4xx_comcn_sc.sc_baseaddr) {
248 1.1 ichiro ixp4xx_comcn_sc.sc_attached = 1;
249 1.1 ichiro
250 1.1 ichiro /* Make sure the console is always "hardwired". */
251 1.1 ichiro delay(20000); /* wait for output to finish */
252 1.1 ichiro SET(sc->sc_hwflags, COM_HW_CONSOLE);
253 1.1 ichiro SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
254 1.1 ichiro }
255 1.4 ichiro
256 1.4 ichiro
257 1.1 ichiro #ifdef KGDB
258 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) {
259 1.1 ichiro ixp4xx_com_kgdb_attached = 1;
260 1.1 ichiro printf("%s: kgdb\n", sc->sc_dev.dv_xname);
261 1.1 ichiro ixp4xx_enable_debugport(sc);
262 1.1 ichiro return;
263 1.1 ichiro }
264 1.1 ichiro #endif
265 1.1 ichiro
266 1.1 ichiro tp = ttymalloc();
267 1.1 ichiro tp->t_oproc = ixp4xx_comstart;
268 1.1 ichiro tp->t_param = ixp4xx_comparam;
269 1.1 ichiro tp->t_hwiflow = ixp4xx_comhwiflow;
270 1.1 ichiro
271 1.1 ichiro sc->sc_tty = tp;
272 1.1 ichiro sc->sc_rbuf = malloc(IXPCOM_RING_SIZE << 1, M_DEVBUF, M_NOWAIT);
273 1.1 ichiro sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
274 1.1 ichiro sc->sc_rbavail = IXPCOM_RING_SIZE;
275 1.1 ichiro if (sc->sc_rbuf == NULL) {
276 1.1 ichiro printf("%s: unable to allocate ring buffer\n",
277 1.1 ichiro sc->sc_dev.dv_xname);
278 1.1 ichiro return;
279 1.1 ichiro }
280 1.1 ichiro sc->sc_ebuf = sc->sc_rbuf + (IXPCOM_RING_SIZE << 1);
281 1.1 ichiro
282 1.1 ichiro tty_attach(tp);
283 1.1 ichiro
284 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
285 1.1 ichiro int maj;
286 1.1 ichiro
287 1.1 ichiro /* locate the major number */
288 1.1 ichiro maj = cdevsw_lookup_major(&ixpcom_cdevsw);
289 1.1 ichiro tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
290 1.1 ichiro printf("%s: console (major=%d)\n", sc->sc_dev.dv_xname, maj);
291 1.1 ichiro }
292 1.1 ichiro
293 1.1 ichiro sc->sc_si = softintr_establish(IPL_SOFTSERIAL, ixp4xxcomsoft, sc);
294 1.1 ichiro
295 1.1 ichiro #if NRND > 0 && defined(RND_COM)
296 1.1 ichiro rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
297 1.1 ichiro RND_TYPE_TTY, 0);
298 1.1 ichiro #endif
299 1.1 ichiro
300 1.1 ichiro /* if there are no enable/disable functions, assume the device
301 1.1 ichiro is always enabled */
302 1.1 ichiro if (!sc->enable)
303 1.1 ichiro sc->enabled = 1;
304 1.1 ichiro
305 1.1 ichiro SET(sc->sc_hwflags, COM_HW_DEV_OK);
306 1.1 ichiro }
307 1.1 ichiro
308 1.1 ichiro static int
309 1.1 ichiro ixp4xx_comparam(struct tty *tp, struct termios *t)
310 1.1 ichiro {
311 1.1 ichiro struct ixp4xx_com_softc *sc =
312 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(tp->t_dev));
313 1.1 ichiro int ospeed;
314 1.1 ichiro u_char lcr;
315 1.1 ichiro int s;
316 1.1 ichiro
317 1.1 ichiro ospeed = ixp4xx_comspeed(t->c_ospeed, sc->sc_frequency);
318 1.1 ichiro
319 1.1 ichiro /* Check requested parameters. */
320 1.1 ichiro if (ospeed < 0)
321 1.1 ichiro return EINVAL;
322 1.1 ichiro if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
323 1.1 ichiro return EINVAL;
324 1.1 ichiro
325 1.1 ichiro /*
326 1.1 ichiro * For the console, always force CLOCAL and !HUPCL, so that the port
327 1.1 ichiro * is always active.
328 1.1 ichiro */
329 1.1 ichiro if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
330 1.1 ichiro ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
331 1.1 ichiro SET(t->c_cflag, CLOCAL);
332 1.1 ichiro CLR(t->c_cflag, HUPCL);
333 1.1 ichiro }
334 1.1 ichiro
335 1.1 ichiro /*
336 1.1 ichiro * If there were no changes, don't do anything. This avoids dropping
337 1.1 ichiro * input and improves performance when all we did was frob things like
338 1.1 ichiro * VMIN and VTIME.
339 1.1 ichiro */
340 1.1 ichiro if (tp->t_ospeed == t->c_ospeed &&
341 1.1 ichiro tp->t_cflag == t->c_cflag)
342 1.1 ichiro return (0);
343 1.1 ichiro
344 1.1 ichiro lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
345 1.1 ichiro
346 1.1 ichiro s = splserial();
347 1.1 ichiro COM_LOCK(sc);
348 1.1 ichiro
349 1.1 ichiro sc->sc_lcr = lcr;
350 1.1 ichiro
351 1.1 ichiro /*
352 1.1 ichiro * If we're not in a mode that assumes a connection is present, then
353 1.1 ichiro * ignore carrier changes.
354 1.1 ichiro */
355 1.1 ichiro if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
356 1.1 ichiro sc->sc_msr_dcd = 0;
357 1.1 ichiro else
358 1.1 ichiro sc->sc_msr_dcd = MSR_DCD;
359 1.1 ichiro /*
360 1.1 ichiro * Set the flow control pins depending on the current flow control
361 1.1 ichiro * mode.
362 1.1 ichiro */
363 1.1 ichiro if (ISSET(t->c_cflag, CRTSCTS)) {
364 1.1 ichiro sc->sc_mcr_dtr = MCR_DTR;
365 1.1 ichiro sc->sc_mcr_rts = MCR_RTS;
366 1.1 ichiro sc->sc_msr_cts = MSR_CTS;
367 1.1 ichiro } else if (ISSET(t->c_cflag, MDMBUF)) {
368 1.1 ichiro /*
369 1.1 ichiro * For DTR/DCD flow control, make sure we don't toggle DTR for
370 1.1 ichiro * carrier detection.
371 1.1 ichiro */
372 1.1 ichiro sc->sc_mcr_dtr = 0;
373 1.1 ichiro sc->sc_mcr_rts = MCR_DTR;
374 1.1 ichiro sc->sc_msr_cts = MSR_DCD;
375 1.1 ichiro } else {
376 1.1 ichiro /*
377 1.1 ichiro * If no flow control, then always set RTS. This will make
378 1.1 ichiro * the other side happy if it mistakenly thinks we're doing
379 1.1 ichiro * RTS/CTS flow control.
380 1.1 ichiro */
381 1.1 ichiro sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
382 1.1 ichiro sc->sc_mcr_rts = 0;
383 1.1 ichiro sc->sc_msr_cts = 0;
384 1.1 ichiro if (ISSET(sc->sc_mcr, MCR_DTR))
385 1.1 ichiro SET(sc->sc_mcr, MCR_RTS);
386 1.1 ichiro else
387 1.1 ichiro CLR(sc->sc_mcr, MCR_RTS);
388 1.1 ichiro }
389 1.1 ichiro sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
390 1.1 ichiro
391 1.1 ichiro sc->sc_dlbl = ospeed;
392 1.1 ichiro sc->sc_dlbh = ospeed >> 8;
393 1.1 ichiro
394 1.1 ichiro /*
395 1.1 ichiro * Set the FIFO threshold based on the receive speed.
396 1.1 ichiro *
397 1.1 ichiro * * If it's a low speed, it's probably a mouse or some other
398 1.1 ichiro * interactive device, so set the threshold low.
399 1.1 ichiro * * If it's a high speed, trim the trigger level down to prevent
400 1.1 ichiro * overflows.
401 1.1 ichiro * * Otherwise set it a bit higher.
402 1.1 ichiro */
403 1.4 ichiro #if 0
404 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
405 1.1 ichiro sc->sc_fcr = FCR_ENABLE |
406 1.1 ichiro (t->c_ospeed <= 1200 ? FCR_TRIGGER_1 :
407 1.1 ichiro t->c_ospeed <= 38400 ? FCR_TRIGGER_16 : FCR_TRIGGER_8);
408 1.1 ichiro else
409 1.1 ichiro sc->sc_fcr = 0;
410 1.1 ichiro #endif
411 1.1 ichiro
412 1.1 ichiro /* And copy to tty. */
413 1.1 ichiro tp->t_ispeed = 0;
414 1.1 ichiro tp->t_ospeed = t->c_ospeed;
415 1.1 ichiro tp->t_cflag = t->c_cflag;
416 1.1 ichiro
417 1.1 ichiro if (!sc->sc_heldchange) {
418 1.1 ichiro if (sc->sc_tx_busy) {
419 1.1 ichiro sc->sc_heldtbc = sc->sc_tbc;
420 1.1 ichiro sc->sc_tbc = 0;
421 1.1 ichiro sc->sc_heldchange = 1;
422 1.1 ichiro } else
423 1.1 ichiro ixp4xx_com_set_cr(sc);
424 1.1 ichiro }
425 1.1 ichiro
426 1.1 ichiro COM_UNLOCK(sc);
427 1.1 ichiro splx(s);
428 1.1 ichiro
429 1.1 ichiro /*
430 1.1 ichiro * Update the tty layer's idea of the carrier bit.
431 1.1 ichiro * We tell tty the carrier is always on.
432 1.1 ichiro */
433 1.1 ichiro (void) (*tp->t_linesw->l_modem)(tp, 1);
434 1.1 ichiro
435 1.1 ichiro #ifdef COM_DEBUG
436 1.1 ichiro if (com_debug)
437 1.1 ichiro comstatus(sc, "comparam ");
438 1.1 ichiro #endif
439 1.1 ichiro
440 1.1 ichiro if (!ISSET(t->c_cflag, CHWFLOW)) {
441 1.1 ichiro if (sc->sc_tx_stopped) {
442 1.1 ichiro sc->sc_tx_stopped = 0;
443 1.1 ichiro ixp4xx_comstart(tp);
444 1.1 ichiro }
445 1.1 ichiro }
446 1.1 ichiro
447 1.1 ichiro return (0);
448 1.1 ichiro }
449 1.1 ichiro
450 1.1 ichiro void
451 1.1 ichiro ixp4xx_com_set_cr(struct ixp4xx_com_softc *sc)
452 1.1 ichiro {
453 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
454 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
455 1.1 ichiro
456 1.1 ichiro ixp4xx_com_iflush(sc);
457 1.1 ichiro
458 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_LCR, sc->sc_lcr | LCR_DLAB);
459 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DLL, sc->sc_dlbl);
460 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DLH, sc->sc_dlbh);
461 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_LCR, sc->sc_lcr);
462 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, sc->sc_mcr_active = sc->sc_mcr);
463 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_FCR, sc->sc_fcr);
464 1.3 ichiro bus_space_write_4(iot, ioh, IXP425_UART_IER, sc->sc_ier | IER_UUE);
465 1.1 ichiro }
466 1.1 ichiro
467 1.1 ichiro static int
468 1.1 ichiro ixp4xx_comhwiflow(struct tty *tp, int block)
469 1.1 ichiro {
470 1.1 ichiro return (0);
471 1.1 ichiro }
472 1.1 ichiro
473 1.1 ichiro static void
474 1.1 ichiro ixp4xx_com_filltx(struct ixp4xx_com_softc *sc)
475 1.1 ichiro {
476 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
477 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
478 1.1 ichiro int n;
479 1.1 ichiro
480 1.1 ichiro n = 0;
481 1.1 ichiro while (bus_space_read_4(iot, ioh, IXP425_UART_LSR) & LSR_TDRQ) {
482 1.1 ichiro if (n >= sc->sc_tbc)
483 1.1 ichiro break;
484 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DATA,
485 1.1 ichiro 0xff & *(sc->sc_tba + n));
486 1.1 ichiro n++;
487 1.1 ichiro }
488 1.1 ichiro sc->sc_tbc -= n;
489 1.1 ichiro }
490 1.1 ichiro
491 1.1 ichiro static void
492 1.1 ichiro ixp4xx_comstart(struct tty *tp)
493 1.1 ichiro {
494 1.1 ichiro struct ixp4xx_com_softc *sc
495 1.1 ichiro = device_lookup(&ixpcom_cd, COMUNIT(tp->t_dev));
496 1.1 ichiro int s;
497 1.1 ichiro
498 1.1 ichiro if (COM_ISALIVE(sc) == 0)
499 1.1 ichiro return;
500 1.1 ichiro
501 1.1 ichiro s = spltty();
502 1.1 ichiro if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
503 1.1 ichiro goto out;
504 1.1 ichiro if (sc->sc_tx_stopped)
505 1.1 ichiro goto out;
506 1.1 ichiro
507 1.1 ichiro if (tp->t_outq.c_cc <= tp->t_lowat) {
508 1.1 ichiro if (ISSET(tp->t_state, TS_ASLEEP)) {
509 1.1 ichiro CLR(tp->t_state, TS_ASLEEP);
510 1.1 ichiro wakeup(&tp->t_outq);
511 1.1 ichiro }
512 1.1 ichiro selwakeup(&tp->t_wsel);
513 1.1 ichiro if (tp->t_outq.c_cc == 0)
514 1.1 ichiro goto out;
515 1.1 ichiro }
516 1.1 ichiro
517 1.1 ichiro /* Grab the first contiguous region of buffer space. */
518 1.1 ichiro {
519 1.1 ichiro u_char *tba;
520 1.1 ichiro int tbc;
521 1.1 ichiro
522 1.1 ichiro tba = tp->t_outq.c_cf;
523 1.1 ichiro tbc = ndqb(&tp->t_outq, 0);
524 1.1 ichiro
525 1.1 ichiro (void)splserial();
526 1.1 ichiro COM_LOCK(sc);
527 1.1 ichiro
528 1.1 ichiro sc->sc_tba = tba;
529 1.1 ichiro sc->sc_tbc = tbc;
530 1.1 ichiro }
531 1.1 ichiro
532 1.1 ichiro SET(tp->t_state, TS_BUSY);
533 1.1 ichiro sc->sc_tx_busy = 1;
534 1.1 ichiro
535 1.1 ichiro /* Enable transmit completion interrupts if necessary. */
536 1.1 ichiro if (!ISSET(sc->sc_ier, IER_TIE)) {
537 1.1 ichiro SET(sc->sc_ier, IER_TIE);
538 1.3 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER,
539 1.3 ichiro sc->sc_ier | IER_UUE);
540 1.1 ichiro }
541 1.1 ichiro
542 1.1 ichiro /* Output the first chunk of the contiguous buffer. */
543 1.1 ichiro ixp4xx_com_filltx(sc);
544 1.1 ichiro
545 1.1 ichiro COM_UNLOCK(sc);
546 1.1 ichiro out:
547 1.1 ichiro splx(s);
548 1.1 ichiro return;
549 1.1 ichiro }
550 1.1 ichiro
551 1.1 ichiro static void
552 1.1 ichiro ixp4xx_com_break(struct ixp4xx_com_softc *sc, int onoff)
553 1.1 ichiro {
554 1.1 ichiro if (onoff)
555 1.1 ichiro SET(sc->sc_lcr, LCR_SBREAK);
556 1.1 ichiro else
557 1.1 ichiro CLR(sc->sc_lcr, LCR_SBREAK);
558 1.1 ichiro
559 1.1 ichiro if (!sc->sc_heldchange) {
560 1.1 ichiro if (sc->sc_tx_busy) {
561 1.1 ichiro sc->sc_heldtbc = sc->sc_tbc;
562 1.1 ichiro sc->sc_tbc = 0;
563 1.1 ichiro sc->sc_heldchange = 1;
564 1.1 ichiro } else
565 1.3 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_LCR,
566 1.3 ichiro sc->sc_lcr);
567 1.1 ichiro }
568 1.1 ichiro }
569 1.1 ichiro
570 1.1 ichiro static void
571 1.1 ichiro ixp4xx_com_shutdown(struct ixp4xx_com_softc *sc)
572 1.1 ichiro {
573 1.1 ichiro struct tty *tp = sc->sc_tty;
574 1.1 ichiro int s;
575 1.1 ichiro
576 1.1 ichiro s = splserial();
577 1.1 ichiro COM_LOCK(sc);
578 1.1 ichiro
579 1.1 ichiro /* Clear any break condition set with TIOCSBRK. */
580 1.1 ichiro ixp4xx_com_break(sc, 0);
581 1.1 ichiro
582 1.1 ichiro /*
583 1.1 ichiro * Hang up if necessary. Wait a bit, so the other side has time to
584 1.1 ichiro * notice even if we immediately open the port again.
585 1.1 ichiro * Avoid tsleeping above splhigh().
586 1.1 ichiro */
587 1.1 ichiro if (ISSET(tp->t_cflag, HUPCL)) {
588 1.1 ichiro ixp4xx_com_modem(sc, 0);
589 1.1 ichiro COM_UNLOCK(sc);
590 1.1 ichiro splx(s);
591 1.1 ichiro /* XXX tsleep will only timeout */
592 1.1 ichiro (void) tsleep(sc, TTIPRI, ttclos, hz);
593 1.1 ichiro s = splserial();
594 1.1 ichiro COM_LOCK(sc);
595 1.1 ichiro }
596 1.1 ichiro
597 1.1 ichiro /* Turn off interrupts. */
598 1.1 ichiro sc->sc_ier &= ~(IER_RAVIE | IER_TIE);
599 1.3 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER,
600 1.3 ichiro sc->sc_ier | IER_UUE);
601 1.1 ichiro
602 1.1 ichiro if (sc->disable) {
603 1.1 ichiro #ifdef DIAGNOSTIC
604 1.1 ichiro if (!sc->enabled)
605 1.1 ichiro panic("ixpcom_shutdown: not enabled?");
606 1.1 ichiro #endif
607 1.1 ichiro (*sc->disable)(sc);
608 1.1 ichiro sc->enabled = 0;
609 1.1 ichiro }
610 1.1 ichiro COM_UNLOCK(sc);
611 1.1 ichiro splx(s);
612 1.1 ichiro }
613 1.1 ichiro
614 1.1 ichiro int
615 1.1 ichiro ixp4xx_comopen(dev, flag, mode, p)
616 1.1 ichiro dev_t dev;
617 1.1 ichiro int flag, mode;
618 1.1 ichiro struct proc *p;
619 1.1 ichiro {
620 1.1 ichiro struct ixp4xx_com_softc *sc;
621 1.1 ichiro struct tty *tp;
622 1.1 ichiro int s, s2;
623 1.1 ichiro int error;
624 1.1 ichiro
625 1.1 ichiro sc = device_lookup(&ixpcom_cd, COMUNIT(dev));
626 1.1 ichiro if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) ||
627 1.1 ichiro sc->sc_rbuf == NULL)
628 1.1 ichiro return (ENXIO);
629 1.1 ichiro
630 1.1 ichiro if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
631 1.1 ichiro return (ENXIO);
632 1.1 ichiro
633 1.1 ichiro #ifdef KGDB
634 1.1 ichiro /*
635 1.1 ichiro * If this is the kgdb port, no other use is permitted.
636 1.1 ichiro */
637 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
638 1.1 ichiro return (EBUSY);
639 1.1 ichiro #endif
640 1.1 ichiro
641 1.1 ichiro tp = sc->sc_tty;
642 1.1 ichiro
643 1.1 ichiro if (ISSET(tp->t_state, TS_ISOPEN) &&
644 1.1 ichiro ISSET(tp->t_state, TS_XCLUDE) &&
645 1.1 ichiro p->p_ucred->cr_uid != 0)
646 1.1 ichiro return (EBUSY);
647 1.1 ichiro
648 1.1 ichiro s = spltty();
649 1.1 ichiro
650 1.1 ichiro /*
651 1.1 ichiro * Do the following iff this is a first open.
652 1.1 ichiro */
653 1.1 ichiro if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
654 1.1 ichiro struct termios t;
655 1.1 ichiro
656 1.1 ichiro tp->t_dev = dev;
657 1.1 ichiro
658 1.1 ichiro s2 = splserial();
659 1.1 ichiro COM_LOCK(sc);
660 1.1 ichiro
661 1.1 ichiro if (sc->enable) {
662 1.1 ichiro if ((*sc->enable)(sc)) {
663 1.1 ichiro COM_UNLOCK(sc);
664 1.1 ichiro splx(s2);
665 1.1 ichiro splx(s);
666 1.1 ichiro printf("%s: device enable failed\n",
667 1.1 ichiro sc->sc_dev.dv_xname);
668 1.1 ichiro return (EIO);
669 1.1 ichiro }
670 1.1 ichiro sc->enabled = 1;
671 1.1 ichiro }
672 1.1 ichiro /* Turn on interrupts. */
673 1.4 ichiro #if 0
674 1.4 ichiro sc->sc_mcr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_MCR);
675 1.4 ichiro SET(sc->sc_mcr, MCR_IENABLE);
676 1.4 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_MCR, sc->sc_mcr);
677 1.4 ichiro #endif
678 1.4 ichiro SET(sc->sc_ier, IER_RAVIE | IER_RLSE | IER_RIE | IER_TIE);
679 1.4 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER, sc->sc_ier);
680 1.3 ichiro #if 0
681 1.1 ichiro /* Fetch the current modem control status, needed later. */
682 1.4 ichiro sc->sc_msr = bus_space_read_4(iot, ioh, IXP425_UART_MSR);
683 1.3 ichiro #endif
684 1.1 ichiro COM_UNLOCK(sc);
685 1.1 ichiro splx(s2);
686 1.1 ichiro
687 1.1 ichiro /*
688 1.1 ichiro * Initialize the termios status to the defaults. Add in the
689 1.1 ichiro * sticky bits from TIOCSFLAGS.
690 1.1 ichiro */
691 1.1 ichiro t.c_ispeed = 0;
692 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
693 1.1 ichiro t.c_ospeed = ixp4xx_comcn_sc.sc_ospeed;
694 1.1 ichiro t.c_cflag = ixp4xx_comcn_sc.sc_cflag;
695 1.1 ichiro } else {
696 1.1 ichiro t.c_ospeed = TTYDEF_SPEED;
697 1.1 ichiro t.c_cflag = TTYDEF_CFLAG;
698 1.1 ichiro }
699 1.1 ichiro if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
700 1.1 ichiro SET(t.c_cflag, CLOCAL);
701 1.1 ichiro if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
702 1.1 ichiro SET(t.c_cflag, CRTSCTS);
703 1.1 ichiro if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
704 1.1 ichiro SET(t.c_cflag, MDMBUF);
705 1.1 ichiro /* Make sure ixpcomparam() will do something. */
706 1.1 ichiro tp->t_ospeed = 0;
707 1.1 ichiro (void) ixp4xx_comparam(tp, &t);
708 1.1 ichiro tp->t_iflag = TTYDEF_IFLAG;
709 1.1 ichiro tp->t_oflag = TTYDEF_OFLAG;
710 1.1 ichiro tp->t_lflag = TTYDEF_LFLAG;
711 1.1 ichiro ttychars(tp);
712 1.1 ichiro ttsetwater(tp);
713 1.1 ichiro
714 1.1 ichiro s2 = splserial();
715 1.1 ichiro COM_LOCK(sc);
716 1.1 ichiro
717 1.1 ichiro /*
718 1.1 ichiro * Turn on DTR. We must always do this, even if carrier is not
719 1.1 ichiro * present, because otherwise we'd have to use TIOCSDTR
720 1.1 ichiro * immediately after setting CLOCAL, which applications do not
721 1.1 ichiro * expect. We always assert DTR while the device is open
722 1.1 ichiro * unless explicitly requested to deassert it.
723 1.1 ichiro */
724 1.1 ichiro ixp4xx_com_modem(sc, 1);
725 1.1 ichiro /* Clear the input ring, and unblock. */
726 1.1 ichiro sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
727 1.1 ichiro sc->sc_rbavail = IXPCOM_RING_SIZE;
728 1.1 ichiro ixp4xx_com_iflush(sc);
729 1.1 ichiro CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
730 1.1 ichiro
731 1.1 ichiro #ifdef COM_DEBUG
732 1.1 ichiro if (com_debug)
733 1.1 ichiro comstatus(sc, "ixp4xx_comopen ");
734 1.1 ichiro #endif
735 1.1 ichiro
736 1.1 ichiro COM_UNLOCK(sc);
737 1.1 ichiro splx(s2);
738 1.1 ichiro }
739 1.1 ichiro splx(s);
740 1.1 ichiro
741 1.1 ichiro error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
742 1.1 ichiro if (error)
743 1.1 ichiro goto bad;
744 1.1 ichiro
745 1.1 ichiro error = (*tp->t_linesw->l_open)(dev, tp);
746 1.1 ichiro if (error)
747 1.1 ichiro goto bad;
748 1.1 ichiro
749 1.1 ichiro return (0);
750 1.1 ichiro
751 1.1 ichiro bad:
752 1.1 ichiro if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
753 1.1 ichiro /*
754 1.1 ichiro * We failed to open the device, and nobody else had it opened.
755 1.1 ichiro * Clean up the state as appropriate.
756 1.1 ichiro */
757 1.1 ichiro ixp4xx_com_shutdown(sc);
758 1.1 ichiro }
759 1.1 ichiro return (error);
760 1.1 ichiro }
761 1.1 ichiro
762 1.1 ichiro int
763 1.1 ichiro ixp4xx_comclose(dev, flag, mode, p)
764 1.1 ichiro dev_t dev;
765 1.1 ichiro int flag, mode;
766 1.1 ichiro struct proc *p;
767 1.1 ichiro {
768 1.1 ichiro struct ixp4xx_com_softc *sc =
769 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
770 1.1 ichiro struct tty *tp = sc->sc_tty;
771 1.1 ichiro
772 1.1 ichiro /* XXX This is for cons.c. */
773 1.1 ichiro if (!ISSET(tp->t_state, TS_ISOPEN))
774 1.1 ichiro return (0);
775 1.1 ichiro
776 1.1 ichiro (*tp->t_linesw->l_close)(tp, flag);
777 1.1 ichiro ttyclose(tp);
778 1.1 ichiro
779 1.1 ichiro if (COM_ISALIVE(sc) == 0)
780 1.1 ichiro return (0);
781 1.1 ichiro
782 1.1 ichiro if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
783 1.1 ichiro /*
784 1.1 ichiro * Although we got a last close, the device may still be in
785 1.1 ichiro * use; e.g. if this was the dialout node, and there are still
786 1.1 ichiro * processes waiting for carrier on the non-dialout node.
787 1.1 ichiro */
788 1.1 ichiro ixp4xx_com_shutdown(sc);
789 1.1 ichiro }
790 1.1 ichiro
791 1.1 ichiro return (0);
792 1.1 ichiro }
793 1.1 ichiro
794 1.1 ichiro int
795 1.1 ichiro ixp4xx_comread(dev, uio, flag)
796 1.1 ichiro dev_t dev;
797 1.1 ichiro struct uio *uio;
798 1.1 ichiro int flag;
799 1.1 ichiro {
800 1.1 ichiro struct ixp4xx_com_softc *sc =
801 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
802 1.1 ichiro struct tty *tp = sc->sc_tty;
803 1.1 ichiro
804 1.1 ichiro if (COM_ISALIVE(sc) == 0)
805 1.1 ichiro return (EIO);
806 1.1 ichiro
807 1.1 ichiro return ((*tp->t_linesw->l_read)(tp, uio, flag));
808 1.1 ichiro }
809 1.1 ichiro
810 1.1 ichiro int
811 1.1 ichiro ixp4xx_comwrite(dev, uio, flag)
812 1.1 ichiro dev_t dev;
813 1.1 ichiro struct uio *uio;
814 1.1 ichiro int flag;
815 1.1 ichiro {
816 1.1 ichiro struct ixp4xx_com_softc *sc =
817 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
818 1.1 ichiro struct tty *tp = sc->sc_tty;
819 1.1 ichiro
820 1.1 ichiro if (COM_ISALIVE(sc) == 0)
821 1.1 ichiro return (EIO);
822 1.1 ichiro
823 1.1 ichiro return ((*tp->t_linesw->l_write)(tp, uio, flag));
824 1.1 ichiro }
825 1.1 ichiro
826 1.1 ichiro int
827 1.1 ichiro ixp4xx_compoll(dev, events, p)
828 1.1 ichiro dev_t dev;
829 1.1 ichiro int events;
830 1.1 ichiro struct proc *p;
831 1.1 ichiro {
832 1.1 ichiro struct ixp4xx_com_softc *sc =
833 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
834 1.1 ichiro struct tty *tp = sc->sc_tty;
835 1.1 ichiro
836 1.1 ichiro if (COM_ISALIVE(sc) == 0)
837 1.1 ichiro return (EIO);
838 1.1 ichiro
839 1.1 ichiro return ((*tp->t_linesw->l_poll)(tp, events, p));
840 1.1 ichiro }
841 1.1 ichiro
842 1.1 ichiro struct tty *
843 1.1 ichiro ixp4xx_comtty(dev_t dev)
844 1.1 ichiro {
845 1.1 ichiro struct ixp4xx_com_softc *sc =
846 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
847 1.1 ichiro struct tty *tp = sc->sc_tty;
848 1.1 ichiro
849 1.1 ichiro return (tp);
850 1.1 ichiro }
851 1.1 ichiro
852 1.1 ichiro int
853 1.1 ichiro ixp4xx_comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
854 1.1 ichiro {
855 1.1 ichiro struct ixp4xx_com_softc *sc =
856 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
857 1.1 ichiro struct tty *tp = sc->sc_tty;
858 1.1 ichiro int error;
859 1.1 ichiro int s;
860 1.1 ichiro
861 1.1 ichiro if (COM_ISALIVE(sc) == 0)
862 1.1 ichiro return (EIO);
863 1.1 ichiro
864 1.1 ichiro error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
865 1.1 ichiro if (error != EPASSTHROUGH)
866 1.1 ichiro return (error);
867 1.1 ichiro
868 1.1 ichiro error = ttioctl(tp, cmd, data, flag, p);
869 1.1 ichiro if (error != EPASSTHROUGH)
870 1.1 ichiro return (error);
871 1.1 ichiro
872 1.1 ichiro error = 0;
873 1.1 ichiro
874 1.1 ichiro s = splserial();
875 1.1 ichiro COM_LOCK(sc);
876 1.1 ichiro
877 1.1 ichiro switch (cmd) {
878 1.1 ichiro case TIOCSBRK:
879 1.1 ichiro ixp4xx_com_break(sc, 1);
880 1.1 ichiro break;
881 1.1 ichiro
882 1.1 ichiro case TIOCCBRK:
883 1.1 ichiro ixp4xx_com_break(sc, 0);
884 1.1 ichiro break;
885 1.1 ichiro
886 1.1 ichiro case TIOCSDTR:
887 1.1 ichiro ixp4xx_com_modem(sc, 1);
888 1.1 ichiro break;
889 1.1 ichiro
890 1.1 ichiro case TIOCCDTR:
891 1.1 ichiro ixp4xx_com_modem(sc, 0);
892 1.1 ichiro break;
893 1.1 ichiro
894 1.1 ichiro case TIOCGFLAGS:
895 1.1 ichiro *(int *)data = sc->sc_swflags;
896 1.1 ichiro break;
897 1.1 ichiro
898 1.1 ichiro case TIOCSFLAGS:
899 1.1 ichiro error = suser(p->p_ucred, &p->p_acflag);
900 1.1 ichiro if (error)
901 1.1 ichiro break;
902 1.1 ichiro sc->sc_swflags = *(int *)data;
903 1.1 ichiro break;
904 1.1 ichiro
905 1.1 ichiro case TIOCMSET:
906 1.1 ichiro case TIOCMBIS:
907 1.1 ichiro case TIOCMBIC:
908 1.1 ichiro tiocm_to_ixp4xx_com(sc, cmd, *(int *)data);
909 1.1 ichiro break;
910 1.1 ichiro
911 1.1 ichiro case TIOCMGET:
912 1.1 ichiro *(int *)data = ixp4xx_com_to_tiocm(sc);
913 1.1 ichiro break;
914 1.1 ichiro
915 1.1 ichiro default:
916 1.1 ichiro error = EPASSTHROUGH;
917 1.1 ichiro break;
918 1.1 ichiro }
919 1.1 ichiro
920 1.1 ichiro COM_UNLOCK(sc);
921 1.1 ichiro splx(s);
922 1.1 ichiro
923 1.1 ichiro #ifdef COM_DEBUG
924 1.1 ichiro if (com_debug)
925 1.1 ichiro comstatus(sc, "comioctl ");
926 1.1 ichiro #endif
927 1.1 ichiro
928 1.1 ichiro return (error);
929 1.1 ichiro }
930 1.1 ichiro
931 1.1 ichiro void
932 1.1 ichiro ixp4xx_comstop(struct tty *tp, int flag)
933 1.1 ichiro {
934 1.1 ichiro struct ixp4xx_com_softc *sc =
935 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(tp->t_dev));
936 1.1 ichiro int s;
937 1.1 ichiro
938 1.1 ichiro s = splserial();
939 1.1 ichiro COM_LOCK(sc);
940 1.1 ichiro if (ISSET(tp->t_state, TS_BUSY)) {
941 1.1 ichiro /* Stop transmitting at the next chunk. */
942 1.1 ichiro sc->sc_tbc = 0;
943 1.1 ichiro sc->sc_heldtbc = 0;
944 1.1 ichiro if (!ISSET(tp->t_state, TS_TTSTOP))
945 1.1 ichiro SET(tp->t_state, TS_FLUSH);
946 1.1 ichiro }
947 1.1 ichiro COM_UNLOCK(sc);
948 1.1 ichiro splx(s);
949 1.1 ichiro }
950 1.1 ichiro
951 1.1 ichiro static void
952 1.1 ichiro ixp4xx_com_modem(struct ixp4xx_com_softc *sc, int onoff)
953 1.1 ichiro {
954 1.4 ichiro bus_space_tag_t iot = sc->sc_iot;
955 1.4 ichiro bus_space_handle_t ioh = sc->sc_ioh;
956 1.1 ichiro
957 1.1 ichiro if (sc->sc_mcr_dtr == 0)
958 1.1 ichiro return;
959 1.1 ichiro
960 1.1 ichiro if (onoff)
961 1.1 ichiro SET(sc->sc_mcr, sc->sc_mcr_dtr);
962 1.1 ichiro else
963 1.1 ichiro CLR(sc->sc_mcr, sc->sc_mcr_dtr);
964 1.1 ichiro
965 1.1 ichiro if (!sc->sc_heldchange) {
966 1.1 ichiro if (sc->sc_tx_busy) {
967 1.1 ichiro sc->sc_heldtbc = sc->sc_tbc;
968 1.1 ichiro sc->sc_tbc = 0;
969 1.1 ichiro sc->sc_heldchange = 1;
970 1.1 ichiro } else
971 1.4 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, sc->sc_mcr);
972 1.1 ichiro }
973 1.1 ichiro }
974 1.1 ichiro
975 1.1 ichiro static void
976 1.1 ichiro tiocm_to_ixp4xx_com(struct ixp4xx_com_softc *sc, u_long how, int ttybits)
977 1.1 ichiro {
978 1.4 ichiro bus_space_tag_t iot = sc->sc_iot;
979 1.4 ichiro bus_space_handle_t ioh = sc->sc_ioh;
980 1.1 ichiro u_char combits;
981 1.1 ichiro
982 1.1 ichiro combits = 0;
983 1.1 ichiro if (ISSET(ttybits, TIOCM_DTR))
984 1.1 ichiro SET(combits, MCR_DTR);
985 1.1 ichiro if (ISSET(ttybits, TIOCM_RTS))
986 1.1 ichiro SET(combits, MCR_RTS);
987 1.1 ichiro
988 1.1 ichiro switch (how) {
989 1.1 ichiro case TIOCMBIC:
990 1.1 ichiro CLR(sc->sc_mcr, combits);
991 1.1 ichiro break;
992 1.1 ichiro
993 1.1 ichiro case TIOCMBIS:
994 1.1 ichiro SET(sc->sc_mcr, combits);
995 1.1 ichiro break;
996 1.1 ichiro
997 1.1 ichiro case TIOCMSET:
998 1.1 ichiro CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
999 1.1 ichiro SET(sc->sc_mcr, combits);
1000 1.1 ichiro break;
1001 1.1 ichiro }
1002 1.1 ichiro
1003 1.1 ichiro if (!sc->sc_heldchange) {
1004 1.1 ichiro if (sc->sc_tx_busy) {
1005 1.1 ichiro sc->sc_heldtbc = sc->sc_tbc;
1006 1.1 ichiro sc->sc_tbc = 0;
1007 1.1 ichiro sc->sc_heldchange = 1;
1008 1.1 ichiro } else
1009 1.4 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, sc->sc_mcr);
1010 1.1 ichiro }
1011 1.1 ichiro }
1012 1.1 ichiro
1013 1.1 ichiro static int
1014 1.1 ichiro ixp4xx_com_to_tiocm(struct ixp4xx_com_softc *sc)
1015 1.1 ichiro {
1016 1.1 ichiro u_char combits;
1017 1.1 ichiro int ttybits = 0;
1018 1.1 ichiro
1019 1.1 ichiro combits = sc->sc_mcr;
1020 1.1 ichiro if (ISSET(combits, MCR_DTR))
1021 1.1 ichiro SET(ttybits, TIOCM_DTR);
1022 1.1 ichiro if (ISSET(combits, MCR_RTS))
1023 1.1 ichiro SET(ttybits, TIOCM_RTS);
1024 1.1 ichiro
1025 1.1 ichiro combits = sc->sc_msr;
1026 1.1 ichiro if (ISSET(combits, MSR_DCD))
1027 1.1 ichiro SET(ttybits, TIOCM_CD);
1028 1.1 ichiro if (ISSET(combits, MSR_CTS))
1029 1.1 ichiro SET(ttybits, TIOCM_CTS);
1030 1.1 ichiro if (ISSET(combits, MSR_DSR))
1031 1.1 ichiro SET(ttybits, TIOCM_DSR);
1032 1.1 ichiro if (ISSET(combits, MSR_RI | MSR_TERI))
1033 1.1 ichiro SET(ttybits, TIOCM_RI);
1034 1.1 ichiro
1035 1.1 ichiro if ((sc->sc_ier & IER_UUE) != 0)
1036 1.1 ichiro SET(ttybits, TIOCM_LE);
1037 1.1 ichiro
1038 1.1 ichiro return (ttybits);
1039 1.1 ichiro }
1040 1.1 ichiro
1041 1.1 ichiro static u_int
1042 1.1 ichiro cflag2lcr(tcflag_t cflag)
1043 1.1 ichiro {
1044 1.1 ichiro u_char lcr = 0;
1045 1.1 ichiro
1046 1.1 ichiro switch (ISSET(cflag, CSIZE)) {
1047 1.1 ichiro case CS5:
1048 1.1 ichiro SET(lcr, LCR_5BITS);
1049 1.1 ichiro break;
1050 1.1 ichiro case CS6:
1051 1.1 ichiro SET(lcr, LCR_6BITS);
1052 1.1 ichiro break;
1053 1.1 ichiro case CS7:
1054 1.1 ichiro SET(lcr, LCR_7BITS);
1055 1.1 ichiro break;
1056 1.1 ichiro case CS8:
1057 1.1 ichiro SET(lcr, LCR_8BITS);
1058 1.1 ichiro break;
1059 1.1 ichiro }
1060 1.1 ichiro if (ISSET(cflag, PARENB)) {
1061 1.1 ichiro SET(lcr, LCR_PENE);
1062 1.1 ichiro if (!ISSET(cflag, PARODD))
1063 1.1 ichiro SET(lcr, LCR_PODD);
1064 1.1 ichiro }
1065 1.1 ichiro if (ISSET(cflag, CSTOPB))
1066 1.1 ichiro SET(lcr, LCR_1STOP);
1067 1.1 ichiro
1068 1.1 ichiro return (lcr);
1069 1.1 ichiro }
1070 1.1 ichiro
1071 1.1 ichiro static void
1072 1.1 ichiro ixp4xx_com_iflush(struct ixp4xx_com_softc *sc)
1073 1.1 ichiro {
1074 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
1075 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
1076 1.1 ichiro #ifdef DIAGNOSTIC
1077 1.1 ichiro int reg;
1078 1.1 ichiro #endif
1079 1.1 ichiro int timo;
1080 1.1 ichiro
1081 1.1 ichiro #ifdef DIAGNOSTIC
1082 1.1 ichiro reg = 0xffff;
1083 1.1 ichiro #endif
1084 1.1 ichiro timo = 50000;
1085 1.1 ichiro /* flush any pending I/O */
1086 1.1 ichiro while (ISSET(bus_space_read_4(iot, ioh, IXP425_UART_LSR), LSR_DR)
1087 1.1 ichiro && --timo)
1088 1.1 ichiro #ifdef DIAGNOSTIC
1089 1.1 ichiro reg =
1090 1.1 ichiro #else
1091 1.1 ichiro (void)
1092 1.1 ichiro #endif
1093 1.1 ichiro bus_space_read_4(iot, ioh, IXP425_UART_DATA);
1094 1.1 ichiro #ifdef DIAGNOSTIC
1095 1.1 ichiro if (!timo)
1096 1.1 ichiro printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname,
1097 1.1 ichiro reg);
1098 1.1 ichiro #endif
1099 1.1 ichiro }
1100 1.1 ichiro
1101 1.1 ichiro static void
1102 1.1 ichiro ixp4xxcomsoft(void* arg)
1103 1.1 ichiro {
1104 1.1 ichiro struct ixp4xx_com_softc *sc = arg;
1105 1.1 ichiro
1106 1.1 ichiro if (COM_ISALIVE(sc) == 0)
1107 1.1 ichiro return;
1108 1.1 ichiro
1109 1.1 ichiro if (sc->sc_rx_ready) {
1110 1.1 ichiro sc->sc_rx_ready = 0;
1111 1.1 ichiro ixp4xx_com_rxsoft(sc, sc->sc_tty);
1112 1.1 ichiro }
1113 1.1 ichiro if (sc->sc_tx_done) {
1114 1.1 ichiro sc->sc_tx_done = 0;
1115 1.1 ichiro ixp4xx_com_txsoft(sc, sc->sc_tty);
1116 1.1 ichiro }
1117 1.1 ichiro }
1118 1.1 ichiro
1119 1.1 ichiro inline static void
1120 1.1 ichiro ixp4xx_com_txsoft(struct ixp4xx_com_softc *sc, struct tty *tp)
1121 1.1 ichiro {
1122 1.1 ichiro CLR(tp->t_state, TS_BUSY);
1123 1.1 ichiro if (ISSET(tp->t_state, TS_FLUSH))
1124 1.1 ichiro CLR(tp->t_state, TS_FLUSH);
1125 1.1 ichiro else
1126 1.1 ichiro ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1127 1.1 ichiro (*tp->t_linesw->l_start)(tp);
1128 1.1 ichiro }
1129 1.1 ichiro
1130 1.1 ichiro inline static void
1131 1.1 ichiro ixp4xx_com_rxsoft(struct ixp4xx_com_softc *sc, struct tty *tp)
1132 1.1 ichiro {
1133 1.1 ichiro int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint;
1134 1.1 ichiro u_char *get, *end;
1135 1.1 ichiro u_int cc, scc;
1136 1.1 ichiro u_char lsr;
1137 1.1 ichiro int code;
1138 1.1 ichiro int s;
1139 1.1 ichiro
1140 1.1 ichiro end = sc->sc_ebuf;
1141 1.1 ichiro get = sc->sc_rbget;
1142 1.1 ichiro scc = cc = IXPCOM_RING_SIZE - sc->sc_rbavail;
1143 1.1 ichiro while (cc) {
1144 1.1 ichiro code = get[0];
1145 1.1 ichiro lsr = get[1];
1146 1.1 ichiro if (ISSET(lsr, LSR_OE | LSR_FE | LSR_PE)) {
1147 1.1 ichiro if (ISSET(lsr, LSR_FE))
1148 1.1 ichiro SET(code, TTY_FE);
1149 1.1 ichiro if (ISSET(lsr, LSR_PE))
1150 1.1 ichiro SET(code, TTY_PE);
1151 1.1 ichiro }
1152 1.1 ichiro if ((*rint)(code, tp) == -1) {
1153 1.1 ichiro /*
1154 1.1 ichiro * The line discipline's buffer is out of space.
1155 1.1 ichiro */
1156 1.1 ichiro if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1157 1.1 ichiro /*
1158 1.1 ichiro * We're either not using flow control, or the
1159 1.1 ichiro * line discipline didn't tell us to block for
1160 1.1 ichiro * some reason. Either way, we have no way to
1161 1.1 ichiro * know when there's more space available, so
1162 1.1 ichiro * just drop the rest of the data.
1163 1.1 ichiro */
1164 1.1 ichiro get += cc << 1;
1165 1.1 ichiro if (get >= end)
1166 1.1 ichiro get -= IXPCOM_RING_SIZE << 1;
1167 1.1 ichiro cc = 0;
1168 1.1 ichiro } else {
1169 1.1 ichiro /*
1170 1.1 ichiro * Don't schedule any more receive processing
1171 1.1 ichiro * until the line discipline tells us there's
1172 1.1 ichiro * space available (through comhwiflow()).
1173 1.1 ichiro * Leave the rest of the data in the input
1174 1.1 ichiro * buffer.
1175 1.1 ichiro */
1176 1.1 ichiro SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1177 1.1 ichiro }
1178 1.1 ichiro break;
1179 1.1 ichiro }
1180 1.1 ichiro get += 2;
1181 1.1 ichiro if (get >= end)
1182 1.1 ichiro get = sc->sc_rbuf;
1183 1.1 ichiro cc--;
1184 1.1 ichiro }
1185 1.1 ichiro
1186 1.1 ichiro if (cc != scc) {
1187 1.1 ichiro sc->sc_rbget = get;
1188 1.1 ichiro s = splserial();
1189 1.1 ichiro COM_LOCK(sc);
1190 1.1 ichiro
1191 1.1 ichiro cc = sc->sc_rbavail += scc - cc;
1192 1.1 ichiro /* Buffers should be ok again, release possible block. */
1193 1.1 ichiro if (cc >= 1) {
1194 1.1 ichiro if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1195 1.1 ichiro CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1196 1.1 ichiro SET(sc->sc_ier,IER_RAVIE);
1197 1.1 ichiro ixp4xx_com_set_cr(sc);
1198 1.1 ichiro }
1199 1.1 ichiro if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1200 1.1 ichiro CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1201 1.1 ichiro }
1202 1.1 ichiro }
1203 1.1 ichiro COM_UNLOCK(sc);
1204 1.1 ichiro splx(s);
1205 1.1 ichiro }
1206 1.1 ichiro }
1207 1.1 ichiro
1208 1.1 ichiro int
1209 1.1 ichiro ixp4xxcomintr(void* arg)
1210 1.1 ichiro {
1211 1.1 ichiro struct ixp4xx_com_softc *sc = arg;
1212 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
1213 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
1214 1.1 ichiro u_char *put, *end;
1215 1.1 ichiro u_int cc, res;
1216 1.1 ichiro u_int32_t c;
1217 1.4 ichiro
1218 1.1 ichiro if (COM_ISALIVE(sc) == 0)
1219 1.1 ichiro return (0);
1220 1.1 ichiro
1221 1.1 ichiro COM_LOCK(sc);
1222 1.1 ichiro res = bus_space_read_4(iot, ioh, IXP425_UART_IER) & IER_UUE;
1223 1.1 ichiro
1224 1.1 ichiro if (!res) {
1225 1.1 ichiro COM_UNLOCK(sc);
1226 1.1 ichiro return (0);
1227 1.1 ichiro }
1228 1.1 ichiro
1229 1.1 ichiro res = bus_space_read_4(iot, ioh, IXP425_UART_LSR);
1230 1.1 ichiro if (!ISSET(res, LSR_DR | LSR_TDRQ))
1231 1.1 ichiro return (0);
1232 1.1 ichiro
1233 1.1 ichiro end = sc->sc_ebuf;
1234 1.1 ichiro put = sc->sc_rbput;
1235 1.1 ichiro cc = sc->sc_rbavail;
1236 1.1 ichiro
1237 1.1 ichiro if (ISSET(res, LSR_DR)) {
1238 1.1 ichiro if (!ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1239 1.1 ichiro while (cc > 0) {
1240 1.1 ichiro if (!ISSET(res, LSR_DR))
1241 1.1 ichiro break;
1242 1.1 ichiro c = bus_space_read_4(iot, ioh, IXP425_UART_DATA);
1243 1.1 ichiro if (ISSET(res, LSR_FE)) {
1244 1.1 ichiro cn_check_magic(sc->sc_tty->t_dev,
1245 1.1 ichiro CNC_BREAK,
1246 1.1 ichiro ixp4xx_com_cnm_state);
1247 1.1 ichiro }
1248 1.1 ichiro put[0] = c & 0xff;
1249 1.1 ichiro put[1] = (c >> 8) & 0xff;
1250 1.1 ichiro cn_check_magic(sc->sc_tty->t_dev,
1251 1.1 ichiro put[0], ixp4xx_com_cnm_state);
1252 1.1 ichiro put += 2;
1253 1.1 ichiro if (put >= end)
1254 1.1 ichiro put = sc->sc_rbuf;
1255 1.1 ichiro cc--;
1256 1.1 ichiro res = bus_space_read_4(iot, ioh, IXP425_UART_LSR);
1257 1.1 ichiro }
1258 1.1 ichiro
1259 1.1 ichiro /*
1260 1.1 ichiro * Current string of incoming characters ended because
1261 1.1 ichiro * no more data was available or we ran out of space.
1262 1.1 ichiro * Schedule a receive event if any data was received.
1263 1.1 ichiro * If we're out of space, turn off receive interrupts.
1264 1.1 ichiro */
1265 1.1 ichiro sc->sc_rbput = put;
1266 1.1 ichiro sc->sc_rbavail = cc;
1267 1.1 ichiro if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1268 1.1 ichiro sc->sc_rx_ready = 1;
1269 1.1 ichiro
1270 1.1 ichiro /*
1271 1.1 ichiro * See if we are in danger of overflowing a buffer. If
1272 1.1 ichiro * so, use hardware flow control to ease the pressure.
1273 1.1 ichiro */
1274 1.1 ichiro /* later XXXX */
1275 1.1 ichiro
1276 1.1 ichiro /*
1277 1.1 ichiro * If we're out of space, disable receive interrupts
1278 1.1 ichiro * until the queue has drained a bit.
1279 1.1 ichiro */
1280 1.1 ichiro if (!cc) {
1281 1.1 ichiro SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1282 1.1 ichiro CLR(sc->sc_ier, IER_RAVIE);
1283 1.1 ichiro ixp4xx_com_set_cr(sc);
1284 1.1 ichiro }
1285 1.1 ichiro } else {
1286 1.1 ichiro #ifdef DIAGNOSTIC
1287 1.1 ichiro panic("ixpcomintr: we shouldn't reach here");
1288 1.1 ichiro #endif
1289 1.1 ichiro CLR(sc->sc_ier, IER_RAVIE);
1290 1.1 ichiro ixp4xx_com_set_cr(sc);
1291 1.1 ichiro }
1292 1.1 ichiro }
1293 1.1 ichiro
1294 1.1 ichiro /*
1295 1.1 ichiro * Done handling any receive interrupts. See if data can be
1296 1.1 ichiro * transmitted as well. Schedule tx done event if no data left
1297 1.1 ichiro * and tty was marked busy.
1298 1.1 ichiro */
1299 1.1 ichiro
1300 1.1 ichiro res = bus_space_read_4(iot, ioh, IXP425_UART_LSR);
1301 1.1 ichiro if (ISSET(res, LSR_TDRQ)) {
1302 1.1 ichiro /*
1303 1.1 ichiro * If we've delayed a parameter change, do it now, and restart
1304 1.1 ichiro * output.
1305 1.1 ichiro */
1306 1.1 ichiro if (sc->sc_heldchange) {
1307 1.1 ichiro ixp4xx_com_set_cr(sc);
1308 1.1 ichiro sc->sc_heldchange = 0;
1309 1.1 ichiro sc->sc_tbc = sc->sc_heldtbc;
1310 1.1 ichiro sc->sc_heldtbc = 0;
1311 1.1 ichiro }
1312 1.1 ichiro
1313 1.1 ichiro /* Output the next chunk of the contiguous buffer, if any. */
1314 1.1 ichiro if (sc->sc_tbc > 0) {
1315 1.1 ichiro ixp4xx_com_filltx(sc);
1316 1.1 ichiro } else {
1317 1.1 ichiro /* Disable transmit completion interrupts if necessary. */
1318 1.1 ichiro if (ISSET(sc->sc_ier, IER_TIE)) {
1319 1.1 ichiro CLR(sc->sc_ier, IER_TIE);
1320 1.1 ichiro ixp4xx_com_filltx(sc);
1321 1.1 ichiro }
1322 1.1 ichiro if (sc->sc_tx_busy) {
1323 1.1 ichiro sc->sc_tx_busy = 0;
1324 1.1 ichiro sc->sc_tx_done = 1;
1325 1.1 ichiro }
1326 1.1 ichiro }
1327 1.1 ichiro }
1328 1.1 ichiro COM_UNLOCK(sc);
1329 1.1 ichiro
1330 1.1 ichiro /* Wake up the poller. */
1331 1.1 ichiro softintr_schedule(sc->sc_si);
1332 1.1 ichiro
1333 1.1 ichiro #if NRND > 0 && defined(RND_COM)
1334 1.1 ichiro rnd_add_uint32(&sc->rnd_source, iir | lsr);
1335 1.1 ichiro #endif
1336 1.1 ichiro return (1);
1337 1.1 ichiro }
1338 1.1 ichiro
1339 1.1 ichiro /*
1340 1.1 ichiro * Initialize UART for use as console
1341 1.1 ichiro */
1342 1.1 ichiro int
1343 1.1 ichiro ixp4xx_cominit(bus_space_tag_t iot, bus_space_handle_t ioh, int rate,
1344 1.1 ichiro int frequency, tcflag_t cflag)
1345 1.1 ichiro {
1346 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_IER, IER_UUE);
1347 1.1 ichiro
1348 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_LCR, LCR_DLAB);
1349 1.1 ichiro rate = ixp4xx_comspeed(rate, frequency);
1350 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DLL, rate);
1351 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DLH, rate >> 8);
1352 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_LCR, cflag2lcr(cflag));
1353 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, MCR_DTR | MCR_RTS);
1354 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_FCR,
1355 1.1 ichiro FCR_ENABLE | FCR_RESETRF | FCR_RESETTF | FCR_TRIGGER_1);
1356 1.1 ichiro
1357 1.1 ichiro return (0);
1358 1.1 ichiro }
1359 1.1 ichiro
1360 1.1 ichiro
1361 1.1 ichiro /*
1362 1.1 ichiro * There are routines needed to act as console
1363 1.1 ichiro */
1364 1.1 ichiro
1365 1.1 ichiro struct consdev ixp4xx_comcons = {
1366 1.1 ichiro NULL, NULL, ixp4xx_comcngetc, ixp4xx_comcnputc, ixp4xx_comcnpollc,
1367 1.1 ichiro NULL, NULL, NULL, NODEV, CN_NORMAL
1368 1.1 ichiro };
1369 1.1 ichiro
1370 1.1 ichiro int
1371 1.1 ichiro ixp4xx_comcnattach(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t ioh,
1372 1.1 ichiro int rate, int frequency, tcflag_t cflag)
1373 1.1 ichiro {
1374 1.1 ichiro int res;
1375 1.1 ichiro
1376 1.1 ichiro res = ixp4xx_cominit(iot, ioh, rate, frequency, cflag);
1377 1.1 ichiro
1378 1.1 ichiro if (res)
1379 1.1 ichiro return (res);
1380 1.1 ichiro
1381 1.1 ichiro cn_tab = &ixp4xx_comcons;
1382 1.1 ichiro cn_init_magic(&ixp4xx_com_cnm_state);
1383 1.1 ichiro
1384 1.1 ichiro /* default magic is a couple of BREAK. */
1385 1.1 ichiro cn_set_magic("\047\001\047\001");
1386 1.1 ichiro
1387 1.1 ichiro ixp4xx_comcn_sc.sc_iot = iot;
1388 1.1 ichiro ixp4xx_comcn_sc.sc_ioh = ioh;
1389 1.1 ichiro ixp4xx_comcn_sc.sc_baseaddr = iobase;
1390 1.1 ichiro ixp4xx_comcn_sc.sc_ospeed = rate;
1391 1.1 ichiro ixp4xx_comcn_sc.sc_cflag = cflag;
1392 1.1 ichiro
1393 1.1 ichiro return (0);
1394 1.1 ichiro }
1395 1.1 ichiro
1396 1.1 ichiro void
1397 1.1 ichiro ixp4xx_comcnputc(dev, c)
1398 1.1 ichiro dev_t dev;
1399 1.1 ichiro int c;
1400 1.1 ichiro {
1401 1.1 ichiro bus_space_tag_t iot = ixp4xx_comcn_sc.sc_iot;
1402 1.1 ichiro bus_space_handle_t ioh = ixp4xx_comcn_sc.sc_ioh;
1403 1.3 ichiro int s;
1404 1.1 ichiro
1405 1.3 ichiro s = splserial();
1406 1.3 ichiro
1407 1.3 ichiro while(!(bus_space_read_4(iot, ioh, IXP425_UART_LSR) & LSR_TDRQ))
1408 1.1 ichiro ;
1409 1.1 ichiro
1410 1.3 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DATA, c);
1411 1.3 ichiro
1412 1.3 ichiro splx(s);
1413 1.1 ichiro }
1414 1.1 ichiro
1415 1.1 ichiro int
1416 1.1 ichiro ixp4xx_comcngetc(dev)
1417 1.1 ichiro dev_t dev;
1418 1.1 ichiro {
1419 1.3 ichiro int c,s;
1420 1.1 ichiro bus_space_tag_t iot = ixp4xx_comcn_sc.sc_iot;
1421 1.1 ichiro bus_space_handle_t ioh = ixp4xx_comcn_sc.sc_ioh;
1422 1.1 ichiro
1423 1.3 ichiro s = splserial();
1424 1.3 ichiro
1425 1.3 ichiro while(!(bus_space_read_4(iot, ioh, IXP425_UART_LSR) & LSR_DR))
1426 1.1 ichiro ;
1427 1.3 ichiro c = bus_space_read_4(iot, ioh, IXP425_UART_DATA);
1428 1.1 ichiro c &= 0xff;
1429 1.3 ichiro splx(s);
1430 1.1 ichiro
1431 1.1 ichiro return (c);
1432 1.1 ichiro }
1433 1.1 ichiro
1434 1.1 ichiro
1435 1.1 ichiro void
1436 1.1 ichiro ixp4xx_comcnprobe(cp)
1437 1.1 ichiro struct consdev *cp;
1438 1.1 ichiro {
1439 1.1 ichiro cp->cn_pri = CN_REMOTE;
1440 1.1 ichiro }
1441 1.1 ichiro
1442 1.1 ichiro void
1443 1.1 ichiro ixp4xx_comcnpollc(dev, on)
1444 1.1 ichiro dev_t dev;
1445 1.1 ichiro int on;
1446 1.1 ichiro {
1447 1.1 ichiro }
1448