ixp425_com.c revision 1.9 1 1.9 ichiro /* $NetBSD: ixp425_com.c,v 1.9 2003/06/29 10:51:31 ichiro Exp $ */
2 1.1 ichiro /*
3 1.1 ichiro * Copyright (c) 2003
4 1.1 ichiro * Ichiro FUKUHARA <ichiro (at) ichiro.org>.
5 1.1 ichiro * All rights reserved.
6 1.1 ichiro *
7 1.1 ichiro * Redistribution and use in source and binary forms, with or without
8 1.1 ichiro * modification, are permitted provided that the following conditions
9 1.1 ichiro * are met:
10 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
11 1.1 ichiro * notice, this list of conditions and the following disclaimer.
12 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
14 1.1 ichiro * documentation and/or other materials provided with the distribution.
15 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
16 1.1 ichiro * must display the following acknowledgement:
17 1.1 ichiro * This product includes software developed by Ichiro FUKUHARA.
18 1.1 ichiro * 4. The name of the company nor the name of the author may be used to
19 1.1 ichiro * endorse or promote products derived from this software without specific
20 1.1 ichiro * prior written permission.
21 1.1 ichiro *
22 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
23 1.1 ichiro * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 ichiro * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 ichiro * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
26 1.1 ichiro * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 ichiro * SUCH DAMAGE.
33 1.1 ichiro */
34 1.1 ichiro
35 1.1 ichiro /*
36 1.1 ichiro * Copyright (c) 1991 The Regents of the University of California.
37 1.1 ichiro * All rights reserved.
38 1.1 ichiro *
39 1.1 ichiro * Redistribution and use in source and binary forms, with or without
40 1.1 ichiro * modification, are permitted provided that the following conditions
41 1.1 ichiro * are met:
42 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
43 1.1 ichiro * notice, this list of conditions and the following disclaimer.
44 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
45 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
46 1.1 ichiro * documentation and/or other materials provided with the distribution.
47 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
48 1.1 ichiro * must display the following acknowledgement:
49 1.1 ichiro * This product includes software developed by the University of
50 1.1 ichiro * California, Berkeley and its contributors.
51 1.1 ichiro * 4. Neither the name of the University nor the names of its contributors
52 1.1 ichiro * may be used to endorse or promote products derived from this software
53 1.1 ichiro * without specific prior written permission.
54 1.1 ichiro *
55 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
56 1.1 ichiro * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
57 1.1 ichiro * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
58 1.1 ichiro * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
59 1.1 ichiro * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
60 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
61 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
62 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
63 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
64 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
65 1.1 ichiro * SUCH DAMAGE.
66 1.1 ichiro *
67 1.1 ichiro * @(#)com.c 7.5 (Berkeley) 5/16/91
68 1.1 ichiro */
69 1.1 ichiro
70 1.1 ichiro #include <sys/cdefs.h>
71 1.9 ichiro __KERNEL_RCSID(0, "$NetBSD: ixp425_com.c,v 1.9 2003/06/29 10:51:31 ichiro Exp $");
72 1.1 ichiro
73 1.1 ichiro #include "opt_ddb.h"
74 1.1 ichiro #include "opt_kgdb.h"
75 1.1 ichiro
76 1.1 ichiro #include "rnd.h"
77 1.1 ichiro #if NRND > 0 && defined(RND_COM)
78 1.1 ichiro #include <sys/rnd.h>
79 1.1 ichiro #endif
80 1.1 ichiro
81 1.1 ichiro #include <sys/param.h>
82 1.1 ichiro #include <sys/systm.h>
83 1.1 ichiro #include <sys/types.h>
84 1.1 ichiro #include <sys/conf.h>
85 1.1 ichiro #include <sys/file.h>
86 1.1 ichiro #include <sys/device.h>
87 1.1 ichiro #include <sys/kernel.h>
88 1.1 ichiro #include <sys/malloc.h>
89 1.1 ichiro #include <sys/tty.h>
90 1.1 ichiro #include <sys/uio.h>
91 1.1 ichiro #include <sys/vnode.h>
92 1.1 ichiro
93 1.1 ichiro #include <machine/intr.h>
94 1.1 ichiro #include <machine/bus.h>
95 1.1 ichiro
96 1.1 ichiro #include <arm/xscale/ixp425reg.h>
97 1.1 ichiro #include <arm/xscale/ixp425_comvar.h>
98 1.1 ichiro
99 1.1 ichiro #include <dev/cons.h>
100 1.1 ichiro
101 1.1 ichiro #include "ixpcom.h"
102 1.1 ichiro
103 1.1 ichiro static int ixp4xx_comparam(struct tty *, struct termios *);
104 1.1 ichiro static void ixp4xx_comstart(struct tty *);
105 1.1 ichiro static int ixp4xx_comhwiflow(struct tty *, int);
106 1.1 ichiro
107 1.1 ichiro static u_int cflag2lcr(tcflag_t);
108 1.1 ichiro static void ixp4xx_com_modem(struct ixp4xx_com_softc *, int);
109 1.1 ichiro static void ixp4xx_com_iflush(struct ixp4xx_com_softc *);
110 1.1 ichiro static void tiocm_to_ixp4xx_com(struct ixp4xx_com_softc *, u_long, int);
111 1.1 ichiro static int ixp4xx_com_to_tiocm(struct ixp4xx_com_softc *);
112 1.1 ichiro
113 1.1 ichiro static void ixp4xx_com_set_cr(struct ixp4xx_com_softc *);
114 1.9 ichiro static void ixpcom_hwiflow(struct ixp4xx_com_softc *);
115 1.1 ichiro
116 1.1 ichiro static void ixp4xxcomsoft(void *);
117 1.9 ichiro static void ixpcomdiag(void *);
118 1.1 ichiro inline static void ixp4xx_com_txsoft(struct ixp4xx_com_softc *, struct tty *);
119 1.1 ichiro inline static void ixp4xx_com_rxsoft(struct ixp4xx_com_softc *, struct tty *);
120 1.9 ichiro inline static void ixpcom_schedrx(struct ixp4xx_com_softc *);
121 1.1 ichiro
122 1.1 ichiro int ixp4xx_cominit(bus_space_tag_t, bus_space_handle_t, int, int, tcflag_t);
123 1.1 ichiro int ixp4xx_comcngetc(dev_t);
124 1.1 ichiro void ixp4xx_comcnputc(dev_t, int);
125 1.1 ichiro void ixp4xx_comcnpollc(dev_t, int);
126 1.1 ichiro void ixp4xx_comcnprobe(struct consdev *);
127 1.1 ichiro void ixp4xx_comcninit(struct consdev *);
128 1.1 ichiro
129 1.1 ichiro static struct ixp4xx_com_cons_softc {
130 1.1 ichiro bus_space_tag_t sc_iot;
131 1.1 ichiro bus_space_handle_t sc_ioh;
132 1.1 ichiro bus_addr_t sc_baseaddr;
133 1.1 ichiro int sc_ospeed;
134 1.1 ichiro tcflag_t sc_cflag;
135 1.1 ichiro int sc_attached;
136 1.5 ichiro char *sc_name;
137 1.1 ichiro } ixp4xx_comcn_sc;
138 1.1 ichiro
139 1.1 ichiro static struct cnm_state ixp4xx_com_cnm_state;
140 1.1 ichiro
141 1.1 ichiro struct ixp4xx_com_softc* ixp4xx_com_sc = NULL;
142 1.1 ichiro
143 1.1 ichiro extern struct cfdriver ixpcom_cd;
144 1.1 ichiro
145 1.1 ichiro dev_type_open(ixp4xx_comopen);
146 1.1 ichiro dev_type_close(ixp4xx_comclose);
147 1.1 ichiro dev_type_read(ixp4xx_comread);
148 1.1 ichiro dev_type_write(ixp4xx_comwrite);
149 1.1 ichiro dev_type_ioctl(ixp4xx_comioctl);
150 1.1 ichiro dev_type_stop(ixp4xx_comstop);
151 1.1 ichiro dev_type_tty(ixp4xx_comtty);
152 1.1 ichiro dev_type_poll(ixp4xx_compoll);
153 1.1 ichiro
154 1.1 ichiro const struct cdevsw ixpcom_cdevsw = {
155 1.1 ichiro ixp4xx_comopen, ixp4xx_comclose, ixp4xx_comread, ixp4xx_comwrite,
156 1.1 ichiro ixp4xx_comioctl, ixp4xx_comstop, ixp4xx_comtty, ixp4xx_compoll,
157 1.1 ichiro nommap, ttykqfilter, D_TTY
158 1.1 ichiro };
159 1.1 ichiro
160 1.9 ichiro /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
161 1.9 ichiro u_int ixpcom_rbuf_hiwat = (IXPCOM_RING_SIZE * 1) / 4;
162 1.9 ichiro u_int ixpcom_rbuf_lowat = (IXPCOM_RING_SIZE * 3) / 4;
163 1.9 ichiro
164 1.1 ichiro #define COMUNIT_MASK 0x7ffff
165 1.1 ichiro #define COMDIALOUT_MASK 0x80000
166 1.1 ichiro
167 1.1 ichiro #define COMUNIT(x) (minor(x) & COMUNIT_MASK)
168 1.1 ichiro #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK)
169 1.1 ichiro
170 1.1 ichiro #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \
171 1.1 ichiro ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE))
172 1.1 ichiro
173 1.1 ichiro #define COM_LOCK(sc);
174 1.1 ichiro #define COM_UNLOCK(sc);
175 1.1 ichiro
176 1.1 ichiro #ifndef COM_TOLERANCE
177 1.1 ichiro #define COM_TOLERANCE 30 /* XXX: baud rate tolerance, in 0.1% units */
178 1.1 ichiro #endif
179 1.1 ichiro
180 1.1 ichiro #define SET(t, f) (t) |= (f)
181 1.1 ichiro #define CLR(t, f) (t) &= ~(f)
182 1.1 ichiro #define ISSET(t, f) ((t) & (f))
183 1.1 ichiro
184 1.1 ichiro #ifdef COM_DEBUG
185 1.1 ichiro int com_debug = 0;
186 1.1 ichiro #endif
187 1.1 ichiro
188 1.1 ichiro int
189 1.1 ichiro ixp4xx_comspeed(long speed, long frequency)
190 1.1 ichiro {
191 1.1 ichiro #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
192 1.1 ichiro
193 1.1 ichiro int x, err;
194 1.1 ichiro
195 1.1 ichiro if (speed <= 0)
196 1.1 ichiro return (-1);
197 1.1 ichiro x = divrnd(frequency / 16, speed);
198 1.1 ichiro if (x <= 0)
199 1.1 ichiro return (-1);
200 1.1 ichiro err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000;
201 1.1 ichiro if (err < 0)
202 1.1 ichiro err = -err;
203 1.1 ichiro if (err > COM_TOLERANCE)
204 1.1 ichiro return (-1);
205 1.1 ichiro return (x);
206 1.1 ichiro #undef divrnd
207 1.1 ichiro }
208 1.1 ichiro
209 1.1 ichiro #if XXX
210 1.1 ichiro static void
211 1.1 ichiro ixp4xx_enable_debugport(struct ixp4xx_com_softc *sc)
212 1.1 ichiro {
213 1.1 ichiro int s;
214 1.1 ichiro
215 1.1 ichiro /* Turn on line break interrupt, set carrier. */
216 1.1 ichiro s = splserial();
217 1.1 ichiro COM_LOCK(sc);
218 1.3 ichiro SET(sc->sc_ier, IER_RAVIE | IER_UUE);
219 1.1 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER, sc->sc_ier);
220 1.1 ichiro SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
221 1.1 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_MCR, sc->sc_mcr);
222 1.1 ichiro COM_UNLOCK(sc);
223 1.1 ichiro splx(s);
224 1.1 ichiro }
225 1.1 ichiro #endif
226 1.1 ichiro
227 1.1 ichiro void
228 1.1 ichiro ixp4xx_com_attach_subr(struct ixp4xx_com_softc *sc)
229 1.1 ichiro {
230 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
231 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
232 1.1 ichiro
233 1.1 ichiro struct tty *tp;
234 1.1 ichiro
235 1.1 ichiro ixp4xx_com_sc = sc;
236 1.5 ichiro
237 1.1 ichiro callout_init(&sc->sc_diag_callout);
238 1.9 ichiro
239 1.4 ichiro /* configuring the device. */
240 1.4 ichiro sc->sc_frequency = FREQ;
241 1.4 ichiro sc->sc_dlbl = ixp4xx_comspeed(CONSPEED, sc->sc_frequency);
242 1.4 ichiro sc->sc_dlbh = ixp4xx_comspeed(CONSPEED, sc->sc_frequency) >> 8;
243 1.4 ichiro
244 1.4 ichiro /* Disabling interrupt */
245 1.4 ichiro sc->sc_ier = IER_UUE;
246 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_IER, sc->sc_ier);
247 1.1 ichiro
248 1.9 ichiro sc->sc_fcr = FCR_TRIGGER_32 | FCR_RESETTF | FCR_RESETRF | FCR_ENABLE;
249 1.4 ichiro bus_space_write_4(iot, ioh, IXP425_UART_FCR, sc->sc_fcr);
250 1.4 ichiro
251 1.1 ichiro if (iot == ixp4xx_comcn_sc.sc_iot
252 1.1 ichiro && sc->sc_baseaddr == ixp4xx_comcn_sc.sc_baseaddr) {
253 1.1 ichiro ixp4xx_comcn_sc.sc_attached = 1;
254 1.1 ichiro
255 1.1 ichiro /* Make sure the console is always "hardwired". */
256 1.1 ichiro delay(20000); /* wait for output to finish */
257 1.1 ichiro SET(sc->sc_hwflags, COM_HW_CONSOLE);
258 1.1 ichiro SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
259 1.1 ichiro }
260 1.4 ichiro
261 1.1 ichiro #ifdef KGDB
262 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) {
263 1.1 ichiro ixp4xx_com_kgdb_attached = 1;
264 1.1 ichiro printf("%s: kgdb\n", sc->sc_dev.dv_xname);
265 1.1 ichiro ixp4xx_enable_debugport(sc);
266 1.1 ichiro return;
267 1.1 ichiro }
268 1.1 ichiro #endif
269 1.1 ichiro
270 1.1 ichiro tp = ttymalloc();
271 1.1 ichiro tp->t_oproc = ixp4xx_comstart;
272 1.1 ichiro tp->t_param = ixp4xx_comparam;
273 1.1 ichiro tp->t_hwiflow = ixp4xx_comhwiflow;
274 1.1 ichiro
275 1.1 ichiro sc->sc_tty = tp;
276 1.1 ichiro sc->sc_rbuf = malloc(IXPCOM_RING_SIZE << 1, M_DEVBUF, M_NOWAIT);
277 1.1 ichiro sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
278 1.1 ichiro sc->sc_rbavail = IXPCOM_RING_SIZE;
279 1.1 ichiro if (sc->sc_rbuf == NULL) {
280 1.1 ichiro printf("%s: unable to allocate ring buffer\n",
281 1.1 ichiro sc->sc_dev.dv_xname);
282 1.1 ichiro return;
283 1.1 ichiro }
284 1.1 ichiro sc->sc_ebuf = sc->sc_rbuf + (IXPCOM_RING_SIZE << 1);
285 1.1 ichiro
286 1.1 ichiro tty_attach(tp);
287 1.1 ichiro
288 1.9 ichiro sc->sc_mcr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_MCR);
289 1.9 ichiro SET(sc->sc_mcr, MCR_IENABLE);
290 1.9 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_MCR, sc->sc_mcr);
291 1.9 ichiro
292 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
293 1.1 ichiro int maj;
294 1.1 ichiro
295 1.1 ichiro /* locate the major number */
296 1.1 ichiro maj = cdevsw_lookup_major(&ixpcom_cdevsw);
297 1.1 ichiro tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
298 1.5 ichiro printf("%s: %s (major=%d)\n", sc->sc_dev.dv_xname,
299 1.5 ichiro ixp4xx_comcn_sc.sc_name, maj);
300 1.1 ichiro }
301 1.1 ichiro
302 1.1 ichiro sc->sc_si = softintr_establish(IPL_SOFTSERIAL, ixp4xxcomsoft, sc);
303 1.1 ichiro
304 1.1 ichiro #if NRND > 0 && defined(RND_COM)
305 1.1 ichiro rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
306 1.1 ichiro RND_TYPE_TTY, 0);
307 1.1 ichiro #endif
308 1.1 ichiro
309 1.1 ichiro /* if there are no enable/disable functions, assume the device
310 1.1 ichiro is always enabled */
311 1.1 ichiro if (!sc->enable)
312 1.1 ichiro sc->enabled = 1;
313 1.1 ichiro
314 1.1 ichiro SET(sc->sc_hwflags, COM_HW_DEV_OK);
315 1.1 ichiro }
316 1.1 ichiro
317 1.1 ichiro static int
318 1.1 ichiro ixp4xx_comparam(struct tty *tp, struct termios *t)
319 1.1 ichiro {
320 1.1 ichiro struct ixp4xx_com_softc *sc =
321 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(tp->t_dev));
322 1.1 ichiro int ospeed;
323 1.1 ichiro u_char lcr;
324 1.1 ichiro int s;
325 1.1 ichiro
326 1.1 ichiro ospeed = ixp4xx_comspeed(t->c_ospeed, sc->sc_frequency);
327 1.1 ichiro
328 1.1 ichiro /* Check requested parameters. */
329 1.1 ichiro if (ospeed < 0)
330 1.1 ichiro return EINVAL;
331 1.1 ichiro if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
332 1.1 ichiro return EINVAL;
333 1.1 ichiro
334 1.1 ichiro /*
335 1.1 ichiro * For the console, always force CLOCAL and !HUPCL, so that the port
336 1.1 ichiro * is always active.
337 1.1 ichiro */
338 1.1 ichiro if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
339 1.1 ichiro ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
340 1.1 ichiro SET(t->c_cflag, CLOCAL);
341 1.1 ichiro CLR(t->c_cflag, HUPCL);
342 1.1 ichiro }
343 1.1 ichiro
344 1.1 ichiro /*
345 1.1 ichiro * If there were no changes, don't do anything. This avoids dropping
346 1.1 ichiro * input and improves performance when all we did was frob things like
347 1.1 ichiro * VMIN and VTIME.
348 1.1 ichiro */
349 1.1 ichiro if (tp->t_ospeed == t->c_ospeed &&
350 1.1 ichiro tp->t_cflag == t->c_cflag)
351 1.1 ichiro return (0);
352 1.1 ichiro
353 1.1 ichiro lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
354 1.1 ichiro
355 1.1 ichiro s = splserial();
356 1.1 ichiro COM_LOCK(sc);
357 1.1 ichiro
358 1.1 ichiro sc->sc_lcr = lcr;
359 1.1 ichiro
360 1.1 ichiro /*
361 1.1 ichiro * If we're not in a mode that assumes a connection is present, then
362 1.1 ichiro * ignore carrier changes.
363 1.1 ichiro */
364 1.1 ichiro if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
365 1.1 ichiro sc->sc_msr_dcd = 0;
366 1.1 ichiro else
367 1.1 ichiro sc->sc_msr_dcd = MSR_DCD;
368 1.1 ichiro /*
369 1.1 ichiro * Set the flow control pins depending on the current flow control
370 1.1 ichiro * mode.
371 1.1 ichiro */
372 1.1 ichiro if (ISSET(t->c_cflag, CRTSCTS)) {
373 1.1 ichiro sc->sc_mcr_dtr = MCR_DTR;
374 1.1 ichiro sc->sc_mcr_rts = MCR_RTS;
375 1.1 ichiro sc->sc_msr_cts = MSR_CTS;
376 1.1 ichiro } else if (ISSET(t->c_cflag, MDMBUF)) {
377 1.1 ichiro /*
378 1.1 ichiro * For DTR/DCD flow control, make sure we don't toggle DTR for
379 1.1 ichiro * carrier detection.
380 1.1 ichiro */
381 1.1 ichiro sc->sc_mcr_dtr = 0;
382 1.1 ichiro sc->sc_mcr_rts = MCR_DTR;
383 1.1 ichiro sc->sc_msr_cts = MSR_DCD;
384 1.1 ichiro } else {
385 1.1 ichiro /*
386 1.1 ichiro * If no flow control, then always set RTS. This will make
387 1.1 ichiro * the other side happy if it mistakenly thinks we're doing
388 1.1 ichiro * RTS/CTS flow control.
389 1.1 ichiro */
390 1.1 ichiro sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
391 1.1 ichiro sc->sc_mcr_rts = 0;
392 1.1 ichiro sc->sc_msr_cts = 0;
393 1.1 ichiro if (ISSET(sc->sc_mcr, MCR_DTR))
394 1.1 ichiro SET(sc->sc_mcr, MCR_RTS);
395 1.1 ichiro else
396 1.1 ichiro CLR(sc->sc_mcr, MCR_RTS);
397 1.1 ichiro }
398 1.1 ichiro sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
399 1.1 ichiro
400 1.1 ichiro sc->sc_dlbl = ospeed;
401 1.1 ichiro sc->sc_dlbh = ospeed >> 8;
402 1.1 ichiro
403 1.1 ichiro /*
404 1.1 ichiro * Set the FIFO threshold based on the receive speed.
405 1.1 ichiro *
406 1.1 ichiro * * If it's a low speed, it's probably a mouse or some other
407 1.1 ichiro * interactive device, so set the threshold low.
408 1.1 ichiro * * If it's a high speed, trim the trigger level down to prevent
409 1.1 ichiro * overflows.
410 1.1 ichiro * * Otherwise set it a bit higher.
411 1.1 ichiro */
412 1.4 ichiro #if 0
413 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
414 1.1 ichiro sc->sc_fcr = FCR_ENABLE |
415 1.1 ichiro (t->c_ospeed <= 1200 ? FCR_TRIGGER_1 :
416 1.1 ichiro t->c_ospeed <= 38400 ? FCR_TRIGGER_16 : FCR_TRIGGER_8);
417 1.1 ichiro else
418 1.1 ichiro sc->sc_fcr = 0;
419 1.1 ichiro #endif
420 1.1 ichiro
421 1.1 ichiro /* And copy to tty. */
422 1.1 ichiro tp->t_ispeed = 0;
423 1.1 ichiro tp->t_ospeed = t->c_ospeed;
424 1.1 ichiro tp->t_cflag = t->c_cflag;
425 1.1 ichiro
426 1.1 ichiro if (!sc->sc_heldchange) {
427 1.1 ichiro if (sc->sc_tx_busy) {
428 1.1 ichiro sc->sc_heldtbc = sc->sc_tbc;
429 1.1 ichiro sc->sc_tbc = 0;
430 1.1 ichiro sc->sc_heldchange = 1;
431 1.1 ichiro } else
432 1.1 ichiro ixp4xx_com_set_cr(sc);
433 1.1 ichiro }
434 1.1 ichiro
435 1.9 ichiro if (!ISSET(t->c_cflag, CHWFLOW)) {
436 1.9 ichiro /* Disable the high water mark. */
437 1.9 ichiro sc->sc_r_hiwat = 0;
438 1.9 ichiro sc->sc_r_lowat = 0;
439 1.9 ichiro if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
440 1.9 ichiro CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
441 1.9 ichiro ixpcom_schedrx(sc);
442 1.9 ichiro }
443 1.9 ichiro if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
444 1.9 ichiro CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
445 1.9 ichiro ixpcom_hwiflow(sc);
446 1.9 ichiro }
447 1.9 ichiro } else {
448 1.9 ichiro sc->sc_r_hiwat = ixpcom_rbuf_hiwat;
449 1.9 ichiro sc->sc_r_lowat = ixpcom_rbuf_lowat;
450 1.9 ichiro }
451 1.9 ichiro
452 1.1 ichiro COM_UNLOCK(sc);
453 1.1 ichiro splx(s);
454 1.1 ichiro
455 1.1 ichiro /*
456 1.1 ichiro * Update the tty layer's idea of the carrier bit.
457 1.1 ichiro * We tell tty the carrier is always on.
458 1.1 ichiro */
459 1.9 ichiro (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
460 1.1 ichiro
461 1.1 ichiro #ifdef COM_DEBUG
462 1.1 ichiro if (com_debug)
463 1.1 ichiro comstatus(sc, "comparam ");
464 1.1 ichiro #endif
465 1.1 ichiro
466 1.1 ichiro if (!ISSET(t->c_cflag, CHWFLOW)) {
467 1.1 ichiro if (sc->sc_tx_stopped) {
468 1.1 ichiro sc->sc_tx_stopped = 0;
469 1.1 ichiro ixp4xx_comstart(tp);
470 1.1 ichiro }
471 1.1 ichiro }
472 1.1 ichiro
473 1.1 ichiro return (0);
474 1.1 ichiro }
475 1.1 ichiro
476 1.1 ichiro void
477 1.1 ichiro ixp4xx_com_set_cr(struct ixp4xx_com_softc *sc)
478 1.1 ichiro {
479 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
480 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
481 1.1 ichiro
482 1.1 ichiro ixp4xx_com_iflush(sc);
483 1.1 ichiro
484 1.9 ichiro bus_space_write_4(iot, ioh, IXP425_UART_IER, IER_UUE);
485 1.9 ichiro
486 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_LCR, sc->sc_lcr | LCR_DLAB);
487 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DLL, sc->sc_dlbl);
488 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DLH, sc->sc_dlbh);
489 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_LCR, sc->sc_lcr);
490 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, sc->sc_mcr_active = sc->sc_mcr);
491 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_FCR, sc->sc_fcr);
492 1.3 ichiro bus_space_write_4(iot, ioh, IXP425_UART_IER, sc->sc_ier | IER_UUE);
493 1.1 ichiro }
494 1.1 ichiro
495 1.1 ichiro static int
496 1.1 ichiro ixp4xx_comhwiflow(struct tty *tp, int block)
497 1.1 ichiro {
498 1.9 ichiro struct ixp4xx_com_softc *sc
499 1.9 ichiro = device_lookup(&ixpcom_cd, COMUNIT(tp->t_dev));
500 1.9 ichiro int s;
501 1.9 ichiro
502 1.9 ichiro if (COM_ISALIVE(sc) == 0)
503 1.9 ichiro return (0);
504 1.9 ichiro
505 1.9 ichiro if (sc->sc_mcr_rts == 0)
506 1.9 ichiro return (0);
507 1.9 ichiro
508 1.9 ichiro s = splserial();
509 1.9 ichiro COM_LOCK(sc);
510 1.9 ichiro
511 1.9 ichiro if (block) {
512 1.9 ichiro if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
513 1.9 ichiro SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
514 1.9 ichiro ixpcom_hwiflow(sc);
515 1.9 ichiro }
516 1.9 ichiro } else {
517 1.9 ichiro if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
518 1.9 ichiro CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
519 1.9 ichiro ixpcom_schedrx(sc);
520 1.9 ichiro }
521 1.9 ichiro if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
522 1.9 ichiro CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
523 1.9 ichiro ixpcom_hwiflow(sc);
524 1.9 ichiro }
525 1.9 ichiro }
526 1.9 ichiro
527 1.9 ichiro COM_UNLOCK(sc);
528 1.9 ichiro splx(s);
529 1.9 ichiro return (1);
530 1.9 ichiro }
531 1.9 ichiro
532 1.9 ichiro /*
533 1.9 ichiro * (un)block input via hw flowcontrol
534 1.9 ichiro */
535 1.9 ichiro void
536 1.9 ichiro ixpcom_hwiflow(struct ixp4xx_com_softc *sc)
537 1.9 ichiro {
538 1.9 ichiro bus_space_tag_t iot = sc->sc_iot;
539 1.9 ichiro bus_space_handle_t ioh = sc->sc_ioh;
540 1.9 ichiro
541 1.9 ichiro if (sc->sc_mcr_rts == 0)
542 1.9 ichiro return;
543 1.9 ichiro
544 1.9 ichiro if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
545 1.9 ichiro CLR(sc->sc_mcr, sc->sc_mcr_rts);
546 1.9 ichiro CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
547 1.9 ichiro } else {
548 1.9 ichiro SET(sc->sc_mcr, sc->sc_mcr_rts);
549 1.9 ichiro SET(sc->sc_mcr_active, sc->sc_mcr_rts);
550 1.9 ichiro }
551 1.9 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, sc->sc_mcr_active);
552 1.1 ichiro }
553 1.1 ichiro
554 1.1 ichiro static void
555 1.1 ichiro ixp4xx_com_filltx(struct ixp4xx_com_softc *sc)
556 1.1 ichiro {
557 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
558 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
559 1.1 ichiro int n;
560 1.1 ichiro
561 1.1 ichiro n = 0;
562 1.1 ichiro while (bus_space_read_4(iot, ioh, IXP425_UART_LSR) & LSR_TDRQ) {
563 1.1 ichiro if (n >= sc->sc_tbc)
564 1.1 ichiro break;
565 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DATA,
566 1.1 ichiro 0xff & *(sc->sc_tba + n));
567 1.1 ichiro n++;
568 1.1 ichiro }
569 1.1 ichiro sc->sc_tbc -= n;
570 1.9 ichiro sc->sc_tba += n;
571 1.1 ichiro }
572 1.9 ichiro
573 1.1 ichiro
574 1.1 ichiro static void
575 1.1 ichiro ixp4xx_comstart(struct tty *tp)
576 1.1 ichiro {
577 1.1 ichiro struct ixp4xx_com_softc *sc
578 1.1 ichiro = device_lookup(&ixpcom_cd, COMUNIT(tp->t_dev));
579 1.1 ichiro int s;
580 1.1 ichiro
581 1.1 ichiro if (COM_ISALIVE(sc) == 0)
582 1.1 ichiro return;
583 1.1 ichiro
584 1.1 ichiro s = spltty();
585 1.1 ichiro if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
586 1.1 ichiro goto out;
587 1.1 ichiro if (sc->sc_tx_stopped)
588 1.1 ichiro goto out;
589 1.1 ichiro
590 1.1 ichiro if (tp->t_outq.c_cc <= tp->t_lowat) {
591 1.1 ichiro if (ISSET(tp->t_state, TS_ASLEEP)) {
592 1.1 ichiro CLR(tp->t_state, TS_ASLEEP);
593 1.1 ichiro wakeup(&tp->t_outq);
594 1.1 ichiro }
595 1.1 ichiro selwakeup(&tp->t_wsel);
596 1.1 ichiro if (tp->t_outq.c_cc == 0)
597 1.1 ichiro goto out;
598 1.1 ichiro }
599 1.1 ichiro
600 1.1 ichiro /* Grab the first contiguous region of buffer space. */
601 1.1 ichiro {
602 1.1 ichiro u_char *tba;
603 1.1 ichiro int tbc;
604 1.1 ichiro
605 1.1 ichiro tba = tp->t_outq.c_cf;
606 1.1 ichiro tbc = ndqb(&tp->t_outq, 0);
607 1.1 ichiro
608 1.1 ichiro (void)splserial();
609 1.1 ichiro COM_LOCK(sc);
610 1.1 ichiro
611 1.1 ichiro sc->sc_tba = tba;
612 1.1 ichiro sc->sc_tbc = tbc;
613 1.1 ichiro }
614 1.1 ichiro
615 1.1 ichiro SET(tp->t_state, TS_BUSY);
616 1.1 ichiro sc->sc_tx_busy = 1;
617 1.1 ichiro
618 1.1 ichiro /* Enable transmit completion interrupts if necessary. */
619 1.1 ichiro if (!ISSET(sc->sc_ier, IER_TIE)) {
620 1.1 ichiro SET(sc->sc_ier, IER_TIE);
621 1.3 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER,
622 1.9 ichiro sc->sc_ier);
623 1.1 ichiro }
624 1.1 ichiro
625 1.1 ichiro /* Output the first chunk of the contiguous buffer. */
626 1.1 ichiro ixp4xx_com_filltx(sc);
627 1.1 ichiro
628 1.1 ichiro COM_UNLOCK(sc);
629 1.1 ichiro out:
630 1.1 ichiro splx(s);
631 1.1 ichiro return;
632 1.1 ichiro }
633 1.1 ichiro
634 1.9 ichiro inline static void
635 1.9 ichiro ixpcom_schedrx(struct ixp4xx_com_softc *sc)
636 1.9 ichiro {
637 1.9 ichiro sc->sc_rx_ready = 1;
638 1.9 ichiro
639 1.9 ichiro /* Wake up the poller. */
640 1.9 ichiro softintr_schedule(sc->sc_si);
641 1.9 ichiro }
642 1.9 ichiro
643 1.1 ichiro static void
644 1.1 ichiro ixp4xx_com_break(struct ixp4xx_com_softc *sc, int onoff)
645 1.1 ichiro {
646 1.1 ichiro if (onoff)
647 1.1 ichiro SET(sc->sc_lcr, LCR_SBREAK);
648 1.1 ichiro else
649 1.1 ichiro CLR(sc->sc_lcr, LCR_SBREAK);
650 1.1 ichiro
651 1.1 ichiro if (!sc->sc_heldchange) {
652 1.1 ichiro if (sc->sc_tx_busy) {
653 1.1 ichiro sc->sc_heldtbc = sc->sc_tbc;
654 1.1 ichiro sc->sc_tbc = 0;
655 1.1 ichiro sc->sc_heldchange = 1;
656 1.1 ichiro } else
657 1.3 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_LCR,
658 1.3 ichiro sc->sc_lcr);
659 1.1 ichiro }
660 1.1 ichiro }
661 1.1 ichiro
662 1.1 ichiro static void
663 1.1 ichiro ixp4xx_com_shutdown(struct ixp4xx_com_softc *sc)
664 1.1 ichiro {
665 1.1 ichiro struct tty *tp = sc->sc_tty;
666 1.1 ichiro int s;
667 1.1 ichiro
668 1.1 ichiro s = splserial();
669 1.1 ichiro COM_LOCK(sc);
670 1.1 ichiro
671 1.1 ichiro /* Clear any break condition set with TIOCSBRK. */
672 1.1 ichiro ixp4xx_com_break(sc, 0);
673 1.1 ichiro
674 1.1 ichiro /*
675 1.1 ichiro * Hang up if necessary. Wait a bit, so the other side has time to
676 1.1 ichiro * notice even if we immediately open the port again.
677 1.1 ichiro * Avoid tsleeping above splhigh().
678 1.1 ichiro */
679 1.1 ichiro if (ISSET(tp->t_cflag, HUPCL)) {
680 1.1 ichiro ixp4xx_com_modem(sc, 0);
681 1.1 ichiro COM_UNLOCK(sc);
682 1.1 ichiro splx(s);
683 1.1 ichiro /* XXX tsleep will only timeout */
684 1.1 ichiro (void) tsleep(sc, TTIPRI, ttclos, hz);
685 1.1 ichiro s = splserial();
686 1.1 ichiro COM_LOCK(sc);
687 1.1 ichiro }
688 1.1 ichiro
689 1.1 ichiro /* Turn off interrupts. */
690 1.9 ichiro #if 1
691 1.9 ichiro if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
692 1.9 ichiro sc->sc_ier = IER_RAVIE | IER_RTOIE;
693 1.9 ichiro } else
694 1.9 ichiro sc->sc_ier = IER_UUE;
695 1.9 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER,
696 1.9 ichiro sc->sc_ier);
697 1.9 ichiro #else
698 1.1 ichiro sc->sc_ier &= ~(IER_RAVIE | IER_TIE);
699 1.3 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER,
700 1.3 ichiro sc->sc_ier | IER_UUE);
701 1.9 ichiro #endif
702 1.1 ichiro
703 1.1 ichiro if (sc->disable) {
704 1.1 ichiro #ifdef DIAGNOSTIC
705 1.1 ichiro if (!sc->enabled)
706 1.1 ichiro panic("ixpcom_shutdown: not enabled?");
707 1.1 ichiro #endif
708 1.1 ichiro (*sc->disable)(sc);
709 1.1 ichiro sc->enabled = 0;
710 1.1 ichiro }
711 1.1 ichiro COM_UNLOCK(sc);
712 1.1 ichiro splx(s);
713 1.1 ichiro }
714 1.1 ichiro
715 1.1 ichiro int
716 1.9 ichiro ixp4xx_comopen(dev_t dev, int flag, int mode, struct lwp *l)
717 1.1 ichiro {
718 1.1 ichiro struct ixp4xx_com_softc *sc;
719 1.1 ichiro struct tty *tp;
720 1.1 ichiro int s, s2;
721 1.1 ichiro int error;
722 1.1 ichiro
723 1.1 ichiro sc = device_lookup(&ixpcom_cd, COMUNIT(dev));
724 1.1 ichiro if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) ||
725 1.1 ichiro sc->sc_rbuf == NULL)
726 1.1 ichiro return (ENXIO);
727 1.1 ichiro
728 1.1 ichiro if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
729 1.1 ichiro return (ENXIO);
730 1.1 ichiro
731 1.1 ichiro #ifdef KGDB
732 1.1 ichiro /*
733 1.1 ichiro * If this is the kgdb port, no other use is permitted.
734 1.1 ichiro */
735 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
736 1.1 ichiro return (EBUSY);
737 1.1 ichiro #endif
738 1.1 ichiro
739 1.1 ichiro tp = sc->sc_tty;
740 1.1 ichiro
741 1.1 ichiro if (ISSET(tp->t_state, TS_ISOPEN) &&
742 1.1 ichiro ISSET(tp->t_state, TS_XCLUDE) &&
743 1.9 ichiro l->l_proc->p_ucred->cr_uid != 0)
744 1.1 ichiro return (EBUSY);
745 1.1 ichiro
746 1.1 ichiro s = spltty();
747 1.1 ichiro
748 1.1 ichiro /*
749 1.1 ichiro * Do the following iff this is a first open.
750 1.1 ichiro */
751 1.1 ichiro if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
752 1.1 ichiro struct termios t;
753 1.1 ichiro
754 1.1 ichiro tp->t_dev = dev;
755 1.1 ichiro
756 1.1 ichiro s2 = splserial();
757 1.1 ichiro COM_LOCK(sc);
758 1.1 ichiro
759 1.1 ichiro if (sc->enable) {
760 1.1 ichiro if ((*sc->enable)(sc)) {
761 1.1 ichiro COM_UNLOCK(sc);
762 1.1 ichiro splx(s2);
763 1.1 ichiro splx(s);
764 1.1 ichiro printf("%s: device enable failed\n",
765 1.1 ichiro sc->sc_dev.dv_xname);
766 1.1 ichiro return (EIO);
767 1.1 ichiro }
768 1.1 ichiro sc->enabled = 1;
769 1.1 ichiro }
770 1.1 ichiro /* Turn on interrupts. */
771 1.9 ichiro SET(sc->sc_ier, IER_RAVIE | IER_RTOIE | IER_RLSE | IER_RIE);
772 1.4 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_IER, sc->sc_ier);
773 1.9 ichiro
774 1.1 ichiro /* Fetch the current modem control status, needed later. */
775 1.9 ichiro sc->sc_msr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IXP425_UART_MSR);
776 1.9 ichiro
777 1.1 ichiro COM_UNLOCK(sc);
778 1.1 ichiro splx(s2);
779 1.1 ichiro
780 1.1 ichiro /*
781 1.1 ichiro * Initialize the termios status to the defaults. Add in the
782 1.1 ichiro * sticky bits from TIOCSFLAGS.
783 1.1 ichiro */
784 1.1 ichiro t.c_ispeed = 0;
785 1.1 ichiro if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
786 1.1 ichiro t.c_ospeed = ixp4xx_comcn_sc.sc_ospeed;
787 1.1 ichiro t.c_cflag = ixp4xx_comcn_sc.sc_cflag;
788 1.1 ichiro } else {
789 1.1 ichiro t.c_ospeed = TTYDEF_SPEED;
790 1.1 ichiro t.c_cflag = TTYDEF_CFLAG;
791 1.1 ichiro }
792 1.1 ichiro if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
793 1.1 ichiro SET(t.c_cflag, CLOCAL);
794 1.1 ichiro if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
795 1.1 ichiro SET(t.c_cflag, CRTSCTS);
796 1.1 ichiro if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
797 1.1 ichiro SET(t.c_cflag, MDMBUF);
798 1.1 ichiro /* Make sure ixpcomparam() will do something. */
799 1.1 ichiro tp->t_ospeed = 0;
800 1.1 ichiro (void) ixp4xx_comparam(tp, &t);
801 1.1 ichiro tp->t_iflag = TTYDEF_IFLAG;
802 1.1 ichiro tp->t_oflag = TTYDEF_OFLAG;
803 1.1 ichiro tp->t_lflag = TTYDEF_LFLAG;
804 1.1 ichiro ttychars(tp);
805 1.1 ichiro ttsetwater(tp);
806 1.1 ichiro
807 1.1 ichiro s2 = splserial();
808 1.1 ichiro COM_LOCK(sc);
809 1.1 ichiro
810 1.1 ichiro /*
811 1.1 ichiro * Turn on DTR. We must always do this, even if carrier is not
812 1.1 ichiro * present, because otherwise we'd have to use TIOCSDTR
813 1.1 ichiro * immediately after setting CLOCAL, which applications do not
814 1.1 ichiro * expect. We always assert DTR while the device is open
815 1.1 ichiro * unless explicitly requested to deassert it.
816 1.1 ichiro */
817 1.1 ichiro ixp4xx_com_modem(sc, 1);
818 1.1 ichiro /* Clear the input ring, and unblock. */
819 1.1 ichiro sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
820 1.1 ichiro sc->sc_rbavail = IXPCOM_RING_SIZE;
821 1.1 ichiro ixp4xx_com_iflush(sc);
822 1.1 ichiro CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
823 1.9 ichiro ixpcom_hwiflow(sc);
824 1.1 ichiro
825 1.1 ichiro #ifdef COM_DEBUG
826 1.1 ichiro if (com_debug)
827 1.1 ichiro comstatus(sc, "ixp4xx_comopen ");
828 1.1 ichiro #endif
829 1.1 ichiro
830 1.1 ichiro COM_UNLOCK(sc);
831 1.1 ichiro splx(s2);
832 1.1 ichiro }
833 1.1 ichiro splx(s);
834 1.1 ichiro
835 1.1 ichiro error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
836 1.1 ichiro if (error)
837 1.1 ichiro goto bad;
838 1.1 ichiro
839 1.1 ichiro error = (*tp->t_linesw->l_open)(dev, tp);
840 1.1 ichiro if (error)
841 1.1 ichiro goto bad;
842 1.1 ichiro
843 1.1 ichiro return (0);
844 1.1 ichiro
845 1.1 ichiro bad:
846 1.1 ichiro if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
847 1.1 ichiro /*
848 1.1 ichiro * We failed to open the device, and nobody else had it opened.
849 1.1 ichiro * Clean up the state as appropriate.
850 1.1 ichiro */
851 1.1 ichiro ixp4xx_com_shutdown(sc);
852 1.1 ichiro }
853 1.1 ichiro return (error);
854 1.1 ichiro }
855 1.1 ichiro
856 1.1 ichiro int
857 1.9 ichiro ixp4xx_comclose(dev_t dev, int flag, int mode, struct lwp *l)
858 1.1 ichiro {
859 1.1 ichiro struct ixp4xx_com_softc *sc =
860 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
861 1.1 ichiro struct tty *tp = sc->sc_tty;
862 1.1 ichiro
863 1.1 ichiro /* XXX This is for cons.c. */
864 1.1 ichiro if (!ISSET(tp->t_state, TS_ISOPEN))
865 1.1 ichiro return (0);
866 1.1 ichiro
867 1.1 ichiro (*tp->t_linesw->l_close)(tp, flag);
868 1.1 ichiro ttyclose(tp);
869 1.1 ichiro
870 1.1 ichiro if (COM_ISALIVE(sc) == 0)
871 1.1 ichiro return (0);
872 1.1 ichiro
873 1.1 ichiro if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
874 1.1 ichiro /*
875 1.1 ichiro * Although we got a last close, the device may still be in
876 1.1 ichiro * use; e.g. if this was the dialout node, and there are still
877 1.1 ichiro * processes waiting for carrier on the non-dialout node.
878 1.1 ichiro */
879 1.1 ichiro ixp4xx_com_shutdown(sc);
880 1.1 ichiro }
881 1.1 ichiro
882 1.1 ichiro return (0);
883 1.1 ichiro }
884 1.1 ichiro
885 1.1 ichiro int
886 1.7 ichiro ixp4xx_comread(dev_t dev, struct uio *uio, int flag)
887 1.1 ichiro {
888 1.1 ichiro struct ixp4xx_com_softc *sc =
889 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
890 1.1 ichiro struct tty *tp = sc->sc_tty;
891 1.1 ichiro
892 1.1 ichiro if (COM_ISALIVE(sc) == 0)
893 1.1 ichiro return (EIO);
894 1.1 ichiro
895 1.1 ichiro return ((*tp->t_linesw->l_read)(tp, uio, flag));
896 1.1 ichiro }
897 1.1 ichiro
898 1.1 ichiro int
899 1.7 ichiro ixp4xx_comwrite(dev_t dev, struct uio *uio, int flag)
900 1.1 ichiro {
901 1.1 ichiro struct ixp4xx_com_softc *sc =
902 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
903 1.1 ichiro struct tty *tp = sc->sc_tty;
904 1.1 ichiro
905 1.1 ichiro if (COM_ISALIVE(sc) == 0)
906 1.1 ichiro return (EIO);
907 1.1 ichiro
908 1.1 ichiro return ((*tp->t_linesw->l_write)(tp, uio, flag));
909 1.1 ichiro }
910 1.1 ichiro
911 1.1 ichiro int
912 1.9 ichiro ixp4xx_compoll(dev_t dev, int events, struct lwp *l)
913 1.1 ichiro {
914 1.1 ichiro struct ixp4xx_com_softc *sc =
915 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
916 1.1 ichiro struct tty *tp = sc->sc_tty;
917 1.1 ichiro
918 1.1 ichiro if (COM_ISALIVE(sc) == 0)
919 1.1 ichiro return (EIO);
920 1.1 ichiro
921 1.9 ichiro return ((*tp->t_linesw->l_poll)(tp, events, l));
922 1.1 ichiro }
923 1.1 ichiro
924 1.1 ichiro struct tty *
925 1.1 ichiro ixp4xx_comtty(dev_t dev)
926 1.1 ichiro {
927 1.1 ichiro struct ixp4xx_com_softc *sc =
928 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
929 1.1 ichiro struct tty *tp = sc->sc_tty;
930 1.1 ichiro
931 1.1 ichiro return (tp);
932 1.1 ichiro }
933 1.1 ichiro
934 1.1 ichiro int
935 1.9 ichiro ixp4xx_comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l)
936 1.1 ichiro {
937 1.1 ichiro struct ixp4xx_com_softc *sc =
938 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(dev));
939 1.1 ichiro struct tty *tp = sc->sc_tty;
940 1.1 ichiro int error;
941 1.1 ichiro int s;
942 1.1 ichiro
943 1.1 ichiro if (COM_ISALIVE(sc) == 0)
944 1.1 ichiro return (EIO);
945 1.1 ichiro
946 1.9 ichiro error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
947 1.1 ichiro if (error != EPASSTHROUGH)
948 1.1 ichiro return (error);
949 1.1 ichiro
950 1.9 ichiro error = ttioctl(tp, cmd, data, flag, l);
951 1.1 ichiro if (error != EPASSTHROUGH)
952 1.1 ichiro return (error);
953 1.1 ichiro
954 1.1 ichiro error = 0;
955 1.1 ichiro
956 1.1 ichiro s = splserial();
957 1.1 ichiro COM_LOCK(sc);
958 1.1 ichiro
959 1.1 ichiro switch (cmd) {
960 1.1 ichiro case TIOCSBRK:
961 1.1 ichiro ixp4xx_com_break(sc, 1);
962 1.1 ichiro break;
963 1.1 ichiro
964 1.1 ichiro case TIOCCBRK:
965 1.1 ichiro ixp4xx_com_break(sc, 0);
966 1.1 ichiro break;
967 1.1 ichiro
968 1.1 ichiro case TIOCSDTR:
969 1.1 ichiro ixp4xx_com_modem(sc, 1);
970 1.1 ichiro break;
971 1.1 ichiro
972 1.1 ichiro case TIOCCDTR:
973 1.1 ichiro ixp4xx_com_modem(sc, 0);
974 1.1 ichiro break;
975 1.1 ichiro
976 1.1 ichiro case TIOCGFLAGS:
977 1.1 ichiro *(int *)data = sc->sc_swflags;
978 1.1 ichiro break;
979 1.1 ichiro
980 1.1 ichiro case TIOCSFLAGS:
981 1.9 ichiro error = suser(l->l_proc->p_ucred, &l->l_proc->p_acflag);
982 1.1 ichiro if (error)
983 1.1 ichiro break;
984 1.1 ichiro sc->sc_swflags = *(int *)data;
985 1.1 ichiro break;
986 1.1 ichiro
987 1.1 ichiro case TIOCMSET:
988 1.1 ichiro case TIOCMBIS:
989 1.1 ichiro case TIOCMBIC:
990 1.1 ichiro tiocm_to_ixp4xx_com(sc, cmd, *(int *)data);
991 1.1 ichiro break;
992 1.1 ichiro
993 1.1 ichiro case TIOCMGET:
994 1.1 ichiro *(int *)data = ixp4xx_com_to_tiocm(sc);
995 1.1 ichiro break;
996 1.1 ichiro
997 1.1 ichiro default:
998 1.1 ichiro error = EPASSTHROUGH;
999 1.1 ichiro break;
1000 1.1 ichiro }
1001 1.1 ichiro
1002 1.1 ichiro COM_UNLOCK(sc);
1003 1.1 ichiro splx(s);
1004 1.1 ichiro
1005 1.1 ichiro #ifdef COM_DEBUG
1006 1.1 ichiro if (com_debug)
1007 1.1 ichiro comstatus(sc, "comioctl ");
1008 1.1 ichiro #endif
1009 1.1 ichiro
1010 1.1 ichiro return (error);
1011 1.1 ichiro }
1012 1.1 ichiro
1013 1.1 ichiro void
1014 1.1 ichiro ixp4xx_comstop(struct tty *tp, int flag)
1015 1.1 ichiro {
1016 1.1 ichiro struct ixp4xx_com_softc *sc =
1017 1.1 ichiro device_lookup(&ixpcom_cd, COMUNIT(tp->t_dev));
1018 1.1 ichiro int s;
1019 1.1 ichiro
1020 1.1 ichiro s = splserial();
1021 1.1 ichiro COM_LOCK(sc);
1022 1.1 ichiro if (ISSET(tp->t_state, TS_BUSY)) {
1023 1.1 ichiro /* Stop transmitting at the next chunk. */
1024 1.1 ichiro sc->sc_tbc = 0;
1025 1.1 ichiro sc->sc_heldtbc = 0;
1026 1.1 ichiro if (!ISSET(tp->t_state, TS_TTSTOP))
1027 1.1 ichiro SET(tp->t_state, TS_FLUSH);
1028 1.1 ichiro }
1029 1.1 ichiro COM_UNLOCK(sc);
1030 1.1 ichiro splx(s);
1031 1.1 ichiro }
1032 1.1 ichiro
1033 1.1 ichiro static void
1034 1.1 ichiro ixp4xx_com_modem(struct ixp4xx_com_softc *sc, int onoff)
1035 1.1 ichiro {
1036 1.4 ichiro bus_space_tag_t iot = sc->sc_iot;
1037 1.4 ichiro bus_space_handle_t ioh = sc->sc_ioh;
1038 1.1 ichiro
1039 1.1 ichiro if (sc->sc_mcr_dtr == 0)
1040 1.1 ichiro return;
1041 1.1 ichiro
1042 1.1 ichiro if (onoff)
1043 1.1 ichiro SET(sc->sc_mcr, sc->sc_mcr_dtr);
1044 1.1 ichiro else
1045 1.1 ichiro CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1046 1.1 ichiro
1047 1.1 ichiro if (!sc->sc_heldchange) {
1048 1.1 ichiro if (sc->sc_tx_busy) {
1049 1.1 ichiro sc->sc_heldtbc = sc->sc_tbc;
1050 1.1 ichiro sc->sc_tbc = 0;
1051 1.1 ichiro sc->sc_heldchange = 1;
1052 1.1 ichiro } else
1053 1.4 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, sc->sc_mcr);
1054 1.1 ichiro }
1055 1.1 ichiro }
1056 1.1 ichiro
1057 1.1 ichiro static void
1058 1.1 ichiro tiocm_to_ixp4xx_com(struct ixp4xx_com_softc *sc, u_long how, int ttybits)
1059 1.1 ichiro {
1060 1.4 ichiro bus_space_tag_t iot = sc->sc_iot;
1061 1.4 ichiro bus_space_handle_t ioh = sc->sc_ioh;
1062 1.1 ichiro u_char combits;
1063 1.1 ichiro
1064 1.1 ichiro combits = 0;
1065 1.1 ichiro if (ISSET(ttybits, TIOCM_DTR))
1066 1.1 ichiro SET(combits, MCR_DTR);
1067 1.1 ichiro if (ISSET(ttybits, TIOCM_RTS))
1068 1.1 ichiro SET(combits, MCR_RTS);
1069 1.1 ichiro
1070 1.1 ichiro switch (how) {
1071 1.1 ichiro case TIOCMBIC:
1072 1.1 ichiro CLR(sc->sc_mcr, combits);
1073 1.1 ichiro break;
1074 1.1 ichiro
1075 1.1 ichiro case TIOCMBIS:
1076 1.1 ichiro SET(sc->sc_mcr, combits);
1077 1.1 ichiro break;
1078 1.1 ichiro
1079 1.1 ichiro case TIOCMSET:
1080 1.1 ichiro CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
1081 1.1 ichiro SET(sc->sc_mcr, combits);
1082 1.1 ichiro break;
1083 1.1 ichiro }
1084 1.1 ichiro
1085 1.1 ichiro if (!sc->sc_heldchange) {
1086 1.1 ichiro if (sc->sc_tx_busy) {
1087 1.1 ichiro sc->sc_heldtbc = sc->sc_tbc;
1088 1.1 ichiro sc->sc_tbc = 0;
1089 1.1 ichiro sc->sc_heldchange = 1;
1090 1.1 ichiro } else
1091 1.4 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, sc->sc_mcr);
1092 1.1 ichiro }
1093 1.1 ichiro }
1094 1.1 ichiro
1095 1.1 ichiro static int
1096 1.1 ichiro ixp4xx_com_to_tiocm(struct ixp4xx_com_softc *sc)
1097 1.1 ichiro {
1098 1.1 ichiro u_char combits;
1099 1.1 ichiro int ttybits = 0;
1100 1.1 ichiro
1101 1.1 ichiro combits = sc->sc_mcr;
1102 1.1 ichiro if (ISSET(combits, MCR_DTR))
1103 1.1 ichiro SET(ttybits, TIOCM_DTR);
1104 1.1 ichiro if (ISSET(combits, MCR_RTS))
1105 1.1 ichiro SET(ttybits, TIOCM_RTS);
1106 1.1 ichiro
1107 1.1 ichiro combits = sc->sc_msr;
1108 1.1 ichiro if (ISSET(combits, MSR_DCD))
1109 1.1 ichiro SET(ttybits, TIOCM_CD);
1110 1.1 ichiro if (ISSET(combits, MSR_CTS))
1111 1.1 ichiro SET(ttybits, TIOCM_CTS);
1112 1.1 ichiro if (ISSET(combits, MSR_DSR))
1113 1.1 ichiro SET(ttybits, TIOCM_DSR);
1114 1.1 ichiro if (ISSET(combits, MSR_RI | MSR_TERI))
1115 1.1 ichiro SET(ttybits, TIOCM_RI);
1116 1.1 ichiro
1117 1.9 ichiro if ((sc->sc_ier & 0x0f) != 0)
1118 1.1 ichiro SET(ttybits, TIOCM_LE);
1119 1.1 ichiro
1120 1.1 ichiro return (ttybits);
1121 1.1 ichiro }
1122 1.1 ichiro
1123 1.1 ichiro static u_int
1124 1.1 ichiro cflag2lcr(tcflag_t cflag)
1125 1.1 ichiro {
1126 1.1 ichiro u_char lcr = 0;
1127 1.1 ichiro
1128 1.1 ichiro switch (ISSET(cflag, CSIZE)) {
1129 1.1 ichiro case CS5:
1130 1.1 ichiro SET(lcr, LCR_5BITS);
1131 1.1 ichiro break;
1132 1.1 ichiro case CS6:
1133 1.1 ichiro SET(lcr, LCR_6BITS);
1134 1.1 ichiro break;
1135 1.1 ichiro case CS7:
1136 1.1 ichiro SET(lcr, LCR_7BITS);
1137 1.1 ichiro break;
1138 1.1 ichiro case CS8:
1139 1.1 ichiro SET(lcr, LCR_8BITS);
1140 1.1 ichiro break;
1141 1.1 ichiro }
1142 1.1 ichiro if (ISSET(cflag, PARENB)) {
1143 1.1 ichiro SET(lcr, LCR_PENE);
1144 1.1 ichiro if (!ISSET(cflag, PARODD))
1145 1.1 ichiro SET(lcr, LCR_PODD);
1146 1.1 ichiro }
1147 1.1 ichiro if (ISSET(cflag, CSTOPB))
1148 1.1 ichiro SET(lcr, LCR_1STOP);
1149 1.1 ichiro
1150 1.1 ichiro return (lcr);
1151 1.1 ichiro }
1152 1.1 ichiro
1153 1.1 ichiro static void
1154 1.1 ichiro ixp4xx_com_iflush(struct ixp4xx_com_softc *sc)
1155 1.1 ichiro {
1156 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
1157 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
1158 1.1 ichiro #ifdef DIAGNOSTIC
1159 1.1 ichiro int reg;
1160 1.1 ichiro #endif
1161 1.1 ichiro int timo;
1162 1.1 ichiro
1163 1.1 ichiro #ifdef DIAGNOSTIC
1164 1.1 ichiro reg = 0xffff;
1165 1.1 ichiro #endif
1166 1.1 ichiro timo = 50000;
1167 1.1 ichiro /* flush any pending I/O */
1168 1.1 ichiro while (ISSET(bus_space_read_4(iot, ioh, IXP425_UART_LSR), LSR_DR)
1169 1.1 ichiro && --timo)
1170 1.1 ichiro #ifdef DIAGNOSTIC
1171 1.1 ichiro reg =
1172 1.1 ichiro #else
1173 1.1 ichiro (void)
1174 1.1 ichiro #endif
1175 1.1 ichiro bus_space_read_4(iot, ioh, IXP425_UART_DATA);
1176 1.1 ichiro #ifdef DIAGNOSTIC
1177 1.1 ichiro if (!timo)
1178 1.1 ichiro printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname,
1179 1.1 ichiro reg);
1180 1.1 ichiro #endif
1181 1.1 ichiro }
1182 1.1 ichiro
1183 1.1 ichiro static void
1184 1.1 ichiro ixp4xxcomsoft(void* arg)
1185 1.1 ichiro {
1186 1.1 ichiro struct ixp4xx_com_softc *sc = arg;
1187 1.1 ichiro
1188 1.1 ichiro if (COM_ISALIVE(sc) == 0)
1189 1.1 ichiro return;
1190 1.1 ichiro
1191 1.1 ichiro if (sc->sc_rx_ready) {
1192 1.1 ichiro sc->sc_rx_ready = 0;
1193 1.1 ichiro ixp4xx_com_rxsoft(sc, sc->sc_tty);
1194 1.1 ichiro }
1195 1.1 ichiro if (sc->sc_tx_done) {
1196 1.1 ichiro sc->sc_tx_done = 0;
1197 1.1 ichiro ixp4xx_com_txsoft(sc, sc->sc_tty);
1198 1.1 ichiro }
1199 1.1 ichiro }
1200 1.1 ichiro
1201 1.1 ichiro inline static void
1202 1.1 ichiro ixp4xx_com_txsoft(struct ixp4xx_com_softc *sc, struct tty *tp)
1203 1.1 ichiro {
1204 1.1 ichiro CLR(tp->t_state, TS_BUSY);
1205 1.1 ichiro if (ISSET(tp->t_state, TS_FLUSH))
1206 1.1 ichiro CLR(tp->t_state, TS_FLUSH);
1207 1.1 ichiro else
1208 1.1 ichiro ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1209 1.1 ichiro (*tp->t_linesw->l_start)(tp);
1210 1.1 ichiro }
1211 1.1 ichiro
1212 1.9 ichiro void
1213 1.9 ichiro ixpcomdiag(void *arg)
1214 1.9 ichiro {
1215 1.9 ichiro struct ixp4xx_com_softc *sc = arg;
1216 1.9 ichiro int overflows, floods;
1217 1.9 ichiro int s;
1218 1.9 ichiro
1219 1.9 ichiro s = splserial();
1220 1.9 ichiro COM_LOCK(sc);
1221 1.9 ichiro overflows = sc->sc_overflows;
1222 1.9 ichiro sc->sc_overflows = 0;
1223 1.9 ichiro floods = sc->sc_floods;
1224 1.9 ichiro sc->sc_floods = 0;
1225 1.9 ichiro sc->sc_errors = 0;
1226 1.9 ichiro COM_UNLOCK(sc);
1227 1.9 ichiro splx(s);
1228 1.9 ichiro
1229 1.9 ichiro printf("%s: %d silo overflow%s, %d ibuf flood%s\n",
1230 1.9 ichiro sc->sc_dev.dv_xname,
1231 1.9 ichiro overflows, overflows == 1 ? "" : "s",
1232 1.9 ichiro floods, floods == 1 ? "" : "s");
1233 1.9 ichiro }
1234 1.9 ichiro
1235 1.1 ichiro inline static void
1236 1.1 ichiro ixp4xx_com_rxsoft(struct ixp4xx_com_softc *sc, struct tty *tp)
1237 1.1 ichiro {
1238 1.1 ichiro int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint;
1239 1.1 ichiro u_char *get, *end;
1240 1.1 ichiro u_int cc, scc;
1241 1.1 ichiro u_char lsr;
1242 1.1 ichiro int code;
1243 1.1 ichiro int s;
1244 1.1 ichiro
1245 1.1 ichiro end = sc->sc_ebuf;
1246 1.1 ichiro get = sc->sc_rbget;
1247 1.1 ichiro scc = cc = IXPCOM_RING_SIZE - sc->sc_rbavail;
1248 1.1 ichiro while (cc) {
1249 1.1 ichiro code = get[0];
1250 1.1 ichiro lsr = get[1];
1251 1.9 ichiro if (ISSET(lsr, LSR_OE | LSR_FE | LSR_PE | LSR_BI)) {
1252 1.9 ichiro if (ISSET(lsr, LSR_OE)) {
1253 1.9 ichiro sc->sc_overflows++;
1254 1.9 ichiro if (sc->sc_errors++ == 0)
1255 1.9 ichiro callout_reset(&sc->sc_diag_callout,
1256 1.9 ichiro 60 * hz, ixpcomdiag, sc);
1257 1.9 ichiro }
1258 1.9 ichiro if (ISSET(lsr, LSR_BI | LSR_FE))
1259 1.1 ichiro SET(code, TTY_FE);
1260 1.1 ichiro if (ISSET(lsr, LSR_PE))
1261 1.1 ichiro SET(code, TTY_PE);
1262 1.1 ichiro }
1263 1.1 ichiro if ((*rint)(code, tp) == -1) {
1264 1.1 ichiro /*
1265 1.1 ichiro * The line discipline's buffer is out of space.
1266 1.1 ichiro */
1267 1.1 ichiro if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1268 1.1 ichiro /*
1269 1.1 ichiro * We're either not using flow control, or the
1270 1.1 ichiro * line discipline didn't tell us to block for
1271 1.1 ichiro * some reason. Either way, we have no way to
1272 1.1 ichiro * know when there's more space available, so
1273 1.1 ichiro * just drop the rest of the data.
1274 1.1 ichiro */
1275 1.1 ichiro get += cc << 1;
1276 1.1 ichiro if (get >= end)
1277 1.1 ichiro get -= IXPCOM_RING_SIZE << 1;
1278 1.1 ichiro cc = 0;
1279 1.1 ichiro } else {
1280 1.1 ichiro /*
1281 1.1 ichiro * Don't schedule any more receive processing
1282 1.1 ichiro * until the line discipline tells us there's
1283 1.1 ichiro * space available (through comhwiflow()).
1284 1.1 ichiro * Leave the rest of the data in the input
1285 1.1 ichiro * buffer.
1286 1.1 ichiro */
1287 1.1 ichiro SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1288 1.1 ichiro }
1289 1.1 ichiro break;
1290 1.1 ichiro }
1291 1.1 ichiro get += 2;
1292 1.1 ichiro if (get >= end)
1293 1.1 ichiro get = sc->sc_rbuf;
1294 1.1 ichiro cc--;
1295 1.1 ichiro }
1296 1.1 ichiro
1297 1.1 ichiro if (cc != scc) {
1298 1.1 ichiro sc->sc_rbget = get;
1299 1.1 ichiro s = splserial();
1300 1.1 ichiro COM_LOCK(sc);
1301 1.1 ichiro
1302 1.1 ichiro cc = sc->sc_rbavail += scc - cc;
1303 1.1 ichiro /* Buffers should be ok again, release possible block. */
1304 1.1 ichiro if (cc >= 1) {
1305 1.1 ichiro if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1306 1.1 ichiro CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1307 1.9 ichiro SET(sc->sc_ier, IER_RAVIE | IER_RTOIE);
1308 1.1 ichiro ixp4xx_com_set_cr(sc);
1309 1.1 ichiro }
1310 1.1 ichiro if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1311 1.1 ichiro CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1312 1.9 ichiro ixpcom_hwiflow(sc);
1313 1.1 ichiro }
1314 1.1 ichiro }
1315 1.1 ichiro COM_UNLOCK(sc);
1316 1.1 ichiro splx(s);
1317 1.1 ichiro }
1318 1.1 ichiro }
1319 1.1 ichiro
1320 1.1 ichiro int
1321 1.1 ichiro ixp4xxcomintr(void* arg)
1322 1.1 ichiro {
1323 1.1 ichiro struct ixp4xx_com_softc *sc = arg;
1324 1.1 ichiro bus_space_tag_t iot = sc->sc_iot;
1325 1.1 ichiro bus_space_handle_t ioh = sc->sc_ioh;
1326 1.1 ichiro u_char *put, *end;
1327 1.9 ichiro u_int cc;
1328 1.9 ichiro u_char iir, lsr;
1329 1.4 ichiro
1330 1.1 ichiro if (COM_ISALIVE(sc) == 0)
1331 1.1 ichiro return (0);
1332 1.1 ichiro
1333 1.1 ichiro COM_LOCK(sc);
1334 1.9 ichiro iir = bus_space_read_4(iot, ioh, IXP425_UART_IIR);
1335 1.9 ichiro if (ISSET(iir, IIR_NOPEND)) {
1336 1.1 ichiro COM_UNLOCK(sc);
1337 1.1 ichiro return (0);
1338 1.1 ichiro }
1339 1.1 ichiro
1340 1.1 ichiro end = sc->sc_ebuf;
1341 1.1 ichiro put = sc->sc_rbput;
1342 1.1 ichiro cc = sc->sc_rbavail;
1343 1.1 ichiro
1344 1.9 ichiro again: do {
1345 1.9 ichiro u_char msr;
1346 1.9 ichiro
1347 1.9 ichiro lsr = bus_space_read_4(iot, ioh, IXP425_UART_LSR);
1348 1.9 ichiro if (ISSET(lsr, LSR_BI)) {
1349 1.9 ichiro int cn_trapped = 0;
1350 1.9 ichiro
1351 1.9 ichiro cn_check_magic(sc->sc_tty->t_dev,
1352 1.9 ichiro CNC_BREAK, ixp4xx_com_cnm_state);
1353 1.9 ichiro if (cn_trapped)
1354 1.9 ichiro continue;
1355 1.9 ichiro }
1356 1.9 ichiro
1357 1.9 ichiro if (ISSET(lsr, LSR_RCV_MASK) &&
1358 1.9 ichiro !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1359 1.1 ichiro while (cc > 0) {
1360 1.9 ichiro int cn_trapped = 0;
1361 1.9 ichiro put[0] = bus_space_read_4(iot, ioh, IXP425_UART_DATA);
1362 1.9 ichiro put[1] = lsr;
1363 1.9 ichiro cn_check_magic(sc->sc_tty->t_dev,
1364 1.9 ichiro put[0], ixp4xx_com_cnm_state);
1365 1.9 ichiro if (cn_trapped) {
1366 1.9 ichiro lsr = bus_space_read_4(iot, ioh,
1367 1.9 ichiro IXP425_UART_LSR);
1368 1.9 ichiro if (!ISSET(lsr, LSR_RCV_MASK))
1369 1.9 ichiro break;
1370 1.9 ichiro
1371 1.9 ichiro continue;
1372 1.1 ichiro }
1373 1.1 ichiro put += 2;
1374 1.1 ichiro if (put >= end)
1375 1.1 ichiro put = sc->sc_rbuf;
1376 1.1 ichiro cc--;
1377 1.9 ichiro lsr = bus_space_read_4(iot, ioh, IXP425_UART_LSR);
1378 1.9 ichiro if (!ISSET(lsr, LSR_RCV_MASK))
1379 1.9 ichiro break;
1380 1.1 ichiro }
1381 1.1 ichiro
1382 1.1 ichiro /*
1383 1.1 ichiro * Current string of incoming characters ended because
1384 1.1 ichiro * no more data was available or we ran out of space.
1385 1.1 ichiro * Schedule a receive event if any data was received.
1386 1.1 ichiro * If we're out of space, turn off receive interrupts.
1387 1.1 ichiro */
1388 1.1 ichiro sc->sc_rbput = put;
1389 1.1 ichiro sc->sc_rbavail = cc;
1390 1.1 ichiro if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1391 1.1 ichiro sc->sc_rx_ready = 1;
1392 1.1 ichiro
1393 1.1 ichiro /*
1394 1.1 ichiro * See if we are in danger of overflowing a buffer. If
1395 1.1 ichiro * so, use hardware flow control to ease the pressure.
1396 1.1 ichiro */
1397 1.9 ichiro
1398 1.9 ichiro if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1399 1.9 ichiro cc < sc->sc_r_hiwat) {
1400 1.9 ichiro SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1401 1.9 ichiro ixpcom_hwiflow(sc);
1402 1.9 ichiro }
1403 1.1 ichiro
1404 1.1 ichiro /*
1405 1.1 ichiro * If we're out of space, disable receive interrupts
1406 1.1 ichiro * until the queue has drained a bit.
1407 1.1 ichiro */
1408 1.1 ichiro if (!cc) {
1409 1.1 ichiro SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1410 1.9 ichiro CLR(sc->sc_ier, IER_RAVIE | IER_RTOIE);
1411 1.1 ichiro ixp4xx_com_set_cr(sc);
1412 1.1 ichiro }
1413 1.1 ichiro } else {
1414 1.9 ichiro if ((iir & IIR_IMASK) == IIR_RXRDY) {
1415 1.9 ichiro sc->sc_ier = IER_UUE;
1416 1.9 ichiro delay(10);
1417 1.9 ichiro ixp4xx_com_set_cr(sc);
1418 1.9 ichiro }
1419 1.1 ichiro }
1420 1.9 ichiro
1421 1.9 ichiro msr = bus_space_read_4(iot, ioh, IXP425_UART_MSR);
1422 1.9 ichiro sc->sc_msr = msr;
1423 1.9 ichiro
1424 1.9 ichiro } while (ISSET((iir = bus_space_read_4(iot, ioh, IXP425_UART_IIR)),
1425 1.9 ichiro IIR_RXRDY) || ((iir & IIR_IMASK) == 0));
1426 1.1 ichiro
1427 1.1 ichiro /*
1428 1.1 ichiro * Done handling any receive interrupts. See if data can be
1429 1.1 ichiro * transmitted as well. Schedule tx done event if no data left
1430 1.1 ichiro * and tty was marked busy.
1431 1.1 ichiro */
1432 1.9 ichiro if (ISSET(lsr, LSR_TDRQ)) {
1433 1.1 ichiro /*
1434 1.1 ichiro * If we've delayed a parameter change, do it now, and restart
1435 1.1 ichiro * output.
1436 1.1 ichiro */
1437 1.1 ichiro if (sc->sc_heldchange) {
1438 1.1 ichiro ixp4xx_com_set_cr(sc);
1439 1.1 ichiro sc->sc_heldchange = 0;
1440 1.1 ichiro sc->sc_tbc = sc->sc_heldtbc;
1441 1.1 ichiro sc->sc_heldtbc = 0;
1442 1.1 ichiro }
1443 1.1 ichiro
1444 1.1 ichiro /* Output the next chunk of the contiguous buffer, if any. */
1445 1.1 ichiro if (sc->sc_tbc > 0) {
1446 1.1 ichiro ixp4xx_com_filltx(sc);
1447 1.1 ichiro } else {
1448 1.1 ichiro /* Disable transmit completion interrupts if necessary. */
1449 1.1 ichiro if (ISSET(sc->sc_ier, IER_TIE)) {
1450 1.1 ichiro CLR(sc->sc_ier, IER_TIE);
1451 1.8 ichiro ixp4xx_com_set_cr(sc);
1452 1.1 ichiro }
1453 1.1 ichiro if (sc->sc_tx_busy) {
1454 1.1 ichiro sc->sc_tx_busy = 0;
1455 1.1 ichiro sc->sc_tx_done = 1;
1456 1.1 ichiro }
1457 1.1 ichiro }
1458 1.1 ichiro }
1459 1.9 ichiro
1460 1.9 ichiro if (!ISSET((iir = bus_space_read_4(iot, ioh, IXP425_UART_IIR)), IIR_NOPEND))
1461 1.9 ichiro goto again;
1462 1.9 ichiro
1463 1.1 ichiro COM_UNLOCK(sc);
1464 1.1 ichiro
1465 1.1 ichiro /* Wake up the poller. */
1466 1.1 ichiro softintr_schedule(sc->sc_si);
1467 1.1 ichiro
1468 1.1 ichiro #if NRND > 0 && defined(RND_COM)
1469 1.1 ichiro rnd_add_uint32(&sc->rnd_source, iir | lsr);
1470 1.1 ichiro #endif
1471 1.1 ichiro return (1);
1472 1.1 ichiro }
1473 1.1 ichiro
1474 1.1 ichiro /*
1475 1.1 ichiro * Initialize UART for use as console
1476 1.1 ichiro */
1477 1.1 ichiro int
1478 1.1 ichiro ixp4xx_cominit(bus_space_tag_t iot, bus_space_handle_t ioh, int rate,
1479 1.1 ichiro int frequency, tcflag_t cflag)
1480 1.1 ichiro {
1481 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_IER, IER_UUE);
1482 1.1 ichiro
1483 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_LCR, LCR_DLAB);
1484 1.1 ichiro rate = ixp4xx_comspeed(rate, frequency);
1485 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DLL, rate);
1486 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DLH, rate >> 8);
1487 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_LCR, cflag2lcr(cflag));
1488 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_MCR, MCR_DTR | MCR_RTS);
1489 1.1 ichiro bus_space_write_4(iot, ioh, IXP425_UART_FCR,
1490 1.1 ichiro FCR_ENABLE | FCR_RESETRF | FCR_RESETTF | FCR_TRIGGER_1);
1491 1.1 ichiro
1492 1.1 ichiro return (0);
1493 1.1 ichiro }
1494 1.1 ichiro
1495 1.1 ichiro
1496 1.1 ichiro /*
1497 1.1 ichiro * There are routines needed to act as console
1498 1.1 ichiro */
1499 1.1 ichiro
1500 1.1 ichiro struct consdev ixp4xx_comcons = {
1501 1.1 ichiro NULL, NULL, ixp4xx_comcngetc, ixp4xx_comcnputc, ixp4xx_comcnpollc,
1502 1.1 ichiro NULL, NULL, NULL, NODEV, CN_NORMAL
1503 1.1 ichiro };
1504 1.1 ichiro
1505 1.1 ichiro int
1506 1.6 ichiro ixp4xx_comcnattach(bus_space_tag_t iot, const struct uart_info *config,
1507 1.6 ichiro int rate, int frequency, tcflag_t cflag)
1508 1.1 ichiro {
1509 1.6 ichiro
1510 1.6 ichiro bus_addr_t iobase = config->hw_addr;
1511 1.6 ichiro bus_space_handle_t ioh = config->v_addr;
1512 1.6 ichiro char *name = (char *)config->name;
1513 1.6 ichiro
1514 1.1 ichiro int res;
1515 1.1 ichiro res = ixp4xx_cominit(iot, ioh, rate, frequency, cflag);
1516 1.1 ichiro if (res)
1517 1.1 ichiro return (res);
1518 1.1 ichiro
1519 1.1 ichiro cn_tab = &ixp4xx_comcons;
1520 1.1 ichiro cn_init_magic(&ixp4xx_com_cnm_state);
1521 1.1 ichiro
1522 1.1 ichiro /* default magic is a couple of BREAK. */
1523 1.1 ichiro cn_set_magic("\047\001\047\001");
1524 1.1 ichiro
1525 1.1 ichiro ixp4xx_comcn_sc.sc_iot = iot;
1526 1.1 ichiro ixp4xx_comcn_sc.sc_ioh = ioh;
1527 1.1 ichiro ixp4xx_comcn_sc.sc_baseaddr = iobase;
1528 1.1 ichiro ixp4xx_comcn_sc.sc_ospeed = rate;
1529 1.1 ichiro ixp4xx_comcn_sc.sc_cflag = cflag;
1530 1.5 ichiro ixp4xx_comcn_sc.sc_name = name;
1531 1.1 ichiro return (0);
1532 1.1 ichiro }
1533 1.1 ichiro
1534 1.1 ichiro void
1535 1.7 ichiro ixp4xx_comcnputc(dev_t dev, int c)
1536 1.1 ichiro {
1537 1.1 ichiro bus_space_tag_t iot = ixp4xx_comcn_sc.sc_iot;
1538 1.1 ichiro bus_space_handle_t ioh = ixp4xx_comcn_sc.sc_ioh;
1539 1.3 ichiro int s;
1540 1.1 ichiro
1541 1.3 ichiro s = splserial();
1542 1.3 ichiro
1543 1.3 ichiro while(!(bus_space_read_4(iot, ioh, IXP425_UART_LSR) & LSR_TDRQ))
1544 1.1 ichiro ;
1545 1.1 ichiro
1546 1.3 ichiro bus_space_write_4(iot, ioh, IXP425_UART_DATA, c);
1547 1.3 ichiro
1548 1.3 ichiro splx(s);
1549 1.1 ichiro }
1550 1.1 ichiro
1551 1.1 ichiro int
1552 1.7 ichiro ixp4xx_comcngetc(dev_t dev)
1553 1.1 ichiro {
1554 1.3 ichiro int c,s;
1555 1.1 ichiro bus_space_tag_t iot = ixp4xx_comcn_sc.sc_iot;
1556 1.1 ichiro bus_space_handle_t ioh = ixp4xx_comcn_sc.sc_ioh;
1557 1.1 ichiro
1558 1.3 ichiro s = splserial();
1559 1.3 ichiro
1560 1.3 ichiro while(!(bus_space_read_4(iot, ioh, IXP425_UART_LSR) & LSR_DR))
1561 1.1 ichiro ;
1562 1.3 ichiro c = bus_space_read_4(iot, ioh, IXP425_UART_DATA);
1563 1.1 ichiro c &= 0xff;
1564 1.3 ichiro splx(s);
1565 1.1 ichiro
1566 1.1 ichiro return (c);
1567 1.1 ichiro }
1568 1.1 ichiro
1569 1.1 ichiro
1570 1.1 ichiro void
1571 1.7 ichiro ixp4xx_comcnprobe(struct consdev *cp)
1572 1.1 ichiro {
1573 1.1 ichiro cp->cn_pri = CN_REMOTE;
1574 1.1 ichiro }
1575 1.1 ichiro
1576 1.1 ichiro void
1577 1.7 ichiro ixp4xx_comcnpollc(dev_t dev, int on)
1578 1.1 ichiro {
1579 1.1 ichiro }
1580