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ixp425_pci.c revision 1.5 
      1 /*	$NetBSD: ixp425_pci.c,v 1.5 2006/04/10 03:36:03 simonb Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2003
      5  *	Ichiro FUKUHARA <ichiro (at) ichiro.org>.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Ichiro FUKUHARA.
     19  * 4. The name of the company nor the name of the author may be used to
     20  *    endorse or promote products derived from this software without specific
     21  *    prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
     27  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  */
     35 
     36 #include <sys/cdefs.h>
     37 __KERNEL_RCSID(0, "$NetBSD: ixp425_pci.c,v 1.5 2006/04/10 03:36:03 simonb Exp $");
     38 
     39 #include <sys/param.h>
     40 #include <sys/systm.h>
     41 #include <sys/device.h>
     42 #include <sys/extent.h>
     43 #include <sys/malloc.h>
     44 
     45 #include <uvm/uvm_extern.h>
     46 
     47 #include <machine/bus.h>
     48 
     49 #include <arm/xscale/ixp425reg.h>
     50 #include <arm/xscale/ixp425var.h>
     51 
     52 #include <evbarm/ixdp425/ixdp425reg.h>
     53 
     54 #include <dev/pci/pcireg.h>
     55 #include <dev/pci/pcivar.h>
     56 #include <dev/pci/pciconf.h>
     57 
     58 #include "opt_pci.h"
     59 #include "pci.h"
     60 
     61 void	ixp425_pci_attach_hook(struct device *, struct device *,
     62 	    struct pcibus_attach_args *);
     63 int	ixp425_pci_bus_maxdevs(void *, int);
     64 void	ixp425_pci_decompose_tag(void *, pcitag_t, int *, int *, int *);
     65 void	ixp425_pci_conf_setup(void *, struct ixp425_softc *, pcitag_t, int);
     66 void	ixp425_pci_conf_write(void *, pcitag_t, int, pcireg_t);
     67 pcitag_t ixp425_pci_make_tag(void *, int, int, int);
     68 pcireg_t ixp425_pci_conf_read(void *, pcitag_t, int);
     69 
     70 #define	MAX_PCI_DEVICES	32
     71 
     72 void
     73 ixp425_pci_init(struct ixp425_softc *sc)
     74 {
     75 	pci_chipset_tag_t pc = &sc->ia_pci_chipset;
     76 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
     77 	struct extent *ioext, *memext;
     78 #endif
     79 	/*
     80 	 * Initialise the PCI chipset tag
     81 	 */
     82 	pc->pc_conf_v = sc;
     83 	pc->pc_attach_hook = ixp425_pci_attach_hook;
     84 	pc->pc_bus_maxdevs = ixp425_pci_bus_maxdevs;
     85 	pc->pc_make_tag = ixp425_pci_make_tag;
     86 	pc->pc_decompose_tag = ixp425_pci_decompose_tag;
     87 	pc->pc_conf_read = ixp425_pci_conf_read;
     88 	pc->pc_conf_write = ixp425_pci_conf_write;
     89 
     90 	/*
     91 	 * Initialize the bus space tags.
     92 	 */
     93 	ixp425_io_bs_init(&sc->sc_pci_iot, sc);
     94 	ixp425_mem_bs_init(&sc->sc_pci_memt, sc);
     95 
     96 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
     97 	ioext  = extent_create("pciio", 0, IXP425_PCI_IO_SIZE - 1,
     98 				M_DEVBUF, NULL, 0, EX_NOWAIT);
     99 	/* PCI MEM space is mapped same address as real memory */
    100 	memext = extent_create("pcimem", IXP425_PCI_MEM_HWBASE,
    101 				IXP425_PCI_MEM_HWBASE +
    102 				IXP425_PCI_MEM_SIZE - 1,
    103 				M_DEVBUF, NULL, 0, EX_NOWAIT);
    104 	printf("%s: configuring PCI bus\n", sc->sc_dev.dv_xname);
    105 	pci_configure_bus(pc, ioext, memext, NULL, 0 /* XXX bus = 0 */,
    106 			  arm_dcache_align);
    107 
    108 	extent_destroy(ioext);
    109 	extent_destroy(memext);
    110 #endif
    111 }
    112 
    113 void
    114 pci_conf_interrupt(pci_chipset_tag_t pc, int a, int b, int c, int d, int *p)
    115 {
    116 }
    117 
    118 void
    119 ixp425_pci_attach_hook(struct device *parent, struct device *self,
    120 	struct pcibus_attach_args *pba)
    121 {
    122 	/* Nothing to do. */
    123 }
    124 
    125 int
    126 ixp425_pci_bus_maxdevs(void *v, int busno)
    127 {
    128 	return(MAX_PCI_DEVICES);
    129 }
    130 
    131 pcitag_t
    132 ixp425_pci_make_tag(void *v, int bus, int device, int function)
    133 {
    134 #ifdef PCI_DEBUG
    135 	printf("ixp425_pci_make_tag(v=%p, bus=%d, device=%d, function=%d)\n",
    136 		v, bus, device, function);
    137 #endif
    138 	return ((bus << 16) | (device << 11) | (function << 8));
    139 }
    140 
    141 void
    142 ixp425_pci_decompose_tag(void *v, pcitag_t tag, int *busp, int *devicep,
    143 	int *functionp)
    144 {
    145 #ifdef PCI_DEBUG
    146 	printf("ixp425_pci_decompose_tag(v=%p, tag=0x%08lx, bp=%x, dp=%x, fp=%x)\n",
    147 		v, tag, (int)busp, (int)devicep, (int)functionp);
    148 #endif
    149 	if (busp != NULL)
    150 		*busp = (tag >> 16) & 0xff;
    151 	if (devicep != NULL)
    152 		*devicep = (tag >> 11) & 0x1f;
    153 	if (functionp != NULL)
    154 		*functionp = (tag >> 8) & 0x7;
    155 }
    156 
    157 void
    158 ixp425_pci_conf_setup(void *v, struct ixp425_softc *sc, pcitag_t tag, int offset)
    159 {
    160 	int bus, device, function;
    161 
    162 	ixp425_pci_decompose_tag(v, tag, &bus, &device, &function);
    163 
    164 	if (bus == 0) {
    165 		if (device == 0 && function == 0) {
    166 			PCI_CSR_WRITE_4(sc, PCI_NP_AD, (offset & ~3));
    167 		} else {
    168 			/* configuration type 0 */
    169 			PCI_CSR_WRITE_4(sc, PCI_NP_AD, (1U << (32 - device)) |
    170 				(function << 8) | (offset & ~3));
    171 		}
    172 	} else {
    173 			/* configuration type 1 */
    174 		PCI_CSR_WRITE_4(sc, PCI_NP_AD,
    175 			(bus << 16) | (device << 11) |
    176 			(function << 8) | (offset & ~3) | 1);
    177 	}
    178 }
    179 
    180 /* read/write PCI Non-Pre-fetch Data */
    181 
    182 pcireg_t
    183 ixp425_pci_conf_read(void *v, pcitag_t tag, int offset)
    184 {
    185 	struct ixp425_softc *sc = v;
    186 	u_int32_t data;
    187 	pcireg_t rv;
    188 	int s;
    189 #define PCI_NP_HAVE_BUG
    190 #ifdef PCI_NP_HAVE_BUG
    191 	int i;
    192 #endif
    193 
    194 	PCI_CONF_LOCK(s);
    195 	ixp425_pci_conf_setup(v, sc, tag, offset);
    196 
    197 #ifdef PCI_DEBUG
    198 	printf("ixp425_pci_conf_read: tag=%lx,offset=%x\n",
    199 		tag, offset);
    200 #endif
    201 
    202 #ifdef PCI_NP_HAVE_BUG
    203 	/* PCI NP Bug workaround */
    204 	for (i = 0; i < 8; i++) {
    205 		PCI_CSR_WRITE_4(sc, PCI_NP_CBE, COMMAND_NP_CONF_READ);
    206 		rv = PCI_CSR_READ_4(sc, PCI_NP_RDATA);
    207 		rv = PCI_CSR_READ_4(sc, PCI_NP_RDATA);
    208 	}
    209 #else
    210 	PCI_CSR_WRITE_4(sc, PCI_NP_CBE, COMMAND_NP_CONF_READ);
    211 	rv = PCI_CSR_READ_4(sc, PCI_NP_RDATA);
    212 #endif
    213 
    214 	/* check&clear PCI abort */
    215 	data = PCI_CSR_READ_4(sc, PCI_ISR);
    216 	if (data & ISR_PFE) {
    217 		PCI_CSR_WRITE_4(sc, PCI_ISR, ISR_PFE);
    218 		PCI_CONF_UNLOCK(s);
    219 		return -1;
    220 	} else {
    221 		PCI_CONF_UNLOCK(s);
    222 		return rv;
    223 	}
    224 }
    225 
    226 void
    227 ixp425_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)
    228 {
    229 	struct ixp425_softc *sc = v;
    230 	u_int32_t data;
    231 	int s;
    232 
    233 	PCI_CONF_LOCK(s);
    234 
    235 	ixp425_pci_conf_setup(v, sc, tag, offset);
    236 #ifdef PCI_DEBUG
    237 	printf("ixp425_pci_conf_write: tag=%lx offset=%x <- val=%x\n",
    238 		tag, offset, val);
    239 #endif
    240 	PCI_CSR_WRITE_4(sc, PCI_NP_CBE, COMMAND_NP_CONF_WRITE);
    241 	PCI_CSR_WRITE_4(sc, PCI_NP_WDATA, val);
    242 
    243 	/* check&clear PCI abort */
    244 	data = PCI_CSR_READ_4(sc, PCI_ISR);
    245 	if (data & ISR_PFE)
    246 		PCI_CSR_WRITE_4(sc, PCI_ISR, ISR_PFE);
    247 
    248 	PCI_CONF_UNLOCK(s);
    249 }
    250 
    251 /* read/write pci configuration data */
    252 
    253 uint32_t
    254 ixp425_pci_conf_reg_read(struct ixp425_softc *sc, uint32_t reg)
    255 {
    256 	uint32_t data;
    257 
    258 	bus_space_write_4(sc->sc_iot, sc->sc_pci_ioh,
    259 		PCI_CRP_AD_CBE, ((reg & ~3) | COMMAND_CRP_READ));
    260 	data = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
    261 		PCI_CRP_AD_RDATA);
    262 
    263 	return data;
    264 }
    265 
    266 void
    267 ixp425_pci_conf_reg_write(struct ixp425_softc *sc, uint32_t reg,
    268 	uint32_t data)
    269 {
    270 	bus_space_write_4(sc->sc_iot, sc->sc_pci_ioh,
    271 		PCI_CRP_AD_CBE, ((reg & ~3) | COMMAND_CRP_WRITE));
    272 	bus_space_write_4(sc->sc_iot, sc->sc_pci_ioh,
    273 		PCI_CRP_AD_WDATA, data);
    274 }
    275