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pxa2x0.c revision 1.7
      1  1.7       bsh /*	$NetBSD: pxa2x0.c,v 1.7 2005/07/03 16:57:44 bsh Exp $ */
      2  1.1       bsh 
      3  1.1       bsh /*
      4  1.7       bsh  * Copyright (c) 2002, 2005  Genetec Corporation.  All rights reserved.
      5  1.1       bsh  * Written by Hiroyuki Bessho for Genetec Corporation.
      6  1.1       bsh  *
      7  1.1       bsh  * Redistribution and use in source and binary forms, with or without
      8  1.1       bsh  * modification, are permitted provided that the following conditions
      9  1.1       bsh  * are met:
     10  1.1       bsh  * 1. Redistributions of source code must retain the above copyright
     11  1.1       bsh  *    notice, this list of conditions and the following disclaimer.
     12  1.1       bsh  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1       bsh  *    notice, this list of conditions and the following disclaimer in the
     14  1.1       bsh  *    documentation and/or other materials provided with the distribution.
     15  1.1       bsh  * 3. All advertising materials mentioning features or use of this software
     16  1.1       bsh  *    must display the following acknowledgement:
     17  1.1       bsh  *	This product includes software developed for the NetBSD Project by
     18  1.1       bsh  *	Genetec Corporation.
     19  1.1       bsh  * 4. The name of Genetec Corporation may not be used to endorse or
     20  1.1       bsh  *    promote products derived from this software without specific prior
     21  1.1       bsh  *    written permission.
     22  1.1       bsh  *
     23  1.1       bsh  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     24  1.1       bsh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25  1.1       bsh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26  1.1       bsh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     27  1.1       bsh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28  1.1       bsh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29  1.1       bsh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30  1.1       bsh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31  1.1       bsh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32  1.1       bsh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33  1.1       bsh  * POSSIBILITY OF SUCH DAMAGE.
     34  1.1       bsh  *
     35  1.1       bsh  *
     36  1.1       bsh  * Autoconfiguration support for the Intel PXA2[15]0 application
     37  1.1       bsh  * processor. This code is derived from arm/sa11x0/sa11x0.c
     38  1.1       bsh  */
     39  1.1       bsh 
     40  1.1       bsh /*-
     41  1.1       bsh  * Copyright (c) 2001, The NetBSD Foundation, Inc.  All rights reserved.
     42  1.1       bsh  *
     43  1.1       bsh  * This code is derived from software contributed to The NetBSD Foundation
     44  1.1       bsh  * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
     45  1.1       bsh  *
     46  1.1       bsh  * Redistribution and use in source and binary forms, with or without
     47  1.1       bsh  * modification, are permitted provided that the following conditions
     48  1.1       bsh  * are met:
     49  1.1       bsh  * 1. Redistributions of source code must retain the above copyright
     50  1.1       bsh  *    notice, this list of conditions and the following disclaimer.
     51  1.1       bsh  * 2. Redistributions in binary form must reproduce the above copyright
     52  1.1       bsh  *    notice, this list of conditions and the following disclaimer in the
     53  1.1       bsh  *    documentation and/or other materials provided with the distribution.
     54  1.1       bsh  * 3. All advertising materials mentioning features or use of this software
     55  1.1       bsh  *    must display the following acknowledgement:
     56  1.1       bsh  *      This product includes software developed by the NetBSD
     57  1.1       bsh  *      Foundation, Inc. and its contributors.
     58  1.1       bsh  * 4. Neither the name of The NetBSD Foundation nor the names of its
     59  1.1       bsh  *    contributors may be used to endorse or promote products derived
     60  1.1       bsh  *    from this software without specific prior written permission.
     61  1.1       bsh  */
     62  1.1       bsh /*-
     63  1.1       bsh  * Copyright (c) 1999
     64  1.1       bsh  *         Shin Takemura and PocketBSD Project. All rights reserved.
     65  1.1       bsh  *
     66  1.1       bsh  * Redistribution and use in source and binary forms, with or without
     67  1.1       bsh  * modification, are permitted provided that the following conditions
     68  1.1       bsh  * are met:
     69  1.1       bsh  * 1. Redistributions of source code must retain the above copyright
     70  1.1       bsh  *    notice, this list of conditions and the following disclaimer.
     71  1.1       bsh  * 2. Redistributions in binary form must reproduce the above copyright
     72  1.1       bsh  *    notice, this list of conditions and the following disclaimer in the
     73  1.1       bsh  *    documentation and/or other materials provided with the distribution.
     74  1.1       bsh  * 3. All advertising materials mentioning features or use of this software
     75  1.1       bsh  *    must display the following acknowledgement:
     76  1.1       bsh  *	This product includes software developed by the PocketBSD project
     77  1.1       bsh  *	and its contributors.
     78  1.1       bsh  * 4. Neither the name of the project nor the names of its contributors
     79  1.1       bsh  *    may be used to endorse or promote products derived from this software
     80  1.1       bsh  *    without specific prior written permission.
     81  1.1       bsh  *
     82  1.1       bsh  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     83  1.1       bsh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     84  1.1       bsh  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     85  1.1       bsh  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     86  1.1       bsh  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     87  1.1       bsh  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     88  1.1       bsh  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     89  1.1       bsh  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     90  1.1       bsh  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     91  1.1       bsh  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     92  1.1       bsh  * SUCH DAMAGE.
     93  1.1       bsh  *
     94  1.1       bsh  */
     95  1.4     lukem 
     96  1.4     lukem #include <sys/cdefs.h>
     97  1.7       bsh __KERNEL_RCSID(0, "$NetBSD: pxa2x0.c,v 1.7 2005/07/03 16:57:44 bsh Exp $");
     98  1.1       bsh 
     99  1.3       scw #include "pxaintc.h"
    100  1.3       scw #include "pxagpio.h"
    101  1.3       scw #if 0
    102  1.3       scw #include "pxadmac.h"	/* Not yet */
    103  1.3       scw #endif
    104  1.3       scw 
    105  1.3       scw #include "locators.h"
    106  1.3       scw 
    107  1.1       bsh #include <sys/param.h>
    108  1.1       bsh #include <sys/systm.h>
    109  1.1       bsh #include <sys/device.h>
    110  1.1       bsh #include <sys/kernel.h>
    111  1.1       bsh #include <sys/reboot.h>
    112  1.1       bsh 
    113  1.1       bsh #include <machine/cpu.h>
    114  1.1       bsh #include <machine/bus.h>
    115  1.1       bsh 
    116  1.1       bsh #include <arm/cpufunc.h>
    117  1.1       bsh #include <arm/mainbus/mainbus.h>
    118  1.1       bsh #include <arm/xscale/pxa2x0reg.h>
    119  1.1       bsh #include <arm/xscale/pxa2x0var.h>
    120  1.7       bsh #include <arm/xscale/xscalereg.h>
    121  1.1       bsh 
    122  1.3       scw struct pxaip_softc {
    123  1.3       scw 	struct device sc_dev;
    124  1.3       scw 	bus_space_tag_t sc_bust;
    125  1.3       scw 	bus_dma_tag_t sc_dmat;
    126  1.3       scw 	bus_space_handle_t sc_bush_clk;
    127  1.3       scw };
    128  1.1       bsh 
    129  1.1       bsh /* prototypes */
    130  1.3       scw static int	pxaip_match(struct device *, struct cfdata *, void *);
    131  1.3       scw static void	pxaip_attach(struct device *, struct device *, void *);
    132  1.6  drochner static int 	pxaip_search(struct device *, struct cfdata *,
    133  1.6  drochner 			     const locdesc_t *, void *);
    134  1.3       scw static void	pxaip_attach_critical(struct pxaip_softc *);
    135  1.3       scw static int	pxaip_print(void *, const char *);
    136  1.3       scw 
    137  1.3       scw static int	pxaip_measure_cpuclock(struct pxaip_softc *);
    138  1.1       bsh 
    139  1.1       bsh /* attach structures */
    140  1.3       scw CFATTACH_DECL(pxaip, sizeof(struct pxaip_softc),
    141  1.3       scw     pxaip_match, pxaip_attach, NULL, NULL);
    142  1.1       bsh 
    143  1.3       scw static struct pxaip_softc *pxaip_sc;
    144  1.1       bsh 
    145  1.1       bsh static int
    146  1.3       scw pxaip_match(struct device *parent, struct cfdata *match, void *aux)
    147  1.1       bsh {
    148  1.1       bsh 
    149  1.1       bsh 	return 1;
    150  1.1       bsh }
    151  1.1       bsh 
    152  1.3       scw static void
    153  1.3       scw pxaip_attach(struct device *parent, struct device *self, void *aux)
    154  1.1       bsh {
    155  1.3       scw 	struct pxaip_softc *sc = (struct pxaip_softc *)self;
    156  1.3       scw 	int cpuclock;
    157  1.1       bsh 
    158  1.3       scw 	pxaip_sc = sc;
    159  1.3       scw 	sc->sc_bust = &pxa2x0_bs_tag;
    160  1.3       scw 	sc->sc_dmat = &pxa2x0_bus_dma_tag;
    161  1.3       scw 
    162  1.3       scw 	aprint_normal(": PXA2x0 Onchip Peripheral Bus\n");
    163  1.3       scw 
    164  1.3       scw 	if (bus_space_map(sc->sc_bust, PXA2X0_CLKMAN_BASE, PXA2X0_CLKMAN_SIZE,
    165  1.3       scw 	    0, &sc->sc_bush_clk))
    166  1.3       scw 		panic("pxaip_attach: failed to map CLKMAN");
    167  1.1       bsh 
    168  1.3       scw 	/*
    169  1.3       scw 	 * Calculate clock speed
    170  1.3       scw 	 * This takes 2 secs at most.
    171  1.3       scw 	 */
    172  1.3       scw 	cpuclock = pxaip_measure_cpuclock(sc) / 1000;
    173  1.3       scw 	printf("%s: CPU clock = %d.%03d MHz\n", self->dv_xname,
    174  1.3       scw 	    cpuclock/1000, cpuclock%1000 );
    175  1.1       bsh 
    176  1.1       bsh 	/*
    177  1.3       scw 	 * Attach critical devices
    178  1.1       bsh 	 */
    179  1.3       scw 	pxaip_attach_critical(sc);
    180  1.1       bsh 
    181  1.3       scw 	/*
    182  1.3       scw 	 * Attach all other devices
    183  1.3       scw 	 */
    184  1.6  drochner 	config_search_ia(pxaip_search, self, "pxaip", sc);
    185  1.1       bsh }
    186  1.1       bsh 
    187  1.3       scw static int
    188  1.6  drochner pxaip_search(struct device *parent, struct cfdata *cf,
    189  1.6  drochner 	     const locdesc_t *ldesc, void *aux)
    190  1.1       bsh {
    191  1.3       scw 	struct pxaip_softc *sc = aux;
    192  1.3       scw 	struct pxaip_attach_args aa;
    193  1.1       bsh 
    194  1.3       scw         aa.pxa_iot = sc->sc_bust;
    195  1.3       scw         aa.pxa_dmat = sc->sc_dmat;
    196  1.1       bsh         aa.pxa_addr = cf->cf_loc[PXAIPCF_ADDR];
    197  1.1       bsh         aa.pxa_size = cf->cf_loc[PXAIPCF_SIZE];
    198  1.1       bsh 	aa.pxa_index = cf->cf_loc[PXAIPCF_INDEX];
    199  1.1       bsh         aa.pxa_intr = cf->cf_loc[PXAIPCF_INTR];
    200  1.1       bsh 
    201  1.1       bsh         if (config_match(parent, cf, &aa))
    202  1.3       scw                 config_attach(parent, cf, &aa, pxaip_print);
    203  1.1       bsh 
    204  1.1       bsh         return 0;
    205  1.1       bsh }
    206  1.1       bsh 
    207  1.3       scw static void
    208  1.3       scw pxaip_attach_critical(struct pxaip_softc *sc)
    209  1.3       scw {
    210  1.3       scw 	struct pxaip_attach_args aa;
    211  1.3       scw 
    212  1.3       scw         aa.pxa_iot = sc->sc_bust;
    213  1.3       scw         aa.pxa_dmat = sc->sc_dmat;
    214  1.3       scw         aa.pxa_addr = PXA2X0_INTCTL_BASE;
    215  1.3       scw         aa.pxa_size = PXA2X0_INTCTL_SIZE;
    216  1.3       scw         aa.pxa_intr = PXAIPCF_INTR_DEFAULT;
    217  1.3       scw 	if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
    218  1.3       scw 		panic("pxaip_attach_critical: failed to attach INTC!");
    219  1.3       scw 
    220  1.3       scw #if NPXAGPIO > 0
    221  1.3       scw         aa.pxa_iot = sc->sc_bust;
    222  1.3       scw         aa.pxa_dmat = sc->sc_dmat;
    223  1.3       scw         aa.pxa_addr = PXA2X0_GPIO_BASE;
    224  1.3       scw         aa.pxa_size = PXA2X0_GPIO_SIZE;
    225  1.3       scw         aa.pxa_intr = PXAIPCF_INTR_DEFAULT;
    226  1.3       scw 	if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
    227  1.3       scw 		panic("pxaip_attach_critical: failed to attach GPIO!");
    228  1.3       scw #endif
    229  1.3       scw 
    230  1.3       scw #if NPXADMAC > 0
    231  1.3       scw         aa.pxa_iot = sc->sc_bust;
    232  1.3       scw         aa.pxa_dmat = sc->sc_dmat;
    233  1.3       scw         aa.pxa_addr = PXA2X0_DMAC_BASE;
    234  1.3       scw         aa.pxa_size = PXA2X0_DMAC_SIZE;
    235  1.3       scw         aa.pxa_intr = PXA2X0_INT_DMA;
    236  1.3       scw 	if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
    237  1.3       scw 		panic("pxaip_attach_critical: failed to attach DMAC!");
    238  1.3       scw #endif
    239  1.3       scw }
    240  1.3       scw 
    241  1.3       scw static int
    242  1.3       scw pxaip_print(void *aux, const char *name)
    243  1.3       scw {
    244  1.3       scw 	struct pxaip_attach_args *sa = (struct pxaip_attach_args*)aux;
    245  1.3       scw 
    246  1.3       scw 	if (sa->pxa_addr != PXAIPCF_ADDR_DEFAULT) {
    247  1.3       scw                 aprint_normal(" addr 0x%lx", sa->pxa_addr);
    248  1.3       scw 	        if (sa->pxa_size > PXAIPCF_SIZE_DEFAULT)
    249  1.3       scw 	                aprint_normal("-0x%lx", sa->pxa_addr + sa->pxa_size-1);
    250  1.3       scw 	}
    251  1.3       scw         if (sa->pxa_intr != PXAIPCF_INTR_DEFAULT)
    252  1.3       scw                 aprint_normal(" intr %d", sa->pxa_intr);
    253  1.3       scw 
    254  1.3       scw         return (UNCONF);
    255  1.3       scw }
    256  1.3       scw 
    257  1.1       bsh static inline uint32_t
    258  1.1       bsh read_clock_counter(void)
    259  1.1       bsh {
    260  1.1       bsh   uint32_t x;
    261  1.1       bsh   __asm __volatile("mrc	p14, 0, %0, c1, c0, 0" : "=r" (x) );
    262  1.1       bsh 
    263  1.1       bsh   return x;
    264  1.1       bsh }
    265  1.1       bsh 
    266  1.3       scw static int
    267  1.3       scw pxaip_measure_cpuclock(struct pxaip_softc *sc)
    268  1.1       bsh {
    269  1.1       bsh 	uint32_t rtc0, rtc1, start, end;
    270  1.1       bsh 	uint32_t pmcr_save;
    271  1.3       scw 	bus_space_handle_t ioh;
    272  1.3       scw 	int irq;
    273  1.3       scw 
    274  1.3       scw 	if (bus_space_map(sc->sc_bust, PXA2X0_RTC_BASE, PXA2X0_RTC_SIZE, 0,
    275  1.3       scw 	    &ioh))
    276  1.3       scw 		panic("pxaip_measure_cpuclock: can't map RTC");
    277  1.3       scw 
    278  1.3       scw 	irq = disable_interrupts(I32_bit|F32_bit);
    279  1.1       bsh 
    280  1.7       bsh 	__asm __volatile("mrc p14, 0, %0, c0, c0, 0" : "=r" (pmcr_save));
    281  1.1       bsh 	/* Enable clock counter */
    282  1.7       bsh 	__asm __volatile("mcr p14, 0, %0, c0, c0, 0" : : "r" (PMNC_E|PMNC_C));
    283  1.1       bsh 
    284  1.3       scw 	rtc0 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR);
    285  1.1       bsh 	/* Wait for next second starts */
    286  1.3       scw 	while ((rtc1 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR)) == rtc0)
    287  1.1       bsh 		;
    288  1.1       bsh 	start = read_clock_counter();
    289  1.3       scw 	while(rtc1 == bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR))
    290  1.1       bsh 		;		/* Wait for 1sec */
    291  1.1       bsh 	end = read_clock_counter();
    292  1.1       bsh 
    293  1.7       bsh 	__asm __volatile("mcr p14, 0, %0, c0, c0, 0" : : "r" (pmcr_save));
    294  1.1       bsh 	restore_interrupts(irq);
    295  1.1       bsh 
    296  1.3       scw 	bus_space_unmap(sc->sc_bust, ioh, PXA2X0_RTC_SIZE);
    297  1.3       scw 
    298  1.1       bsh 	return end - start;
    299  1.1       bsh }
    300  1.1       bsh 
    301  1.1       bsh void
    302  1.7       bsh pxa2x0_turbo_mode(int f)
    303  1.1       bsh {
    304  1.1       bsh   __asm __volatile("mcr p14, 0, %0, c6, c0, 0" : : "r" (f));
    305  1.3       scw }
    306  1.3       scw 
    307  1.3       scw void
    308  1.3       scw pxa2x0_probe_sdram(vaddr_t memctl_va, paddr_t *start, paddr_t *size)
    309  1.3       scw {
    310  1.3       scw 	u_int32_t mdcnfg, dwid, dcac, drac, dnb;
    311  1.3       scw 	int i;
    312  1.3       scw 
    313  1.3       scw 	mdcnfg = *((volatile u_int32_t *)(memctl_va + MEMCTL_MDCNFG));
    314  1.3       scw 
    315  1.3       scw 	/*
    316  1.3       scw 	 * Scan all 4 SDRAM banks
    317  1.3       scw 	 */
    318  1.3       scw 	for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
    319  1.3       scw 		start[i] = 0;
    320  1.3       scw 		size[i] = 0;
    321  1.3       scw 
    322  1.3       scw 		switch (i) {
    323  1.3       scw 		case 0:
    324  1.3       scw 		case 1:
    325  1.3       scw 			if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) ||
    326  1.3       scw 			    (i == 1 && (mdcnfg & MDCNFG_DE1) == 0))
    327  1.3       scw 				continue;
    328  1.3       scw 			dwid = mdcnfg >> MDCNFD_DWID01_SHIFT;
    329  1.3       scw 			dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT;
    330  1.3       scw 			drac = mdcnfg >> MDCNFD_DRAC01_SHIFT;
    331  1.3       scw 			dnb = mdcnfg >> MDCNFD_DNB01_SHIFT;
    332  1.3       scw 			break;
    333  1.3       scw 
    334  1.3       scw 		case 2:
    335  1.3       scw 		case 3:
    336  1.3       scw 			if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) ||
    337  1.3       scw 			    (i == 3 && (mdcnfg & MDCNFG_DE3) == 0))
    338  1.3       scw 				continue;
    339  1.3       scw 			dwid = mdcnfg >> MDCNFD_DWID23_SHIFT;
    340  1.3       scw 			dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT;
    341  1.3       scw 			drac = mdcnfg >> MDCNFD_DRAC23_SHIFT;
    342  1.3       scw 			dnb = mdcnfg >> MDCNFD_DNB23_SHIFT;
    343  1.3       scw 			break;
    344  1.5   thorpej 		default:
    345  1.5   thorpej 			panic("pxa2x0_probe_sdram: impossible");
    346  1.3       scw 		}
    347  1.3       scw 
    348  1.3       scw 		dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK));  /* 16/32 width */
    349  1.3       scw 		dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8);  /* 8-11 columns */
    350  1.3       scw 		drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */
    351  1.3       scw 		dnb = 2 << (dnb & MDCNFD_DNB_MASK);	      /* # of banks */
    352  1.3       scw 
    353  1.3       scw 		size[i] = (paddr_t)(dwid * dcac * drac * dnb);
    354  1.3       scw 		start[i] = PXA2X0_SDRAM0_START + (i * PXA2X0_SDRAM_BANK_SIZE);
    355  1.3       scw 	}
    356  1.3       scw }
    357  1.3       scw 
    358  1.3       scw void
    359  1.3       scw pxa2x0_clkman_config(u_int clk, boolean_t enable)
    360  1.3       scw {
    361  1.3       scw 	struct pxaip_softc *sc;
    362  1.3       scw 	u_int32_t rv;
    363  1.3       scw 
    364  1.3       scw 	KDASSERT(pxaip_sc != NULL);
    365  1.3       scw 	sc = pxaip_sc;
    366  1.3       scw 
    367  1.3       scw 	rv = bus_space_read_4(sc->sc_bust, sc->sc_bush_clk, CLKMAN_CKEN);
    368  1.3       scw 	rv &= ~clk;
    369  1.3       scw 
    370  1.3       scw 	if (enable)
    371  1.3       scw 		rv |= clk;
    372  1.3       scw 
    373  1.3       scw 	bus_space_write_4(sc->sc_bust, sc->sc_bush_clk, CLKMAN_CKEN, rv);
    374  1.1       bsh }
    375