pxa2x0.c revision 1.7 1 /* $NetBSD: pxa2x0.c,v 1.7 2005/07/03 16:57:44 bsh Exp $ */
2
3 /*
4 * Copyright (c) 2002, 2005 Genetec Corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec Corporation.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed for the NetBSD Project by
18 * Genetec Corporation.
19 * 4. The name of Genetec Corporation may not be used to endorse or
20 * promote products derived from this software without specific prior
21 * written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 *
35 *
36 * Autoconfiguration support for the Intel PXA2[15]0 application
37 * processor. This code is derived from arm/sa11x0/sa11x0.c
38 */
39
40 /*-
41 * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
42 *
43 * This code is derived from software contributed to The NetBSD Foundation
44 * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
45 *
46 * Redistribution and use in source and binary forms, with or without
47 * modification, are permitted provided that the following conditions
48 * are met:
49 * 1. Redistributions of source code must retain the above copyright
50 * notice, this list of conditions and the following disclaimer.
51 * 2. Redistributions in binary form must reproduce the above copyright
52 * notice, this list of conditions and the following disclaimer in the
53 * documentation and/or other materials provided with the distribution.
54 * 3. All advertising materials mentioning features or use of this software
55 * must display the following acknowledgement:
56 * This product includes software developed by the NetBSD
57 * Foundation, Inc. and its contributors.
58 * 4. Neither the name of The NetBSD Foundation nor the names of its
59 * contributors may be used to endorse or promote products derived
60 * from this software without specific prior written permission.
61 */
62 /*-
63 * Copyright (c) 1999
64 * Shin Takemura and PocketBSD Project. All rights reserved.
65 *
66 * Redistribution and use in source and binary forms, with or without
67 * modification, are permitted provided that the following conditions
68 * are met:
69 * 1. Redistributions of source code must retain the above copyright
70 * notice, this list of conditions and the following disclaimer.
71 * 2. Redistributions in binary form must reproduce the above copyright
72 * notice, this list of conditions and the following disclaimer in the
73 * documentation and/or other materials provided with the distribution.
74 * 3. All advertising materials mentioning features or use of this software
75 * must display the following acknowledgement:
76 * This product includes software developed by the PocketBSD project
77 * and its contributors.
78 * 4. Neither the name of the project nor the names of its contributors
79 * may be used to endorse or promote products derived from this software
80 * without specific prior written permission.
81 *
82 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
83 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
84 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
85 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
86 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
87 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
88 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
89 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
90 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
91 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
92 * SUCH DAMAGE.
93 *
94 */
95
96 #include <sys/cdefs.h>
97 __KERNEL_RCSID(0, "$NetBSD: pxa2x0.c,v 1.7 2005/07/03 16:57:44 bsh Exp $");
98
99 #include "pxaintc.h"
100 #include "pxagpio.h"
101 #if 0
102 #include "pxadmac.h" /* Not yet */
103 #endif
104
105 #include "locators.h"
106
107 #include <sys/param.h>
108 #include <sys/systm.h>
109 #include <sys/device.h>
110 #include <sys/kernel.h>
111 #include <sys/reboot.h>
112
113 #include <machine/cpu.h>
114 #include <machine/bus.h>
115
116 #include <arm/cpufunc.h>
117 #include <arm/mainbus/mainbus.h>
118 #include <arm/xscale/pxa2x0reg.h>
119 #include <arm/xscale/pxa2x0var.h>
120 #include <arm/xscale/xscalereg.h>
121
122 struct pxaip_softc {
123 struct device sc_dev;
124 bus_space_tag_t sc_bust;
125 bus_dma_tag_t sc_dmat;
126 bus_space_handle_t sc_bush_clk;
127 };
128
129 /* prototypes */
130 static int pxaip_match(struct device *, struct cfdata *, void *);
131 static void pxaip_attach(struct device *, struct device *, void *);
132 static int pxaip_search(struct device *, struct cfdata *,
133 const locdesc_t *, void *);
134 static void pxaip_attach_critical(struct pxaip_softc *);
135 static int pxaip_print(void *, const char *);
136
137 static int pxaip_measure_cpuclock(struct pxaip_softc *);
138
139 /* attach structures */
140 CFATTACH_DECL(pxaip, sizeof(struct pxaip_softc),
141 pxaip_match, pxaip_attach, NULL, NULL);
142
143 static struct pxaip_softc *pxaip_sc;
144
145 static int
146 pxaip_match(struct device *parent, struct cfdata *match, void *aux)
147 {
148
149 return 1;
150 }
151
152 static void
153 pxaip_attach(struct device *parent, struct device *self, void *aux)
154 {
155 struct pxaip_softc *sc = (struct pxaip_softc *)self;
156 int cpuclock;
157
158 pxaip_sc = sc;
159 sc->sc_bust = &pxa2x0_bs_tag;
160 sc->sc_dmat = &pxa2x0_bus_dma_tag;
161
162 aprint_normal(": PXA2x0 Onchip Peripheral Bus\n");
163
164 if (bus_space_map(sc->sc_bust, PXA2X0_CLKMAN_BASE, PXA2X0_CLKMAN_SIZE,
165 0, &sc->sc_bush_clk))
166 panic("pxaip_attach: failed to map CLKMAN");
167
168 /*
169 * Calculate clock speed
170 * This takes 2 secs at most.
171 */
172 cpuclock = pxaip_measure_cpuclock(sc) / 1000;
173 printf("%s: CPU clock = %d.%03d MHz\n", self->dv_xname,
174 cpuclock/1000, cpuclock%1000 );
175
176 /*
177 * Attach critical devices
178 */
179 pxaip_attach_critical(sc);
180
181 /*
182 * Attach all other devices
183 */
184 config_search_ia(pxaip_search, self, "pxaip", sc);
185 }
186
187 static int
188 pxaip_search(struct device *parent, struct cfdata *cf,
189 const locdesc_t *ldesc, void *aux)
190 {
191 struct pxaip_softc *sc = aux;
192 struct pxaip_attach_args aa;
193
194 aa.pxa_iot = sc->sc_bust;
195 aa.pxa_dmat = sc->sc_dmat;
196 aa.pxa_addr = cf->cf_loc[PXAIPCF_ADDR];
197 aa.pxa_size = cf->cf_loc[PXAIPCF_SIZE];
198 aa.pxa_index = cf->cf_loc[PXAIPCF_INDEX];
199 aa.pxa_intr = cf->cf_loc[PXAIPCF_INTR];
200
201 if (config_match(parent, cf, &aa))
202 config_attach(parent, cf, &aa, pxaip_print);
203
204 return 0;
205 }
206
207 static void
208 pxaip_attach_critical(struct pxaip_softc *sc)
209 {
210 struct pxaip_attach_args aa;
211
212 aa.pxa_iot = sc->sc_bust;
213 aa.pxa_dmat = sc->sc_dmat;
214 aa.pxa_addr = PXA2X0_INTCTL_BASE;
215 aa.pxa_size = PXA2X0_INTCTL_SIZE;
216 aa.pxa_intr = PXAIPCF_INTR_DEFAULT;
217 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
218 panic("pxaip_attach_critical: failed to attach INTC!");
219
220 #if NPXAGPIO > 0
221 aa.pxa_iot = sc->sc_bust;
222 aa.pxa_dmat = sc->sc_dmat;
223 aa.pxa_addr = PXA2X0_GPIO_BASE;
224 aa.pxa_size = PXA2X0_GPIO_SIZE;
225 aa.pxa_intr = PXAIPCF_INTR_DEFAULT;
226 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
227 panic("pxaip_attach_critical: failed to attach GPIO!");
228 #endif
229
230 #if NPXADMAC > 0
231 aa.pxa_iot = sc->sc_bust;
232 aa.pxa_dmat = sc->sc_dmat;
233 aa.pxa_addr = PXA2X0_DMAC_BASE;
234 aa.pxa_size = PXA2X0_DMAC_SIZE;
235 aa.pxa_intr = PXA2X0_INT_DMA;
236 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
237 panic("pxaip_attach_critical: failed to attach DMAC!");
238 #endif
239 }
240
241 static int
242 pxaip_print(void *aux, const char *name)
243 {
244 struct pxaip_attach_args *sa = (struct pxaip_attach_args*)aux;
245
246 if (sa->pxa_addr != PXAIPCF_ADDR_DEFAULT) {
247 aprint_normal(" addr 0x%lx", sa->pxa_addr);
248 if (sa->pxa_size > PXAIPCF_SIZE_DEFAULT)
249 aprint_normal("-0x%lx", sa->pxa_addr + sa->pxa_size-1);
250 }
251 if (sa->pxa_intr != PXAIPCF_INTR_DEFAULT)
252 aprint_normal(" intr %d", sa->pxa_intr);
253
254 return (UNCONF);
255 }
256
257 static inline uint32_t
258 read_clock_counter(void)
259 {
260 uint32_t x;
261 __asm __volatile("mrc p14, 0, %0, c1, c0, 0" : "=r" (x) );
262
263 return x;
264 }
265
266 static int
267 pxaip_measure_cpuclock(struct pxaip_softc *sc)
268 {
269 uint32_t rtc0, rtc1, start, end;
270 uint32_t pmcr_save;
271 bus_space_handle_t ioh;
272 int irq;
273
274 if (bus_space_map(sc->sc_bust, PXA2X0_RTC_BASE, PXA2X0_RTC_SIZE, 0,
275 &ioh))
276 panic("pxaip_measure_cpuclock: can't map RTC");
277
278 irq = disable_interrupts(I32_bit|F32_bit);
279
280 __asm __volatile("mrc p14, 0, %0, c0, c0, 0" : "=r" (pmcr_save));
281 /* Enable clock counter */
282 __asm __volatile("mcr p14, 0, %0, c0, c0, 0" : : "r" (PMNC_E|PMNC_C));
283
284 rtc0 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR);
285 /* Wait for next second starts */
286 while ((rtc1 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR)) == rtc0)
287 ;
288 start = read_clock_counter();
289 while(rtc1 == bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR))
290 ; /* Wait for 1sec */
291 end = read_clock_counter();
292
293 __asm __volatile("mcr p14, 0, %0, c0, c0, 0" : : "r" (pmcr_save));
294 restore_interrupts(irq);
295
296 bus_space_unmap(sc->sc_bust, ioh, PXA2X0_RTC_SIZE);
297
298 return end - start;
299 }
300
301 void
302 pxa2x0_turbo_mode(int f)
303 {
304 __asm __volatile("mcr p14, 0, %0, c6, c0, 0" : : "r" (f));
305 }
306
307 void
308 pxa2x0_probe_sdram(vaddr_t memctl_va, paddr_t *start, paddr_t *size)
309 {
310 u_int32_t mdcnfg, dwid, dcac, drac, dnb;
311 int i;
312
313 mdcnfg = *((volatile u_int32_t *)(memctl_va + MEMCTL_MDCNFG));
314
315 /*
316 * Scan all 4 SDRAM banks
317 */
318 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
319 start[i] = 0;
320 size[i] = 0;
321
322 switch (i) {
323 case 0:
324 case 1:
325 if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) ||
326 (i == 1 && (mdcnfg & MDCNFG_DE1) == 0))
327 continue;
328 dwid = mdcnfg >> MDCNFD_DWID01_SHIFT;
329 dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT;
330 drac = mdcnfg >> MDCNFD_DRAC01_SHIFT;
331 dnb = mdcnfg >> MDCNFD_DNB01_SHIFT;
332 break;
333
334 case 2:
335 case 3:
336 if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) ||
337 (i == 3 && (mdcnfg & MDCNFG_DE3) == 0))
338 continue;
339 dwid = mdcnfg >> MDCNFD_DWID23_SHIFT;
340 dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT;
341 drac = mdcnfg >> MDCNFD_DRAC23_SHIFT;
342 dnb = mdcnfg >> MDCNFD_DNB23_SHIFT;
343 break;
344 default:
345 panic("pxa2x0_probe_sdram: impossible");
346 }
347
348 dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK)); /* 16/32 width */
349 dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8); /* 8-11 columns */
350 drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */
351 dnb = 2 << (dnb & MDCNFD_DNB_MASK); /* # of banks */
352
353 size[i] = (paddr_t)(dwid * dcac * drac * dnb);
354 start[i] = PXA2X0_SDRAM0_START + (i * PXA2X0_SDRAM_BANK_SIZE);
355 }
356 }
357
358 void
359 pxa2x0_clkman_config(u_int clk, boolean_t enable)
360 {
361 struct pxaip_softc *sc;
362 u_int32_t rv;
363
364 KDASSERT(pxaip_sc != NULL);
365 sc = pxaip_sc;
366
367 rv = bus_space_read_4(sc->sc_bust, sc->sc_bush_clk, CLKMAN_CKEN);
368 rv &= ~clk;
369
370 if (enable)
371 rv |= clk;
372
373 bus_space_write_4(sc->sc_bust, sc->sc_bush_clk, CLKMAN_CKEN, rv);
374 }
375