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pxa2x0_ac97.c revision 1.1.4.2
      1  1.1.4.2  yamt /*	$NetBSD: pxa2x0_ac97.c,v 1.1.4.2 2007/02/26 09:06:06 yamt Exp $	*/
      2      1.1   scw 
      3      1.1   scw /*
      4      1.1   scw  * Copyright (c) 2003, 2005 Wasabi Systems, Inc.
      5      1.1   scw  * All rights reserved.
      6      1.1   scw  *
      7      1.1   scw  * Written by Steve C. Woodford for Wasabi Systems, Inc.
      8      1.1   scw  *
      9      1.1   scw  * Redistribution and use in source and binary forms, with or without
     10      1.1   scw  * modification, are permitted provided that the following conditions
     11      1.1   scw  * are met:
     12      1.1   scw  * 1. Redistributions of source code must retain the above copyright
     13      1.1   scw  *    notice, this list of conditions and the following disclaimer.
     14      1.1   scw  * 2. Redistributions in binary form must reproduce the above copyright
     15      1.1   scw  *    notice, this list of conditions and the following disclaimer in the
     16      1.1   scw  *    documentation and/or other materials provided with the distribution.
     17      1.1   scw  * 3. All advertising materials mentioning features or use of this software
     18      1.1   scw  *    must display the following acknowledgement:
     19      1.1   scw  *	This product includes software developed for the NetBSD Project by
     20      1.1   scw  *	Wasabi Systems, Inc.
     21      1.1   scw  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22      1.1   scw  *    or promote products derived from this software without specific prior
     23      1.1   scw  *    written permission.
     24      1.1   scw  *
     25      1.1   scw  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26      1.1   scw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27      1.1   scw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28      1.1   scw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29      1.1   scw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30      1.1   scw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31      1.1   scw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32      1.1   scw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33      1.1   scw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34      1.1   scw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35      1.1   scw  * POSSIBILITY OF SUCH DAMAGE.
     36      1.1   scw  */
     37      1.1   scw 
     38      1.1   scw #include <sys/param.h>
     39      1.1   scw #include <sys/systm.h>
     40      1.1   scw #include <sys/device.h>
     41      1.1   scw #include <sys/kernel.h>
     42      1.1   scw #include <sys/malloc.h>
     43      1.1   scw #include <sys/select.h>
     44      1.1   scw #include <sys/audioio.h>
     45      1.1   scw 
     46      1.1   scw #include <machine/intr.h>
     47      1.1   scw #include <machine/bus.h>
     48      1.1   scw 
     49      1.1   scw #include <dev/audio_if.h>
     50      1.1   scw #include <dev/audiovar.h>
     51      1.1   scw #include <dev/mulaw.h>
     52      1.1   scw #include <dev/auconv.h>
     53      1.1   scw #include <dev/ic/ac97reg.h>
     54      1.1   scw #include <dev/ic/ac97var.h>
     55      1.1   scw 
     56      1.1   scw #include <arm/xscale/pxa2x0reg.h>
     57      1.1   scw #include <arm/xscale/pxa2x0var.h>
     58      1.1   scw #include <arm/xscale/pxa2x0_gpio.h>
     59      1.1   scw #include <arm/xscale/pxa2x0_dmac.h>
     60      1.1   scw 
     61      1.1   scw #include "locators.h"
     62      1.1   scw 
     63      1.1   scw struct acu_dma {
     64      1.1   scw 	bus_dmamap_t ad_map;
     65      1.1   scw 	caddr_t ad_addr;
     66      1.1   scw #define	ACU_N_SEGS	1	/* XXX: We don't support > 1 */
     67      1.1   scw 	bus_dma_segment_t ad_segs[ACU_N_SEGS];
     68      1.1   scw 	int ad_nsegs;
     69      1.1   scw 	size_t ad_size;
     70      1.1   scw 	struct dmac_xfer *ad_dx;
     71      1.1   scw 	struct acu_dma *ad_next;
     72      1.1   scw };
     73      1.1   scw 
     74      1.1   scw #define KERNADDR(ad) ((void *)((ad)->ad_addr))
     75      1.1   scw 
     76      1.1   scw struct acu_softc {
     77      1.1   scw 	struct device sc_dev;
     78      1.1   scw 	bus_space_tag_t sc_bust;
     79      1.1   scw 	bus_dma_tag_t sc_dmat;
     80      1.1   scw 	bus_space_handle_t sc_bush;
     81      1.1   scw 	void *sc_irqcookie;
     82      1.1   scw 	int sc_in_reset;
     83      1.1   scw 	u_int sc_dac_rate;
     84      1.1   scw 	u_int sc_adc_rate;
     85      1.1   scw 
     86      1.1   scw 	/* List of DMA ring-buffers allocated by acu_malloc() */
     87      1.1   scw 	struct acu_dma *sc_dmas;
     88      1.1   scw 
     89      1.1   scw 	/* Dummy DMA segment which points to the AC97 PCM Fifo register */
     90      1.1   scw 	bus_dma_segment_t sc_dr;
     91      1.1   scw 
     92      1.1   scw 	/* PCM Output (Tx) state */
     93      1.1   scw 	dmac_peripheral_t sc_txp;
     94      1.1   scw 	struct acu_dma *sc_txdma;
     95      1.1   scw 	void (*sc_txfunc)(void *);
     96      1.1   scw 	void *sc_txarg;
     97      1.1   scw 
     98      1.1   scw 	/* PCM Input (Rx) state */
     99      1.1   scw 	dmac_peripheral_t sc_rxp;
    100      1.1   scw 	struct acu_dma *sc_rxdma;
    101      1.1   scw 	void (*sc_rxfunc)(void *);
    102      1.1   scw 	void *sc_rxarg;
    103      1.1   scw 
    104      1.1   scw 	/* AC97 Codec State */
    105      1.1   scw 	struct ac97_codec_if *sc_codec_if;
    106      1.1   scw 	struct ac97_host_if sc_host_if;
    107      1.1   scw 
    108      1.1   scw 	/* Child audio(4) device */
    109      1.1   scw 	struct device *sc_audiodev;
    110      1.1   scw 
    111      1.1   scw 	/* auconv encodings */
    112      1.1   scw 	struct audio_encoding_set *sc_encodings;
    113      1.1   scw };
    114      1.1   scw 
    115      1.1   scw static int	pxaacu_match(struct device *, struct cfdata *, void *);
    116      1.1   scw static void	pxaacu_attach(struct device *, struct device *, void *);
    117      1.1   scw 
    118      1.1   scw CFATTACH_DECL(pxaacu, sizeof(struct acu_softc),
    119      1.1   scw     pxaacu_match, pxaacu_attach, NULL, NULL);
    120      1.1   scw 
    121      1.1   scw static int acu_codec_attach(void *, struct ac97_codec_if *);
    122      1.1   scw static int acu_codec_read(void *, u_int8_t, u_int16_t *);
    123      1.1   scw static int acu_codec_write(void *, u_int8_t, u_int16_t);
    124      1.1   scw static int acu_codec_reset(void *);
    125      1.1   scw static int acu_intr(void *);
    126      1.1   scw 
    127      1.1   scw static int acu_open(void *, int);
    128      1.1   scw static void acu_close(void *);
    129      1.1   scw static int acu_query_encoding(void *, struct audio_encoding *);
    130      1.1   scw static int acu_set_params(void *, int, int, audio_params_t *, audio_params_t *,
    131      1.1   scw 	    stream_filter_list_t *, stream_filter_list_t *);
    132      1.1   scw static int acu_round_blocksize(void *, int, int, const audio_params_t *);
    133      1.1   scw static int acu_halt_output(void *);
    134      1.1   scw static int acu_halt_input(void *);
    135      1.1   scw static int acu_trigger_output(void *, void *, void *, int, void (*)(void *),
    136      1.1   scw 	    void *, const audio_params_t *);
    137      1.1   scw static int acu_trigger_input(void *, void *, void *, int, void (*)(void *),
    138      1.1   scw 	    void *, const audio_params_t *);
    139      1.1   scw static void acu_tx_loop_segment(struct dmac_xfer *, int);
    140      1.1   scw static void acu_rx_loop_segment(struct dmac_xfer *, int);
    141      1.1   scw static int acu_getdev(void *, struct audio_device *);
    142      1.1   scw static int acu_mixer_set_port(void *, mixer_ctrl_t *);
    143      1.1   scw static int acu_mixer_get_port(void *, mixer_ctrl_t *);
    144      1.1   scw static int acu_query_devinfo(void *, mixer_devinfo_t *);
    145      1.1   scw static void *acu_malloc(void *, int, size_t, struct malloc_type *, int);
    146      1.1   scw static void acu_free(void *, void *, struct malloc_type *);
    147      1.1   scw static size_t acu_round_buffersize(void *, int, size_t);
    148      1.1   scw static paddr_t acu_mappage(void *, void *, off_t, int);
    149      1.1   scw static int acu_get_props(void *);
    150      1.1   scw 
    151      1.1   scw struct audio_hw_if acu_hw_if = {
    152      1.1   scw 	acu_open,
    153      1.1   scw 	acu_close,
    154      1.1   scw 	NULL,
    155      1.1   scw 	acu_query_encoding,
    156      1.1   scw 	acu_set_params,
    157      1.1   scw 	acu_round_blocksize,
    158      1.1   scw 	NULL,
    159      1.1   scw 	NULL,
    160      1.1   scw 	NULL,
    161      1.1   scw 	NULL,
    162      1.1   scw 	NULL,
    163      1.1   scw 	acu_halt_output,
    164      1.1   scw 	acu_halt_input,
    165      1.1   scw 	NULL,
    166      1.1   scw 	acu_getdev,
    167      1.1   scw 	NULL,
    168      1.1   scw 	acu_mixer_set_port,
    169      1.1   scw 	acu_mixer_get_port,
    170      1.1   scw 	acu_query_devinfo,
    171      1.1   scw 	acu_malloc,
    172      1.1   scw 	acu_free,
    173      1.1   scw 	acu_round_buffersize,
    174      1.1   scw 	acu_mappage,
    175      1.1   scw 	acu_get_props,
    176      1.1   scw 	acu_trigger_output,
    177      1.1   scw 	acu_trigger_input,
    178      1.1   scw 	NULL,
    179      1.1   scw };
    180      1.1   scw 
    181      1.1   scw struct audio_device acu_device = {
    182      1.1   scw 	"PXA250 AC97",
    183      1.1   scw 	"",
    184      1.1   scw 	"acu"
    185      1.1   scw };
    186      1.1   scw 
    187      1.1   scw static const struct audio_format acu_formats[] = {
    188      1.1   scw 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    189      1.1   scw 	 2, AUFMT_STEREO, 0, {4000, 48000}}
    190      1.1   scw };
    191      1.1   scw #define	ACU_NFORMATS	(sizeof(acu_formats) / sizeof(struct audio_format))
    192      1.1   scw 
    193  1.1.4.1  yamt static inline u_int32_t
    194      1.1   scw acu_reg_read(struct acu_softc *sc, int reg)
    195      1.1   scw {
    196      1.1   scw 
    197      1.1   scw 	return (bus_space_read_4(sc->sc_bust, sc->sc_bush, reg));
    198      1.1   scw }
    199      1.1   scw 
    200  1.1.4.1  yamt static inline void
    201      1.1   scw acu_reg_write(struct acu_softc *sc, int reg, u_int32_t val)
    202      1.1   scw {
    203      1.1   scw 
    204      1.1   scw 	bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);
    205      1.1   scw }
    206      1.1   scw 
    207  1.1.4.1  yamt static inline int
    208      1.1   scw acu_codec_ready(struct acu_softc *sc)
    209      1.1   scw {
    210      1.1   scw 
    211      1.1   scw 	return (acu_reg_read(sc, AC97_GSR) & GSR_PCR);
    212      1.1   scw }
    213      1.1   scw 
    214  1.1.4.1  yamt static inline int
    215      1.1   scw acu_wait_gsr(struct acu_softc *sc, u_int32_t bit)
    216      1.1   scw {
    217      1.1   scw 	int timeout;
    218      1.1   scw 	u_int32_t rv;
    219      1.1   scw 
    220      1.1   scw 	for (timeout = 5000; timeout; timeout--) {
    221      1.1   scw 		if ((rv = acu_reg_read(sc, AC97_GSR)) & bit) {
    222      1.1   scw 			acu_reg_write(sc, AC97_GSR, rv | bit);
    223      1.1   scw 			return (0);
    224      1.1   scw 		}
    225      1.1   scw 		delay(1);
    226      1.1   scw 	}
    227      1.1   scw 
    228      1.1   scw 	return (1);
    229      1.1   scw }
    230      1.1   scw 
    231      1.1   scw static int
    232      1.1   scw pxaacu_match(struct device *parent, struct cfdata *cf, void *aux)
    233      1.1   scw {
    234      1.1   scw 	struct pxaip_attach_args *pxa = aux;
    235      1.1   scw 
    236      1.1   scw 	if (pxa->pxa_addr != PXA2X0_AC97_BASE ||
    237      1.1   scw 	    pxa->pxa_intr != PXA2X0_INT_AC97)
    238      1.1   scw 		return (0);
    239      1.1   scw 
    240      1.1   scw 	pxa->pxa_size = PXA2X0_AC97_SIZE;
    241      1.1   scw 
    242      1.1   scw 	return (1);
    243      1.1   scw }
    244      1.1   scw 
    245      1.1   scw static void
    246      1.1   scw pxaacu_attach(struct device *parent, struct device *self, void *aux)
    247      1.1   scw {
    248      1.1   scw 	struct acu_softc *sc = (struct acu_softc *)self;
    249      1.1   scw 	struct pxaip_attach_args *pxa = aux;
    250      1.1   scw 
    251      1.1   scw 	sc->sc_bust = pxa->pxa_iot;
    252      1.1   scw 	sc->sc_dmat = pxa->pxa_dmat;
    253      1.1   scw 
    254      1.1   scw 	aprint_naive("\n");
    255      1.1   scw 	aprint_normal(": AC97 Controller\n");
    256      1.1   scw 
    257      1.1   scw 	if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0,
    258      1.1   scw 	    &sc->sc_bush)) {
    259      1.1   scw 		aprint_error("%s: Can't map registers!\n", sc->sc_dev.dv_xname);
    260      1.1   scw 		return;
    261      1.1   scw 	}
    262      1.1   scw 
    263      1.1   scw 	sc->sc_irqcookie = pxa2x0_intr_establish(pxa->pxa_intr, IPL_AUDIO,
    264      1.1   scw 	    acu_intr, sc);
    265      1.1   scw 	KASSERT(sc->sc_irqcookie != NULL);
    266      1.1   scw 
    267      1.1   scw 	/* Make sure the AC97 clock is enabled */
    268  1.1.4.2  yamt 	pxa2x0_clkman_config(CKEN_AC97, true);
    269      1.1   scw 	delay(100);
    270      1.1   scw 	pxa2x0_gpio_set_function(31, GPIO_CLR | GPIO_ALT_FN_2_OUT);
    271      1.1   scw 	pxa2x0_gpio_set_function(30, GPIO_CLR | GPIO_ALT_FN_2_OUT);
    272      1.1   scw 	pxa2x0_gpio_set_function(28, GPIO_CLR | GPIO_ALT_FN_1_IN);
    273      1.1   scw 	pxa2x0_gpio_set_function(29, GPIO_CLR | GPIO_ALT_FN_1_IN);
    274      1.1   scw 	delay(100);
    275      1.1   scw 
    276      1.1   scw 	/* Do a cold reset */
    277      1.1   scw 	acu_reg_write(sc, AC97_GCR, 0);
    278      1.1   scw 	delay(100);
    279      1.1   scw 	acu_reg_write(sc, AC97_GCR, GCR_COLD_RST);
    280      1.1   scw 	delay(100);
    281      1.1   scw 	acu_reg_write(sc, AC97_CAR, 0);
    282      1.1   scw 
    283      1.1   scw 	if (acu_wait_gsr(sc, GSR_PCR)) {
    284      1.1   scw 		acu_reg_write(sc, AC97_GCR, 0);
    285      1.1   scw 		delay(100);
    286  1.1.4.2  yamt 		pxa2x0_clkman_config(CKEN_AC97, false);
    287      1.1   scw 		bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size);
    288      1.1   scw 		aprint_error("%s: Primary codec not ready\n",
    289      1.1   scw 		    sc->sc_dev.dv_xname);
    290      1.1   scw 		return;
    291      1.1   scw 	}
    292      1.1   scw 
    293      1.1   scw 	sc->sc_dr.ds_addr = pxa->pxa_addr + AC97_PCDR;
    294      1.1   scw 	sc->sc_dr.ds_len = 4;
    295      1.1   scw 
    296      1.1   scw 	sc->sc_codec_if = NULL;
    297      1.1   scw 	sc->sc_host_if.arg = sc;
    298      1.1   scw 	sc->sc_host_if.attach = acu_codec_attach;
    299      1.1   scw 	sc->sc_host_if.read = acu_codec_read;
    300      1.1   scw 	sc->sc_host_if.write = acu_codec_write;
    301      1.1   scw 	sc->sc_host_if.reset = acu_codec_reset;
    302      1.1   scw 	sc->sc_host_if.flags = NULL;
    303      1.1   scw 	sc->sc_in_reset = 0;
    304      1.1   scw 	sc->sc_dac_rate = sc->sc_adc_rate = 0;
    305      1.1   scw 
    306      1.1   scw 	if (ac97_attach(&sc->sc_host_if, &sc->sc_dev)) {
    307      1.1   scw 		aprint_error("%s: Failed to attach primary codec\n",
    308      1.1   scw 		    sc->sc_dev.dv_xname);
    309      1.1   scw  fail:
    310      1.1   scw 		acu_reg_write(sc, AC97_GCR, 0);
    311      1.1   scw 		delay(100);
    312  1.1.4.2  yamt 		pxa2x0_clkman_config(CKEN_AC97, false);
    313      1.1   scw 		bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size);
    314      1.1   scw 		return;
    315      1.1   scw 	}
    316      1.1   scw 
    317      1.1   scw 	if (auconv_create_encodings(acu_formats, ACU_NFORMATS,
    318      1.1   scw 	    &sc->sc_encodings)) {
    319      1.1   scw 		aprint_error("%s: Failed to create encodings\n",
    320      1.1   scw 		    sc->sc_dev.dv_xname);
    321      1.1   scw 		if (sc->sc_codec_if != NULL)
    322      1.1   scw 			(sc->sc_codec_if->vtbl->detach)(sc->sc_codec_if);
    323      1.1   scw 		goto fail;
    324      1.1   scw 	}
    325      1.1   scw 
    326      1.1   scw 	sc->sc_audiodev = audio_attach_mi(&acu_hw_if, sc, &sc->sc_dev);
    327      1.1   scw 
    328      1.1   scw 	/*
    329      1.1   scw 	 * As a work-around for braindamage in the PXA250's AC97 controller
    330      1.1   scw 	 * (see errata #125), we hold the ACUNIT/Codec in Cold Reset until
    331      1.1   scw 	 * acu_open() is called. acu_close() also puts the controller into
    332      1.1   scw 	 * Cold Reset.
    333      1.1   scw 	 *
    334      1.1   scw 	 * While this won't necessarily prevent Rx FIFO overruns, it at least
    335      1.1   scw 	 * allows the user to recover by closing then re-opening the audio
    336      1.1   scw 	 * device.
    337      1.1   scw 	 */
    338      1.1   scw 	acu_reg_write(sc, AC97_GCR, 0);
    339      1.1   scw 	sc->sc_in_reset = 1;
    340      1.1   scw }
    341      1.1   scw 
    342      1.1   scw static int
    343      1.1   scw acu_codec_attach(void *arg, struct ac97_codec_if *aci)
    344      1.1   scw {
    345      1.1   scw 	struct acu_softc *sc = arg;
    346      1.1   scw 
    347      1.1   scw 	sc->sc_codec_if = aci;
    348      1.1   scw 	return (0);
    349      1.1   scw }
    350      1.1   scw 
    351      1.1   scw static int
    352      1.1   scw acu_codec_read(void *arg, u_int8_t codec_reg, u_int16_t *valp)
    353      1.1   scw {
    354      1.1   scw 	struct acu_softc *sc = arg;
    355      1.1   scw 	u_int32_t val;
    356      1.1   scw 	int s, reg, rv = 1;
    357      1.1   scw 
    358      1.1   scw 	/*
    359      1.1   scw 	 * If we're currently closed, return non-zero. The ac97 frontend
    360      1.1   scw 	 * will use its cached copy of the register instead.
    361      1.1   scw 	 */
    362      1.1   scw 	if (sc->sc_in_reset)
    363      1.1   scw 		return (1);
    364      1.1   scw 
    365      1.1   scw 	reg = AC97_CODEC_BASE(0) + codec_reg * 2;
    366      1.1   scw 
    367      1.1   scw 	s = splaudio();
    368      1.1   scw 
    369      1.1   scw 	if (!acu_codec_ready(sc) || (acu_reg_read(sc, AC97_CAR) & CAR_CAIP))
    370      1.1   scw 		goto out_nocar;
    371      1.1   scw 
    372      1.1   scw 	val = acu_reg_read(sc, AC97_GSR);
    373      1.1   scw 	val |= GSR_RDCS | GSR_SDONE;
    374      1.1   scw 	acu_reg_write(sc, AC97_GSR, val);
    375      1.1   scw 
    376      1.1   scw 	/*
    377      1.1   scw 	 * Dummy read to initiate the real read access
    378      1.1   scw 	 */
    379      1.1   scw 	(void) acu_reg_read(sc, reg);
    380      1.1   scw 	if (acu_wait_gsr(sc, GSR_SDONE))
    381      1.1   scw 		goto out;
    382      1.1   scw 
    383      1.1   scw 	(void) acu_reg_read(sc, reg);
    384      1.1   scw 	if (acu_wait_gsr(sc, GSR_SDONE))
    385      1.1   scw 		goto out;
    386      1.1   scw 
    387      1.1   scw 	val = acu_reg_read(sc, AC97_GSR);
    388      1.1   scw 	if (val & GSR_RDCS)
    389      1.1   scw 		goto out;
    390      1.1   scw 
    391      1.1   scw 	*valp = acu_reg_read(sc, reg);
    392      1.1   scw 	if (acu_wait_gsr(sc, GSR_SDONE))
    393      1.1   scw 		goto out;
    394      1.1   scw 
    395      1.1   scw 	rv = 0;
    396      1.1   scw 
    397      1.1   scw out:
    398      1.1   scw 	acu_reg_write(sc, AC97_CAR, 0);
    399      1.1   scw out_nocar:
    400      1.1   scw 	splx(s);
    401      1.1   scw 	delay(10);
    402      1.1   scw 	return (rv);
    403      1.1   scw }
    404      1.1   scw 
    405      1.1   scw static int
    406      1.1   scw acu_codec_write(void *arg, u_int8_t codec_reg, u_int16_t val)
    407      1.1   scw {
    408      1.1   scw 	struct acu_softc *sc = arg;
    409      1.1   scw 	u_int16_t rv;
    410      1.1   scw 	int s;
    411      1.1   scw 
    412      1.1   scw 	/*
    413      1.1   scw 	 * If we're currently closed, chances are the user is just
    414      1.1   scw 	 * tweaking mixer settings. Pretend the write succeeded.
    415      1.1   scw 	 * The ac97 frontend will cache the value anyway, and it'll
    416      1.1   scw 	 * be written correctly when the driver is opened.
    417      1.1   scw 	 */
    418      1.1   scw 	if (sc->sc_in_reset)
    419      1.1   scw 		return (0);
    420      1.1   scw 
    421      1.1   scw 	s = splaudio();
    422      1.1   scw 
    423      1.1   scw 	if (!acu_codec_ready(sc) || (acu_reg_read(sc, AC97_CAR) & CAR_CAIP)) {
    424      1.1   scw 		splx(s);
    425      1.1   scw 		return (1);
    426      1.1   scw 	}
    427      1.1   scw 
    428      1.1   scw 	rv = acu_reg_read(sc, AC97_GSR);
    429      1.1   scw 	rv |= GSR_RDCS | GSR_CDONE;
    430      1.1   scw 	acu_reg_write(sc, AC97_GSR, rv);
    431      1.1   scw 
    432      1.1   scw 	acu_reg_write(sc, AC97_CODEC_BASE(0) + codec_reg * 2, val);
    433      1.1   scw 
    434      1.1   scw 	/*
    435      1.1   scw 	 * Wait for the write to complete
    436      1.1   scw 	 */
    437      1.1   scw 	(void) acu_wait_gsr(sc, GSR_CDONE);
    438      1.1   scw 	acu_reg_write(sc, AC97_CAR, 0);
    439      1.1   scw 
    440      1.1   scw 	splx(s);
    441      1.1   scw 	delay(10);
    442      1.1   scw 	return (0);
    443      1.1   scw }
    444      1.1   scw 
    445      1.1   scw static int
    446      1.1   scw acu_codec_reset(void *arg)
    447      1.1   scw {
    448      1.1   scw 	struct acu_softc *sc = arg;
    449      1.1   scw 	u_int32_t rv;
    450      1.1   scw 
    451      1.1   scw 	rv = acu_reg_read(sc, AC97_GCR);
    452      1.1   scw 	acu_reg_write(sc, AC97_GCR, rv | GCR_WARM_RST);
    453      1.1   scw 	delay(100);
    454      1.1   scw 	acu_reg_write(sc, AC97_GCR, rv);
    455      1.1   scw 	delay(100);
    456      1.1   scw 
    457      1.1   scw 	if (acu_wait_gsr(sc, GSR_PCR)) {
    458      1.1   scw 		printf("%s: acu_codec_reset: failed to ready after reset\n",
    459      1.1   scw 		    sc->sc_dev.dv_xname);
    460      1.1   scw 		return (ETIMEDOUT);
    461      1.1   scw 	}
    462      1.1   scw 
    463      1.1   scw 	return (0);
    464      1.1   scw }
    465      1.1   scw 
    466      1.1   scw static int
    467      1.1   scw acu_intr(void *arg)
    468      1.1   scw {
    469      1.1   scw 	struct acu_softc *sc = arg;
    470      1.1   scw 	u_int32_t gsr, reg;
    471      1.1   scw 
    472      1.1   scw 	gsr = acu_reg_read(sc, AC97_GSR);
    473      1.1   scw 
    474      1.1   scw 	/*
    475      1.1   scw 	 * Tx FIFO underruns are no big deal. Just log it and ignore and
    476      1.1   scw 	 * subsequent underruns until the next time acu_trigger_output()
    477      1.1   scw 	 * is called.
    478      1.1   scw 	 */
    479      1.1   scw 	if ((gsr & GSR_POINT) && (acu_reg_read(sc, AC97_POCR) & AC97_FEFIE)) {
    480      1.1   scw 		acu_reg_write(sc, AC97_POCR, 0);
    481      1.1   scw 		reg = acu_reg_read(sc, AC97_POSR);
    482      1.1   scw 		acu_reg_write(sc, AC97_POSR, reg);
    483      1.1   scw 		printf("%s: Tx PCM Fifo underrun\n", sc->sc_dev.dv_xname);
    484      1.1   scw 	}
    485      1.1   scw 
    486      1.1   scw 	/*
    487      1.1   scw 	 * Rx FIFO overruns are a different story. See PAX250 Errata #125
    488      1.1   scw 	 * for the gory details.
    489      1.1   scw 	 * I don't see any way to gracefully recover from this problem,
    490      1.1   scw 	 * other than a issuing a Cold Reset in acu_close().
    491      1.1   scw 	 * The best we can do here is to report the problem on the console.
    492      1.1   scw 	 */
    493      1.1   scw 	if ((gsr & GSR_PIINT) && (acu_reg_read(sc, AC97_PICR) & AC97_FEFIE)) {
    494      1.1   scw 		acu_reg_write(sc, AC97_PICR, 0);
    495      1.1   scw 		reg = acu_reg_read(sc, AC97_PISR);
    496      1.1   scw 		acu_reg_write(sc, AC97_PISR, reg);
    497      1.1   scw 		printf("%s: Rx PCM Fifo overrun\n", sc->sc_dev.dv_xname);
    498      1.1   scw 	}
    499      1.1   scw 
    500      1.1   scw 	return (1);
    501      1.1   scw }
    502      1.1   scw 
    503      1.1   scw static int
    504      1.1   scw acu_open(void *arg, int flags)
    505      1.1   scw {
    506      1.1   scw 	struct acu_softc *sc = arg;
    507      1.1   scw 
    508      1.1   scw 	/*
    509      1.1   scw 	 * Deassert Cold Reset
    510      1.1   scw 	 */
    511      1.1   scw 	acu_reg_write(sc, AC97_GCR, GCR_COLD_RST);
    512      1.1   scw 	delay(100);
    513      1.1   scw 	acu_reg_write(sc, AC97_CAR, 0);
    514      1.1   scw 
    515      1.1   scw 	/*
    516      1.1   scw 	 * Wait for the primary codec to become ready
    517      1.1   scw 	 */
    518      1.1   scw 	if (acu_wait_gsr(sc, GSR_PCR))
    519      1.1   scw 		return (EIO);
    520      1.1   scw 	sc->sc_in_reset = 0;
    521      1.1   scw 
    522      1.1   scw 	/*
    523      1.1   scw 	 * Restore the codec port settings
    524      1.1   scw 	 */
    525      1.1   scw 	sc->sc_codec_if->vtbl->restore_ports(sc->sc_codec_if);
    526      1.1   scw 
    527      1.1   scw 	/*
    528      1.1   scw 	 * Need to reprogram the sample rates, since 'restore_ports'
    529      1.1   scw 	 * doesn't do it.
    530      1.1   scw 	 *
    531      1.1   scw 	 * XXX: These aren't the only two sample rate registers ...
    532      1.1   scw 	 */
    533      1.1   scw 	if (sc->sc_dac_rate)
    534      1.1   scw 		(void) sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if,
    535      1.1   scw 		    AC97_REG_PCM_FRONT_DAC_RATE, &sc->sc_dac_rate);
    536      1.1   scw 	if (sc->sc_adc_rate)
    537      1.1   scw 		(void) sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if,
    538      1.1   scw 		    AC97_REG_PCM_LR_ADC_RATE, &sc->sc_adc_rate);
    539      1.1   scw 
    540      1.1   scw 	return (0);
    541      1.1   scw }
    542      1.1   scw 
    543      1.1   scw static void
    544      1.1   scw acu_close(void *arg)
    545      1.1   scw {
    546      1.1   scw 	struct acu_softc *sc = arg;
    547      1.1   scw 
    548      1.1   scw 	/*
    549      1.1   scw 	 * Make sure the hardware is quiescent
    550      1.1   scw 	 */
    551      1.1   scw 	acu_halt_output(sc);
    552      1.1   scw 	acu_halt_input(sc);
    553      1.1   scw 	delay(100);
    554      1.1   scw 
    555      1.1   scw 	/* Assert Cold Reset */
    556      1.1   scw 	acu_reg_write(sc, AC97_GCR, 0);
    557      1.1   scw 	sc->sc_in_reset = 1;
    558      1.1   scw }
    559      1.1   scw 
    560      1.1   scw static int
    561      1.1   scw acu_query_encoding(void *arg, struct audio_encoding *fp)
    562      1.1   scw {
    563      1.1   scw 	struct acu_softc *sc = arg;
    564      1.1   scw 
    565      1.1   scw 	return (auconv_query_encoding(sc->sc_encodings, fp));
    566      1.1   scw }
    567      1.1   scw 
    568      1.1   scw static int
    569      1.1   scw acu_set_params(void *arg, int setmode, int usemode,
    570      1.1   scw     audio_params_t *play, audio_params_t *rec,
    571      1.1   scw     stream_filter_list_t *pfil, stream_filter_list_t *rfil)
    572      1.1   scw {
    573      1.1   scw 	struct acu_softc *sc = arg;
    574      1.1   scw 	struct audio_params *p;
    575      1.1   scw 	stream_filter_list_t *fil;
    576      1.1   scw 	int mode, err;
    577      1.1   scw 
    578      1.1   scw 	for (mode = AUMODE_RECORD; mode != -1;
    579      1.1   scw 	    mode = (mode == AUMODE_RECORD) ? AUMODE_PLAY : -1) {
    580      1.1   scw 		if ((setmode & mode) == 0)
    581      1.1   scw 			continue;
    582      1.1   scw 
    583      1.1   scw 		p = (mode == AUMODE_PLAY) ? play : rec;
    584      1.1   scw 
    585      1.1   scw 		if (p->sample_rate < 4000 || p->sample_rate > 48000 ||
    586      1.1   scw 		    (p->precision != 8 && p->precision != 16) ||
    587      1.1   scw 		    (p->channels != 1 && p->channels != 2)) {
    588      1.1   scw 			printf("acu_set_params: precision/channels botch\n");
    589      1.1   scw 			printf("acu_set_params: rate %d, prec %d, chan %d\n",
    590      1.1   scw 			    p->sample_rate, p->precision, p->channels);
    591      1.1   scw 			return (EINVAL);
    592      1.1   scw 		}
    593      1.1   scw 
    594      1.1   scw 		fil = (mode == AUMODE_PLAY) ? pfil : rfil;
    595      1.1   scw 		err = auconv_set_converter(acu_formats, ACU_NFORMATS,
    596  1.1.4.2  yamt 		    mode, p, true, fil);
    597      1.1   scw 		if (err < 0)
    598      1.1   scw 			return (EINVAL);
    599      1.1   scw 
    600      1.1   scw 		if (mode == AUMODE_PLAY) {
    601      1.1   scw 			err = sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if,
    602      1.1   scw 			    AC97_REG_PCM_FRONT_DAC_RATE, &play->sample_rate);
    603      1.1   scw 			sc->sc_dac_rate = play->sample_rate;
    604      1.1   scw 		} else {
    605      1.1   scw 			err = sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if,
    606      1.1   scw 			    AC97_REG_PCM_LR_ADC_RATE, &rec->sample_rate);
    607      1.1   scw 			sc->sc_adc_rate = rec->sample_rate;
    608      1.1   scw 		}
    609      1.1   scw 		if (err)
    610      1.1   scw 			return (EINVAL);
    611      1.1   scw 	}
    612      1.1   scw 
    613      1.1   scw 	return (0);
    614      1.1   scw }
    615      1.1   scw 
    616      1.1   scw static int
    617      1.1   scw acu_round_blocksize(void *arg, int blk, int mode, const audio_params_t *param)
    618      1.1   scw {
    619      1.1   scw 
    620      1.1   scw 	return (blk & ~0x1f);
    621      1.1   scw }
    622      1.1   scw 
    623      1.1   scw static int
    624      1.1   scw acu_getdev(void *addr, struct audio_device *retp)
    625      1.1   scw {
    626      1.1   scw 
    627      1.1   scw 	*retp = acu_device;
    628      1.1   scw 	return (0);
    629      1.1   scw }
    630      1.1   scw 
    631      1.1   scw static int
    632      1.1   scw acu_mixer_set_port(void *arg, mixer_ctrl_t *cp)
    633      1.1   scw {
    634      1.1   scw 	struct acu_softc *sc = arg;
    635      1.1   scw 
    636      1.1   scw 	return (sc->sc_codec_if->vtbl->mixer_set_port(sc->sc_codec_if, cp));
    637      1.1   scw }
    638      1.1   scw 
    639      1.1   scw static int
    640      1.1   scw acu_mixer_get_port(void *arg, mixer_ctrl_t *cp)
    641      1.1   scw {
    642      1.1   scw 	struct acu_softc *sc = arg;
    643      1.1   scw 
    644      1.1   scw 	return (sc->sc_codec_if->vtbl->mixer_get_port(sc->sc_codec_if, cp));
    645      1.1   scw }
    646      1.1   scw 
    647      1.1   scw static int
    648      1.1   scw acu_query_devinfo(void *arg, mixer_devinfo_t *dip)
    649      1.1   scw {
    650      1.1   scw 	struct acu_softc *sc = arg;
    651      1.1   scw 
    652      1.1   scw 	return (sc->sc_codec_if->vtbl->query_devinfo(sc->sc_codec_if, dip));
    653      1.1   scw }
    654      1.1   scw 
    655      1.1   scw static void *
    656      1.1   scw acu_malloc(void *arg, int direction, size_t size,
    657      1.1   scw     struct malloc_type *pool, int flags)
    658      1.1   scw {
    659      1.1   scw 	struct acu_softc *sc = arg;
    660      1.1   scw 	struct acu_dma *ad;
    661      1.1   scw 	int error;
    662      1.1   scw 
    663      1.1   scw 	if ((ad = malloc(sizeof(*ad), pool, flags)) == NULL)
    664      1.1   scw 		return (NULL);
    665      1.1   scw 
    666      1.1   scw 	if ((ad->ad_dx = pxa2x0_dmac_allocate_xfer(M_NOWAIT)) == NULL)
    667      1.1   scw 		goto error;
    668      1.1   scw 
    669      1.1   scw 	ad->ad_size = size;
    670      1.1   scw 
    671      1.1   scw 	error = bus_dmamem_alloc(sc->sc_dmat, size, 16, 0, ad->ad_segs,
    672      1.1   scw 	    ACU_N_SEGS, &ad->ad_nsegs, BUS_DMA_NOWAIT);
    673      1.1   scw 	if (error)
    674      1.1   scw 		goto free_xfer;
    675      1.1   scw 
    676      1.1   scw 	error = bus_dmamem_map(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs, size,
    677      1.1   scw 	    &ad->ad_addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT | BUS_DMA_NOCACHE);
    678      1.1   scw 	if (error)
    679      1.1   scw 		goto free_dmamem;
    680      1.1   scw 
    681      1.1   scw 	error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
    682      1.1   scw 	    BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ad->ad_map);
    683      1.1   scw 	if (error)
    684      1.1   scw 		goto unmap_dmamem;
    685      1.1   scw 
    686      1.1   scw 	error = bus_dmamap_load(sc->sc_dmat, ad->ad_map, ad->ad_addr, size,
    687      1.1   scw 	    NULL, BUS_DMA_NOWAIT);
    688      1.1   scw 	if (error) {
    689      1.1   scw 		bus_dmamap_destroy(sc->sc_dmat, ad->ad_map);
    690      1.1   scw unmap_dmamem:	bus_dmamem_unmap(sc->sc_dmat, ad->ad_addr, size);
    691      1.1   scw free_dmamem:	bus_dmamem_free(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs);
    692      1.1   scw free_xfer:	pxa2x0_dmac_free_xfer(ad->ad_dx);
    693      1.1   scw error:		free(ad, pool);
    694      1.1   scw 		return (NULL);
    695      1.1   scw 	}
    696      1.1   scw 
    697      1.1   scw 	ad->ad_dx->dx_cookie = sc;
    698      1.1   scw 	ad->ad_dx->dx_priority = DMAC_PRIORITY_HIGH;
    699      1.1   scw 	ad->ad_dx->dx_dev_width = DMAC_DEV_WIDTH_4;
    700      1.1   scw 	ad->ad_dx->dx_burst_size = DMAC_BURST_SIZE_32;
    701      1.1   scw 
    702      1.1   scw 	ad->ad_next = sc->sc_dmas;
    703      1.1   scw 	sc->sc_dmas = ad;
    704      1.1   scw 	return (KERNADDR(ad));
    705      1.1   scw }
    706      1.1   scw 
    707      1.1   scw static void
    708      1.1   scw acu_free(void *arg, void *ptr, struct malloc_type *pool)
    709      1.1   scw {
    710      1.1   scw 	struct acu_softc *sc = arg;
    711      1.1   scw 	struct acu_dma *ad, **adp;
    712      1.1   scw 
    713      1.1   scw 	for (adp = &sc->sc_dmas; (ad = *adp) != NULL; adp = &ad->ad_next) {
    714      1.1   scw 		if (KERNADDR(ad) == ptr) {
    715      1.1   scw 			pxa2x0_dmac_abort_xfer(ad->ad_dx);
    716      1.1   scw 			pxa2x0_dmac_free_xfer(ad->ad_dx);
    717      1.1   scw 			ad->ad_segs[0].ds_len = ad->ad_size;	/* XXX */
    718      1.1   scw 			bus_dmamap_unload(sc->sc_dmat, ad->ad_map);
    719      1.1   scw 			bus_dmamap_destroy(sc->sc_dmat, ad->ad_map);
    720      1.1   scw 			bus_dmamem_unmap(sc->sc_dmat, ad->ad_addr, ad->ad_size);
    721      1.1   scw 			bus_dmamem_free(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs);
    722      1.1   scw 			*adp = ad->ad_next;
    723      1.1   scw 			free(ad, pool);
    724      1.1   scw 			return;
    725      1.1   scw 		}
    726      1.1   scw 	}
    727      1.1   scw }
    728      1.1   scw 
    729      1.1   scw static size_t
    730      1.1   scw acu_round_buffersize(void *arg, int direction, size_t size)
    731      1.1   scw {
    732      1.1   scw 
    733      1.1   scw 	return (size);
    734      1.1   scw }
    735      1.1   scw 
    736      1.1   scw static paddr_t
    737      1.1   scw acu_mappage(void *arg, void *mem, off_t off, int prot)
    738      1.1   scw {
    739      1.1   scw 	struct acu_softc *sc = arg;
    740      1.1   scw 	struct acu_dma *ad;
    741      1.1   scw 
    742      1.1   scw 	if (off < 0)
    743      1.1   scw 		return (-1);
    744      1.1   scw 	for (ad = sc->sc_dmas; ad && KERNADDR(ad) != mem; ad = ad->ad_next)
    745      1.1   scw 		;
    746      1.1   scw 	if (ad == NULL)
    747      1.1   scw 		return (-1);
    748      1.1   scw 	return (bus_dmamem_mmap(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs,
    749      1.1   scw 	    off, prot, BUS_DMA_WAITOK));
    750      1.1   scw }
    751      1.1   scw 
    752      1.1   scw static int
    753      1.1   scw acu_get_props(void *arg)
    754      1.1   scw {
    755      1.1   scw 
    756      1.1   scw 	return (AUDIO_PROP_MMAP|AUDIO_PROP_INDEPENDENT|AUDIO_PROP_FULLDUPLEX);
    757      1.1   scw }
    758      1.1   scw 
    759      1.1   scw static int
    760      1.1   scw acu_halt_output(void *arg)
    761      1.1   scw {
    762      1.1   scw 	struct acu_softc *sc = arg;
    763      1.1   scw 	int s;
    764      1.1   scw 
    765      1.1   scw 	s = splaudio();
    766      1.1   scw 	if (sc->sc_txdma) {
    767      1.1   scw 		acu_reg_write(sc, AC97_POCR, 0);
    768      1.1   scw 		acu_reg_write(sc, AC97_POSR, AC97_FIFOE);
    769      1.1   scw 		pxa2x0_dmac_abort_xfer(sc->sc_txdma->ad_dx);
    770      1.1   scw 		sc->sc_txdma = NULL;
    771      1.1   scw 	}
    772      1.1   scw 	splx(s);
    773      1.1   scw 	return (0);
    774      1.1   scw }
    775      1.1   scw 
    776      1.1   scw static int
    777      1.1   scw acu_halt_input(void *arg)
    778      1.1   scw {
    779      1.1   scw 	struct acu_softc *sc = arg;
    780      1.1   scw 	int s;
    781      1.1   scw 
    782      1.1   scw 	s = splaudio();
    783      1.1   scw 	if (sc->sc_rxdma) {
    784      1.1   scw 		acu_reg_write(sc, AC97_PICR, 0);
    785      1.1   scw 		acu_reg_write(sc, AC97_PISR, AC97_FIFOE);
    786      1.1   scw 		pxa2x0_dmac_abort_xfer(sc->sc_rxdma->ad_dx);
    787      1.1   scw 		sc->sc_rxdma = NULL;
    788      1.1   scw 	}
    789      1.1   scw 	splx(s);
    790      1.1   scw 	return (0);
    791      1.1   scw }
    792      1.1   scw 
    793      1.1   scw static int
    794      1.1   scw acu_trigger_output(void *arg, void *start, void *end, int blksize,
    795      1.1   scw     void (*tx_func)(void *), void *tx_arg, const audio_params_t *param)
    796      1.1   scw {
    797      1.1   scw 	struct acu_softc *sc = arg;
    798      1.1   scw 	struct dmac_xfer *dx;
    799      1.1   scw 	struct acu_dma *ad;
    800      1.1   scw 	int rv;
    801      1.1   scw 
    802      1.1   scw 	if (sc->sc_txdma)
    803      1.1   scw 		return (EBUSY);
    804      1.1   scw 
    805      1.1   scw 	sc->sc_txfunc = tx_func;
    806      1.1   scw 	sc->sc_txarg = tx_arg;
    807      1.1   scw 
    808      1.1   scw 	for (ad = sc->sc_dmas; ad && KERNADDR(ad) != start; ad = ad->ad_next)
    809      1.1   scw 		;
    810      1.1   scw 	if (ad == NULL) {
    811      1.1   scw 		printf("acu_trigger_output: bad addr %p\n", start);
    812      1.1   scw 		return (EINVAL);
    813      1.1   scw 	}
    814      1.1   scw 
    815      1.1   scw 	sc->sc_txdma = ad;
    816      1.1   scw 	ad->ad_segs[0].ds_addr = ad->ad_map->dm_segs[0].ds_addr;
    817      1.1   scw 	ad->ad_segs[0].ds_len = (uintptr_t)end - (uintptr_t)start;
    818      1.1   scw 
    819      1.1   scw 	/*
    820      1.1   scw 	 * Fix up a looping DMA request.
    821      1.1   scw 	 * The 'done' function will be called for every 'blksize' bytes
    822      1.1   scw 	 * transferred by the DMA engine.
    823      1.1   scw 	 */
    824      1.1   scw 	dx = ad->ad_dx;
    825      1.1   scw 	dx->dx_done = acu_tx_loop_segment;
    826      1.1   scw 	dx->dx_peripheral = DMAC_PERIPH_AC97AUDIOTX;
    827      1.1   scw 	dx->dx_flow = DMAC_FLOW_CTRL_DEST;
    828      1.1   scw 	dx->dx_loop_notify = blksize;
    829  1.1.4.2  yamt 	dx->dx_desc[DMAC_DESC_SRC].xd_addr_hold = false;
    830      1.1   scw 	dx->dx_desc[DMAC_DESC_SRC].xd_nsegs = ad->ad_nsegs;
    831      1.1   scw 	dx->dx_desc[DMAC_DESC_SRC].xd_dma_segs = ad->ad_segs;
    832  1.1.4.2  yamt 	dx->dx_desc[DMAC_DESC_DST].xd_addr_hold = true;
    833      1.1   scw 	dx->dx_desc[DMAC_DESC_DST].xd_nsegs = 1;
    834      1.1   scw 	dx->dx_desc[DMAC_DESC_DST].xd_dma_segs = &sc->sc_dr;
    835      1.1   scw 
    836      1.1   scw 	rv = pxa2x0_dmac_start_xfer(dx);
    837      1.1   scw 	if (rv == 0) {
    838      1.1   scw 		/*
    839      1.1   scw 		 * XXX: We should only do this once the request has been
    840      1.1   scw 		 * loaded into a DMAC channel.
    841      1.1   scw 		 */
    842      1.1   scw 		acu_reg_write(sc, AC97_POSR, AC97_FIFOE);
    843      1.1   scw 		acu_reg_write(sc, AC97_POCR, AC97_FEFIE);
    844      1.1   scw 	}
    845      1.1   scw 
    846      1.1   scw 	return (rv);
    847      1.1   scw }
    848      1.1   scw 
    849      1.1   scw static int
    850      1.1   scw acu_trigger_input(void *arg, void *start, void *end, int blksize,
    851      1.1   scw     void (*rx_func)(void *), void *rx_arg, const audio_params_t *param)
    852      1.1   scw {
    853      1.1   scw 	struct acu_softc *sc = arg;
    854      1.1   scw 	struct dmac_xfer *dx;
    855      1.1   scw 	struct acu_dma *ad;
    856      1.1   scw 	int rv;
    857      1.1   scw 
    858      1.1   scw 	if (sc->sc_rxdma)
    859      1.1   scw 		return (EBUSY);
    860      1.1   scw 
    861      1.1   scw 	sc->sc_rxfunc = rx_func;
    862      1.1   scw 	sc->sc_rxarg = rx_arg;
    863      1.1   scw 
    864      1.1   scw 	for (ad = sc->sc_dmas; ad && KERNADDR(ad) != start; ad = ad->ad_next)
    865      1.1   scw 		;
    866      1.1   scw 	if (ad == NULL) {
    867      1.1   scw 		printf("acu_trigger_input: bad addr %p\n", start);
    868      1.1   scw 		return (EINVAL);
    869      1.1   scw 	}
    870      1.1   scw 
    871      1.1   scw 	sc->sc_rxdma = ad;
    872      1.1   scw 	ad->ad_segs[0].ds_addr = ad->ad_map->dm_segs[0].ds_addr;
    873      1.1   scw 	ad->ad_segs[0].ds_len = (uintptr_t)end - (uintptr_t)start;
    874      1.1   scw 
    875      1.1   scw 	/*
    876      1.1   scw 	 * Fix up a looping DMA request.
    877      1.1   scw 	 * The 'done' function will be called for every 'blksize' bytes
    878      1.1   scw 	 * transferred by the DMA engine.
    879      1.1   scw 	 */
    880      1.1   scw 	dx = ad->ad_dx;
    881      1.1   scw 	dx->dx_done = acu_rx_loop_segment;
    882      1.1   scw 	dx->dx_peripheral = DMAC_PERIPH_AC97AUDIORX;
    883      1.1   scw 	dx->dx_flow = DMAC_FLOW_CTRL_SRC;
    884      1.1   scw 	dx->dx_loop_notify = blksize;
    885  1.1.4.2  yamt 	dx->dx_desc[DMAC_DESC_DST].xd_addr_hold = false;
    886      1.1   scw 	dx->dx_desc[DMAC_DESC_DST].xd_nsegs = ad->ad_nsegs;
    887      1.1   scw 	dx->dx_desc[DMAC_DESC_DST].xd_dma_segs = ad->ad_segs;
    888  1.1.4.2  yamt 	dx->dx_desc[DMAC_DESC_SRC].xd_addr_hold = true;
    889      1.1   scw 	dx->dx_desc[DMAC_DESC_SRC].xd_nsegs = 1;
    890      1.1   scw 	dx->dx_desc[DMAC_DESC_SRC].xd_dma_segs = &sc->sc_dr;
    891      1.1   scw 
    892      1.1   scw 	rv = pxa2x0_dmac_start_xfer(dx);
    893      1.1   scw 
    894      1.1   scw 	if (rv == 0) {
    895      1.1   scw 		/*
    896      1.1   scw 		 * XXX: We should only do this once the request has been
    897      1.1   scw 		 * loaded into a DMAC channel.
    898      1.1   scw 		 */
    899      1.1   scw 		acu_reg_write(sc, AC97_PISR, AC97_FIFOE);
    900      1.1   scw 		acu_reg_write(sc, AC97_PICR, AC97_FEFIE);
    901      1.1   scw 	}
    902      1.1   scw 
    903      1.1   scw 	return (rv);
    904      1.1   scw }
    905      1.1   scw 
    906      1.1   scw static void
    907      1.1   scw acu_tx_loop_segment(struct dmac_xfer *dx, int status)
    908      1.1   scw {
    909      1.1   scw 	struct acu_softc *sc = dx->dx_cookie;
    910      1.1   scw 	struct acu_dma *ad;
    911      1.1   scw 	int s;
    912      1.1   scw 
    913      1.1   scw 	if ((ad = sc->sc_txdma) == NULL)
    914      1.1   scw 		panic("acu_tx_loop_segment: bad TX dma descriptor!");
    915      1.1   scw 
    916      1.1   scw 	if (ad->ad_dx != dx)
    917      1.1   scw 		panic("acu_tx_loop_segment: xfer mismatch!");
    918      1.1   scw 
    919      1.1   scw 	if (status) {
    920      1.1   scw 		printf(
    921      1.1   scw 		    "%s: acu_tx_loop_segment: non-zero completion status %d\n",
    922      1.1   scw 		    sc->sc_dev.dv_xname, status);
    923      1.1   scw 	}
    924      1.1   scw 
    925      1.1   scw 	s = splaudio();
    926      1.1   scw 	(sc->sc_txfunc)(sc->sc_txarg);
    927      1.1   scw 	splx(s);
    928      1.1   scw }
    929      1.1   scw 
    930      1.1   scw static void
    931      1.1   scw acu_rx_loop_segment(struct dmac_xfer *dx, int status)
    932      1.1   scw {
    933      1.1   scw 	struct acu_softc *sc = dx->dx_cookie;
    934      1.1   scw 	struct acu_dma *ad;
    935      1.1   scw 	int s;
    936      1.1   scw 
    937      1.1   scw 	if ((ad = sc->sc_rxdma) == NULL)
    938      1.1   scw 		panic("acu_rx_loop_segment: bad RX dma descriptor!");
    939      1.1   scw 
    940      1.1   scw 	if (ad->ad_dx != dx)
    941      1.1   scw 		panic("acu_rx_loop_segment: xfer mismatch!");
    942      1.1   scw 
    943      1.1   scw 	if (status) {
    944      1.1   scw 		printf(
    945      1.1   scw 		    "%s: acu_rx_loop_segment: non-zero completion status %d\n",
    946      1.1   scw 		    sc->sc_dev.dv_xname, status);
    947      1.1   scw 	}
    948      1.1   scw 
    949      1.1   scw 	s = splaudio();
    950      1.1   scw 	(sc->sc_rxfunc)(sc->sc_rxarg);
    951      1.1   scw 	splx(s);
    952      1.1   scw }
    953