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pxa2x0_ac97.c revision 1.6
      1  1.6  kiyohara /*	$NetBSD: pxa2x0_ac97.c,v 1.6 2007/08/21 11:39:11 kiyohara Exp $	*/
      2  1.1       scw 
      3  1.1       scw /*
      4  1.1       scw  * Copyright (c) 2003, 2005 Wasabi Systems, Inc.
      5  1.1       scw  * All rights reserved.
      6  1.1       scw  *
      7  1.1       scw  * Written by Steve C. Woodford for Wasabi Systems, Inc.
      8  1.1       scw  *
      9  1.1       scw  * Redistribution and use in source and binary forms, with or without
     10  1.1       scw  * modification, are permitted provided that the following conditions
     11  1.1       scw  * are met:
     12  1.1       scw  * 1. Redistributions of source code must retain the above copyright
     13  1.1       scw  *    notice, this list of conditions and the following disclaimer.
     14  1.1       scw  * 2. Redistributions in binary form must reproduce the above copyright
     15  1.1       scw  *    notice, this list of conditions and the following disclaimer in the
     16  1.1       scw  *    documentation and/or other materials provided with the distribution.
     17  1.1       scw  * 3. All advertising materials mentioning features or use of this software
     18  1.1       scw  *    must display the following acknowledgement:
     19  1.1       scw  *	This product includes software developed for the NetBSD Project by
     20  1.1       scw  *	Wasabi Systems, Inc.
     21  1.1       scw  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  1.1       scw  *    or promote products derived from this software without specific prior
     23  1.1       scw  *    written permission.
     24  1.1       scw  *
     25  1.1       scw  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  1.1       scw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  1.1       scw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  1.1       scw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  1.1       scw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  1.1       scw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  1.1       scw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  1.1       scw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  1.1       scw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  1.1       scw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  1.1       scw  * POSSIBILITY OF SUCH DAMAGE.
     36  1.1       scw  */
     37  1.1       scw 
     38  1.1       scw #include <sys/param.h>
     39  1.1       scw #include <sys/systm.h>
     40  1.1       scw #include <sys/device.h>
     41  1.1       scw #include <sys/kernel.h>
     42  1.1       scw #include <sys/malloc.h>
     43  1.1       scw #include <sys/select.h>
     44  1.1       scw #include <sys/audioio.h>
     45  1.1       scw 
     46  1.1       scw #include <machine/intr.h>
     47  1.1       scw #include <machine/bus.h>
     48  1.1       scw 
     49  1.1       scw #include <dev/audio_if.h>
     50  1.1       scw #include <dev/audiovar.h>
     51  1.1       scw #include <dev/mulaw.h>
     52  1.1       scw #include <dev/auconv.h>
     53  1.1       scw #include <dev/ic/ac97reg.h>
     54  1.1       scw #include <dev/ic/ac97var.h>
     55  1.1       scw 
     56  1.6  kiyohara #include <arm/xscale/pxa2x0cpu.h>
     57  1.1       scw #include <arm/xscale/pxa2x0reg.h>
     58  1.1       scw #include <arm/xscale/pxa2x0var.h>
     59  1.1       scw #include <arm/xscale/pxa2x0_gpio.h>
     60  1.1       scw #include <arm/xscale/pxa2x0_dmac.h>
     61  1.1       scw 
     62  1.1       scw #include "locators.h"
     63  1.1       scw 
     64  1.1       scw struct acu_dma {
     65  1.1       scw 	bus_dmamap_t ad_map;
     66  1.5  christos 	void *ad_addr;
     67  1.1       scw #define	ACU_N_SEGS	1	/* XXX: We don't support > 1 */
     68  1.1       scw 	bus_dma_segment_t ad_segs[ACU_N_SEGS];
     69  1.1       scw 	int ad_nsegs;
     70  1.1       scw 	size_t ad_size;
     71  1.1       scw 	struct dmac_xfer *ad_dx;
     72  1.1       scw 	struct acu_dma *ad_next;
     73  1.1       scw };
     74  1.1       scw 
     75  1.1       scw #define KERNADDR(ad) ((void *)((ad)->ad_addr))
     76  1.1       scw 
     77  1.1       scw struct acu_softc {
     78  1.1       scw 	struct device sc_dev;
     79  1.1       scw 	bus_space_tag_t sc_bust;
     80  1.1       scw 	bus_dma_tag_t sc_dmat;
     81  1.1       scw 	bus_space_handle_t sc_bush;
     82  1.1       scw 	void *sc_irqcookie;
     83  1.1       scw 	int sc_in_reset;
     84  1.1       scw 	u_int sc_dac_rate;
     85  1.1       scw 	u_int sc_adc_rate;
     86  1.1       scw 
     87  1.1       scw 	/* List of DMA ring-buffers allocated by acu_malloc() */
     88  1.1       scw 	struct acu_dma *sc_dmas;
     89  1.1       scw 
     90  1.1       scw 	/* Dummy DMA segment which points to the AC97 PCM Fifo register */
     91  1.1       scw 	bus_dma_segment_t sc_dr;
     92  1.1       scw 
     93  1.1       scw 	/* PCM Output (Tx) state */
     94  1.1       scw 	dmac_peripheral_t sc_txp;
     95  1.1       scw 	struct acu_dma *sc_txdma;
     96  1.1       scw 	void (*sc_txfunc)(void *);
     97  1.1       scw 	void *sc_txarg;
     98  1.1       scw 
     99  1.1       scw 	/* PCM Input (Rx) state */
    100  1.1       scw 	dmac_peripheral_t sc_rxp;
    101  1.1       scw 	struct acu_dma *sc_rxdma;
    102  1.1       scw 	void (*sc_rxfunc)(void *);
    103  1.1       scw 	void *sc_rxarg;
    104  1.1       scw 
    105  1.1       scw 	/* AC97 Codec State */
    106  1.1       scw 	struct ac97_codec_if *sc_codec_if;
    107  1.1       scw 	struct ac97_host_if sc_host_if;
    108  1.1       scw 
    109  1.1       scw 	/* Child audio(4) device */
    110  1.1       scw 	struct device *sc_audiodev;
    111  1.1       scw 
    112  1.1       scw 	/* auconv encodings */
    113  1.1       scw 	struct audio_encoding_set *sc_encodings;
    114  1.1       scw };
    115  1.1       scw 
    116  1.1       scw static int	pxaacu_match(struct device *, struct cfdata *, void *);
    117  1.1       scw static void	pxaacu_attach(struct device *, struct device *, void *);
    118  1.1       scw 
    119  1.1       scw CFATTACH_DECL(pxaacu, sizeof(struct acu_softc),
    120  1.1       scw     pxaacu_match, pxaacu_attach, NULL, NULL);
    121  1.1       scw 
    122  1.1       scw static int acu_codec_attach(void *, struct ac97_codec_if *);
    123  1.1       scw static int acu_codec_read(void *, u_int8_t, u_int16_t *);
    124  1.1       scw static int acu_codec_write(void *, u_int8_t, u_int16_t);
    125  1.1       scw static int acu_codec_reset(void *);
    126  1.1       scw static int acu_intr(void *);
    127  1.1       scw 
    128  1.1       scw static int acu_open(void *, int);
    129  1.1       scw static void acu_close(void *);
    130  1.1       scw static int acu_query_encoding(void *, struct audio_encoding *);
    131  1.1       scw static int acu_set_params(void *, int, int, audio_params_t *, audio_params_t *,
    132  1.1       scw 	    stream_filter_list_t *, stream_filter_list_t *);
    133  1.1       scw static int acu_round_blocksize(void *, int, int, const audio_params_t *);
    134  1.1       scw static int acu_halt_output(void *);
    135  1.1       scw static int acu_halt_input(void *);
    136  1.1       scw static int acu_trigger_output(void *, void *, void *, int, void (*)(void *),
    137  1.1       scw 	    void *, const audio_params_t *);
    138  1.1       scw static int acu_trigger_input(void *, void *, void *, int, void (*)(void *),
    139  1.1       scw 	    void *, const audio_params_t *);
    140  1.1       scw static void acu_tx_loop_segment(struct dmac_xfer *, int);
    141  1.1       scw static void acu_rx_loop_segment(struct dmac_xfer *, int);
    142  1.1       scw static int acu_getdev(void *, struct audio_device *);
    143  1.1       scw static int acu_mixer_set_port(void *, mixer_ctrl_t *);
    144  1.1       scw static int acu_mixer_get_port(void *, mixer_ctrl_t *);
    145  1.1       scw static int acu_query_devinfo(void *, mixer_devinfo_t *);
    146  1.1       scw static void *acu_malloc(void *, int, size_t, struct malloc_type *, int);
    147  1.1       scw static void acu_free(void *, void *, struct malloc_type *);
    148  1.1       scw static size_t acu_round_buffersize(void *, int, size_t);
    149  1.1       scw static paddr_t acu_mappage(void *, void *, off_t, int);
    150  1.1       scw static int acu_get_props(void *);
    151  1.1       scw 
    152  1.1       scw struct audio_hw_if acu_hw_if = {
    153  1.1       scw 	acu_open,
    154  1.1       scw 	acu_close,
    155  1.1       scw 	NULL,
    156  1.1       scw 	acu_query_encoding,
    157  1.1       scw 	acu_set_params,
    158  1.1       scw 	acu_round_blocksize,
    159  1.1       scw 	NULL,
    160  1.1       scw 	NULL,
    161  1.1       scw 	NULL,
    162  1.1       scw 	NULL,
    163  1.1       scw 	NULL,
    164  1.1       scw 	acu_halt_output,
    165  1.1       scw 	acu_halt_input,
    166  1.1       scw 	NULL,
    167  1.1       scw 	acu_getdev,
    168  1.1       scw 	NULL,
    169  1.1       scw 	acu_mixer_set_port,
    170  1.1       scw 	acu_mixer_get_port,
    171  1.1       scw 	acu_query_devinfo,
    172  1.1       scw 	acu_malloc,
    173  1.1       scw 	acu_free,
    174  1.1       scw 	acu_round_buffersize,
    175  1.1       scw 	acu_mappage,
    176  1.1       scw 	acu_get_props,
    177  1.1       scw 	acu_trigger_output,
    178  1.1       scw 	acu_trigger_input,
    179  1.1       scw 	NULL,
    180  1.1       scw };
    181  1.1       scw 
    182  1.1       scw struct audio_device acu_device = {
    183  1.1       scw 	"PXA250 AC97",
    184  1.1       scw 	"",
    185  1.1       scw 	"acu"
    186  1.1       scw };
    187  1.1       scw 
    188  1.1       scw static const struct audio_format acu_formats[] = {
    189  1.1       scw 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    190  1.1       scw 	 2, AUFMT_STEREO, 0, {4000, 48000}}
    191  1.1       scw };
    192  1.1       scw #define	ACU_NFORMATS	(sizeof(acu_formats) / sizeof(struct audio_format))
    193  1.1       scw 
    194  1.3     perry static inline u_int32_t
    195  1.1       scw acu_reg_read(struct acu_softc *sc, int reg)
    196  1.1       scw {
    197  1.1       scw 
    198  1.1       scw 	return (bus_space_read_4(sc->sc_bust, sc->sc_bush, reg));
    199  1.1       scw }
    200  1.1       scw 
    201  1.3     perry static inline void
    202  1.1       scw acu_reg_write(struct acu_softc *sc, int reg, u_int32_t val)
    203  1.1       scw {
    204  1.1       scw 
    205  1.1       scw 	bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);
    206  1.1       scw }
    207  1.1       scw 
    208  1.3     perry static inline int
    209  1.1       scw acu_codec_ready(struct acu_softc *sc)
    210  1.1       scw {
    211  1.1       scw 
    212  1.1       scw 	return (acu_reg_read(sc, AC97_GSR) & GSR_PCR);
    213  1.1       scw }
    214  1.1       scw 
    215  1.3     perry static inline int
    216  1.1       scw acu_wait_gsr(struct acu_softc *sc, u_int32_t bit)
    217  1.1       scw {
    218  1.1       scw 	int timeout;
    219  1.1       scw 	u_int32_t rv;
    220  1.1       scw 
    221  1.1       scw 	for (timeout = 5000; timeout; timeout--) {
    222  1.1       scw 		if ((rv = acu_reg_read(sc, AC97_GSR)) & bit) {
    223  1.1       scw 			acu_reg_write(sc, AC97_GSR, rv | bit);
    224  1.1       scw 			return (0);
    225  1.1       scw 		}
    226  1.1       scw 		delay(1);
    227  1.1       scw 	}
    228  1.1       scw 
    229  1.1       scw 	return (1);
    230  1.1       scw }
    231  1.1       scw 
    232  1.1       scw static int
    233  1.1       scw pxaacu_match(struct device *parent, struct cfdata *cf, void *aux)
    234  1.1       scw {
    235  1.1       scw 	struct pxaip_attach_args *pxa = aux;
    236  1.6  kiyohara 	struct pxa2x0_gpioconf *gpioconf;
    237  1.6  kiyohara 	u_int gpio;
    238  1.6  kiyohara 	int i;
    239  1.1       scw 
    240  1.1       scw 	if (pxa->pxa_addr != PXA2X0_AC97_BASE ||
    241  1.1       scw 	    pxa->pxa_intr != PXA2X0_INT_AC97)
    242  1.1       scw 		return (0);
    243  1.1       scw 
    244  1.6  kiyohara 	gpioconf = CPU_IS_PXA250 ? pxa25x_pxaacu_gpioconf :
    245  1.6  kiyohara 	    pxa27x_pxaacu_gpioconf;
    246  1.6  kiyohara 	for (i = 0; gpioconf[i].pin != -1; i++) {
    247  1.6  kiyohara 		gpio = pxa2x0_gpio_get_function(gpioconf[i].pin);
    248  1.6  kiyohara 		if (GPIO_FN(gpio) != GPIO_FN(gpioconf[i].value) ||
    249  1.6  kiyohara 		    GPIO_FN_IS_OUT(gpio) != GPIO_FN_IS_OUT(gpioconf[i].value))
    250  1.6  kiyohara 			return (0);
    251  1.6  kiyohara 	}
    252  1.6  kiyohara 
    253  1.1       scw 	pxa->pxa_size = PXA2X0_AC97_SIZE;
    254  1.1       scw 
    255  1.1       scw 	return (1);
    256  1.1       scw }
    257  1.1       scw 
    258  1.1       scw static void
    259  1.1       scw pxaacu_attach(struct device *parent, struct device *self, void *aux)
    260  1.1       scw {
    261  1.1       scw 	struct acu_softc *sc = (struct acu_softc *)self;
    262  1.1       scw 	struct pxaip_attach_args *pxa = aux;
    263  1.1       scw 
    264  1.1       scw 	sc->sc_bust = pxa->pxa_iot;
    265  1.1       scw 	sc->sc_dmat = pxa->pxa_dmat;
    266  1.1       scw 
    267  1.1       scw 	aprint_naive("\n");
    268  1.1       scw 	aprint_normal(": AC97 Controller\n");
    269  1.1       scw 
    270  1.1       scw 	if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0,
    271  1.1       scw 	    &sc->sc_bush)) {
    272  1.1       scw 		aprint_error("%s: Can't map registers!\n", sc->sc_dev.dv_xname);
    273  1.1       scw 		return;
    274  1.1       scw 	}
    275  1.1       scw 
    276  1.1       scw 	sc->sc_irqcookie = pxa2x0_intr_establish(pxa->pxa_intr, IPL_AUDIO,
    277  1.1       scw 	    acu_intr, sc);
    278  1.1       scw 	KASSERT(sc->sc_irqcookie != NULL);
    279  1.1       scw 
    280  1.1       scw 	/* Make sure the AC97 clock is enabled */
    281  1.4   thorpej 	pxa2x0_clkman_config(CKEN_AC97, true);
    282  1.1       scw 	delay(100);
    283  1.1       scw 
    284  1.1       scw 	/* Do a cold reset */
    285  1.1       scw 	acu_reg_write(sc, AC97_GCR, 0);
    286  1.1       scw 	delay(100);
    287  1.1       scw 	acu_reg_write(sc, AC97_GCR, GCR_COLD_RST);
    288  1.1       scw 	delay(100);
    289  1.1       scw 	acu_reg_write(sc, AC97_CAR, 0);
    290  1.1       scw 
    291  1.1       scw 	if (acu_wait_gsr(sc, GSR_PCR)) {
    292  1.1       scw 		acu_reg_write(sc, AC97_GCR, 0);
    293  1.1       scw 		delay(100);
    294  1.4   thorpej 		pxa2x0_clkman_config(CKEN_AC97, false);
    295  1.1       scw 		bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size);
    296  1.1       scw 		aprint_error("%s: Primary codec not ready\n",
    297  1.1       scw 		    sc->sc_dev.dv_xname);
    298  1.1       scw 		return;
    299  1.1       scw 	}
    300  1.1       scw 
    301  1.1       scw 	sc->sc_dr.ds_addr = pxa->pxa_addr + AC97_PCDR;
    302  1.1       scw 	sc->sc_dr.ds_len = 4;
    303  1.1       scw 
    304  1.1       scw 	sc->sc_codec_if = NULL;
    305  1.1       scw 	sc->sc_host_if.arg = sc;
    306  1.1       scw 	sc->sc_host_if.attach = acu_codec_attach;
    307  1.1       scw 	sc->sc_host_if.read = acu_codec_read;
    308  1.1       scw 	sc->sc_host_if.write = acu_codec_write;
    309  1.1       scw 	sc->sc_host_if.reset = acu_codec_reset;
    310  1.1       scw 	sc->sc_host_if.flags = NULL;
    311  1.1       scw 	sc->sc_in_reset = 0;
    312  1.1       scw 	sc->sc_dac_rate = sc->sc_adc_rate = 0;
    313  1.1       scw 
    314  1.1       scw 	if (ac97_attach(&sc->sc_host_if, &sc->sc_dev)) {
    315  1.1       scw 		aprint_error("%s: Failed to attach primary codec\n",
    316  1.1       scw 		    sc->sc_dev.dv_xname);
    317  1.1       scw  fail:
    318  1.1       scw 		acu_reg_write(sc, AC97_GCR, 0);
    319  1.1       scw 		delay(100);
    320  1.4   thorpej 		pxa2x0_clkman_config(CKEN_AC97, false);
    321  1.1       scw 		bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size);
    322  1.1       scw 		return;
    323  1.1       scw 	}
    324  1.1       scw 
    325  1.1       scw 	if (auconv_create_encodings(acu_formats, ACU_NFORMATS,
    326  1.1       scw 	    &sc->sc_encodings)) {
    327  1.1       scw 		aprint_error("%s: Failed to create encodings\n",
    328  1.1       scw 		    sc->sc_dev.dv_xname);
    329  1.1       scw 		if (sc->sc_codec_if != NULL)
    330  1.1       scw 			(sc->sc_codec_if->vtbl->detach)(sc->sc_codec_if);
    331  1.1       scw 		goto fail;
    332  1.1       scw 	}
    333  1.1       scw 
    334  1.1       scw 	sc->sc_audiodev = audio_attach_mi(&acu_hw_if, sc, &sc->sc_dev);
    335  1.1       scw 
    336  1.1       scw 	/*
    337  1.1       scw 	 * As a work-around for braindamage in the PXA250's AC97 controller
    338  1.1       scw 	 * (see errata #125), we hold the ACUNIT/Codec in Cold Reset until
    339  1.1       scw 	 * acu_open() is called. acu_close() also puts the controller into
    340  1.1       scw 	 * Cold Reset.
    341  1.1       scw 	 *
    342  1.1       scw 	 * While this won't necessarily prevent Rx FIFO overruns, it at least
    343  1.1       scw 	 * allows the user to recover by closing then re-opening the audio
    344  1.1       scw 	 * device.
    345  1.1       scw 	 */
    346  1.1       scw 	acu_reg_write(sc, AC97_GCR, 0);
    347  1.1       scw 	sc->sc_in_reset = 1;
    348  1.1       scw }
    349  1.1       scw 
    350  1.1       scw static int
    351  1.1       scw acu_codec_attach(void *arg, struct ac97_codec_if *aci)
    352  1.1       scw {
    353  1.1       scw 	struct acu_softc *sc = arg;
    354  1.1       scw 
    355  1.1       scw 	sc->sc_codec_if = aci;
    356  1.1       scw 	return (0);
    357  1.1       scw }
    358  1.1       scw 
    359  1.1       scw static int
    360  1.1       scw acu_codec_read(void *arg, u_int8_t codec_reg, u_int16_t *valp)
    361  1.1       scw {
    362  1.1       scw 	struct acu_softc *sc = arg;
    363  1.1       scw 	u_int32_t val;
    364  1.1       scw 	int s, reg, rv = 1;
    365  1.1       scw 
    366  1.1       scw 	/*
    367  1.1       scw 	 * If we're currently closed, return non-zero. The ac97 frontend
    368  1.1       scw 	 * will use its cached copy of the register instead.
    369  1.1       scw 	 */
    370  1.1       scw 	if (sc->sc_in_reset)
    371  1.1       scw 		return (1);
    372  1.1       scw 
    373  1.1       scw 	reg = AC97_CODEC_BASE(0) + codec_reg * 2;
    374  1.1       scw 
    375  1.1       scw 	s = splaudio();
    376  1.1       scw 
    377  1.1       scw 	if (!acu_codec_ready(sc) || (acu_reg_read(sc, AC97_CAR) & CAR_CAIP))
    378  1.1       scw 		goto out_nocar;
    379  1.1       scw 
    380  1.1       scw 	val = acu_reg_read(sc, AC97_GSR);
    381  1.1       scw 	val |= GSR_RDCS | GSR_SDONE;
    382  1.1       scw 	acu_reg_write(sc, AC97_GSR, val);
    383  1.1       scw 
    384  1.1       scw 	/*
    385  1.1       scw 	 * Dummy read to initiate the real read access
    386  1.1       scw 	 */
    387  1.1       scw 	(void) acu_reg_read(sc, reg);
    388  1.1       scw 	if (acu_wait_gsr(sc, GSR_SDONE))
    389  1.1       scw 		goto out;
    390  1.1       scw 
    391  1.1       scw 	(void) acu_reg_read(sc, reg);
    392  1.1       scw 	if (acu_wait_gsr(sc, GSR_SDONE))
    393  1.1       scw 		goto out;
    394  1.1       scw 
    395  1.1       scw 	val = acu_reg_read(sc, AC97_GSR);
    396  1.1       scw 	if (val & GSR_RDCS)
    397  1.1       scw 		goto out;
    398  1.1       scw 
    399  1.1       scw 	*valp = acu_reg_read(sc, reg);
    400  1.1       scw 	if (acu_wait_gsr(sc, GSR_SDONE))
    401  1.1       scw 		goto out;
    402  1.1       scw 
    403  1.1       scw 	rv = 0;
    404  1.1       scw 
    405  1.1       scw out:
    406  1.1       scw 	acu_reg_write(sc, AC97_CAR, 0);
    407  1.1       scw out_nocar:
    408  1.1       scw 	splx(s);
    409  1.1       scw 	delay(10);
    410  1.1       scw 	return (rv);
    411  1.1       scw }
    412  1.1       scw 
    413  1.1       scw static int
    414  1.1       scw acu_codec_write(void *arg, u_int8_t codec_reg, u_int16_t val)
    415  1.1       scw {
    416  1.1       scw 	struct acu_softc *sc = arg;
    417  1.1       scw 	u_int16_t rv;
    418  1.1       scw 	int s;
    419  1.1       scw 
    420  1.1       scw 	/*
    421  1.1       scw 	 * If we're currently closed, chances are the user is just
    422  1.1       scw 	 * tweaking mixer settings. Pretend the write succeeded.
    423  1.1       scw 	 * The ac97 frontend will cache the value anyway, and it'll
    424  1.1       scw 	 * be written correctly when the driver is opened.
    425  1.1       scw 	 */
    426  1.1       scw 	if (sc->sc_in_reset)
    427  1.1       scw 		return (0);
    428  1.1       scw 
    429  1.1       scw 	s = splaudio();
    430  1.1       scw 
    431  1.1       scw 	if (!acu_codec_ready(sc) || (acu_reg_read(sc, AC97_CAR) & CAR_CAIP)) {
    432  1.1       scw 		splx(s);
    433  1.1       scw 		return (1);
    434  1.1       scw 	}
    435  1.1       scw 
    436  1.1       scw 	rv = acu_reg_read(sc, AC97_GSR);
    437  1.1       scw 	rv |= GSR_RDCS | GSR_CDONE;
    438  1.1       scw 	acu_reg_write(sc, AC97_GSR, rv);
    439  1.1       scw 
    440  1.1       scw 	acu_reg_write(sc, AC97_CODEC_BASE(0) + codec_reg * 2, val);
    441  1.1       scw 
    442  1.1       scw 	/*
    443  1.1       scw 	 * Wait for the write to complete
    444  1.1       scw 	 */
    445  1.1       scw 	(void) acu_wait_gsr(sc, GSR_CDONE);
    446  1.1       scw 	acu_reg_write(sc, AC97_CAR, 0);
    447  1.1       scw 
    448  1.1       scw 	splx(s);
    449  1.1       scw 	delay(10);
    450  1.1       scw 	return (0);
    451  1.1       scw }
    452  1.1       scw 
    453  1.1       scw static int
    454  1.1       scw acu_codec_reset(void *arg)
    455  1.1       scw {
    456  1.1       scw 	struct acu_softc *sc = arg;
    457  1.1       scw 	u_int32_t rv;
    458  1.1       scw 
    459  1.1       scw 	rv = acu_reg_read(sc, AC97_GCR);
    460  1.1       scw 	acu_reg_write(sc, AC97_GCR, rv | GCR_WARM_RST);
    461  1.1       scw 	delay(100);
    462  1.1       scw 	acu_reg_write(sc, AC97_GCR, rv);
    463  1.1       scw 	delay(100);
    464  1.1       scw 
    465  1.1       scw 	if (acu_wait_gsr(sc, GSR_PCR)) {
    466  1.1       scw 		printf("%s: acu_codec_reset: failed to ready after reset\n",
    467  1.1       scw 		    sc->sc_dev.dv_xname);
    468  1.1       scw 		return (ETIMEDOUT);
    469  1.1       scw 	}
    470  1.1       scw 
    471  1.1       scw 	return (0);
    472  1.1       scw }
    473  1.1       scw 
    474  1.1       scw static int
    475  1.1       scw acu_intr(void *arg)
    476  1.1       scw {
    477  1.1       scw 	struct acu_softc *sc = arg;
    478  1.1       scw 	u_int32_t gsr, reg;
    479  1.1       scw 
    480  1.1       scw 	gsr = acu_reg_read(sc, AC97_GSR);
    481  1.1       scw 
    482  1.1       scw 	/*
    483  1.1       scw 	 * Tx FIFO underruns are no big deal. Just log it and ignore and
    484  1.1       scw 	 * subsequent underruns until the next time acu_trigger_output()
    485  1.1       scw 	 * is called.
    486  1.1       scw 	 */
    487  1.1       scw 	if ((gsr & GSR_POINT) && (acu_reg_read(sc, AC97_POCR) & AC97_FEFIE)) {
    488  1.1       scw 		acu_reg_write(sc, AC97_POCR, 0);
    489  1.1       scw 		reg = acu_reg_read(sc, AC97_POSR);
    490  1.1       scw 		acu_reg_write(sc, AC97_POSR, reg);
    491  1.1       scw 		printf("%s: Tx PCM Fifo underrun\n", sc->sc_dev.dv_xname);
    492  1.1       scw 	}
    493  1.1       scw 
    494  1.1       scw 	/*
    495  1.1       scw 	 * Rx FIFO overruns are a different story. See PAX250 Errata #125
    496  1.1       scw 	 * for the gory details.
    497  1.1       scw 	 * I don't see any way to gracefully recover from this problem,
    498  1.1       scw 	 * other than a issuing a Cold Reset in acu_close().
    499  1.1       scw 	 * The best we can do here is to report the problem on the console.
    500  1.1       scw 	 */
    501  1.1       scw 	if ((gsr & GSR_PIINT) && (acu_reg_read(sc, AC97_PICR) & AC97_FEFIE)) {
    502  1.1       scw 		acu_reg_write(sc, AC97_PICR, 0);
    503  1.1       scw 		reg = acu_reg_read(sc, AC97_PISR);
    504  1.1       scw 		acu_reg_write(sc, AC97_PISR, reg);
    505  1.1       scw 		printf("%s: Rx PCM Fifo overrun\n", sc->sc_dev.dv_xname);
    506  1.1       scw 	}
    507  1.1       scw 
    508  1.1       scw 	return (1);
    509  1.1       scw }
    510  1.1       scw 
    511  1.1       scw static int
    512  1.1       scw acu_open(void *arg, int flags)
    513  1.1       scw {
    514  1.1       scw 	struct acu_softc *sc = arg;
    515  1.1       scw 
    516  1.1       scw 	/*
    517  1.1       scw 	 * Deassert Cold Reset
    518  1.1       scw 	 */
    519  1.1       scw 	acu_reg_write(sc, AC97_GCR, GCR_COLD_RST);
    520  1.1       scw 	delay(100);
    521  1.1       scw 	acu_reg_write(sc, AC97_CAR, 0);
    522  1.1       scw 
    523  1.1       scw 	/*
    524  1.1       scw 	 * Wait for the primary codec to become ready
    525  1.1       scw 	 */
    526  1.1       scw 	if (acu_wait_gsr(sc, GSR_PCR))
    527  1.1       scw 		return (EIO);
    528  1.1       scw 	sc->sc_in_reset = 0;
    529  1.1       scw 
    530  1.1       scw 	/*
    531  1.1       scw 	 * Restore the codec port settings
    532  1.1       scw 	 */
    533  1.1       scw 	sc->sc_codec_if->vtbl->restore_ports(sc->sc_codec_if);
    534  1.1       scw 
    535  1.1       scw 	/*
    536  1.1       scw 	 * Need to reprogram the sample rates, since 'restore_ports'
    537  1.1       scw 	 * doesn't do it.
    538  1.1       scw 	 *
    539  1.1       scw 	 * XXX: These aren't the only two sample rate registers ...
    540  1.1       scw 	 */
    541  1.1       scw 	if (sc->sc_dac_rate)
    542  1.1       scw 		(void) sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if,
    543  1.1       scw 		    AC97_REG_PCM_FRONT_DAC_RATE, &sc->sc_dac_rate);
    544  1.1       scw 	if (sc->sc_adc_rate)
    545  1.1       scw 		(void) sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if,
    546  1.1       scw 		    AC97_REG_PCM_LR_ADC_RATE, &sc->sc_adc_rate);
    547  1.1       scw 
    548  1.1       scw 	return (0);
    549  1.1       scw }
    550  1.1       scw 
    551  1.1       scw static void
    552  1.1       scw acu_close(void *arg)
    553  1.1       scw {
    554  1.1       scw 	struct acu_softc *sc = arg;
    555  1.1       scw 
    556  1.1       scw 	/*
    557  1.1       scw 	 * Make sure the hardware is quiescent
    558  1.1       scw 	 */
    559  1.1       scw 	acu_halt_output(sc);
    560  1.1       scw 	acu_halt_input(sc);
    561  1.1       scw 	delay(100);
    562  1.1       scw 
    563  1.1       scw 	/* Assert Cold Reset */
    564  1.1       scw 	acu_reg_write(sc, AC97_GCR, 0);
    565  1.1       scw 	sc->sc_in_reset = 1;
    566  1.1       scw }
    567  1.1       scw 
    568  1.1       scw static int
    569  1.1       scw acu_query_encoding(void *arg, struct audio_encoding *fp)
    570  1.1       scw {
    571  1.1       scw 	struct acu_softc *sc = arg;
    572  1.1       scw 
    573  1.1       scw 	return (auconv_query_encoding(sc->sc_encodings, fp));
    574  1.1       scw }
    575  1.1       scw 
    576  1.1       scw static int
    577  1.1       scw acu_set_params(void *arg, int setmode, int usemode,
    578  1.1       scw     audio_params_t *play, audio_params_t *rec,
    579  1.1       scw     stream_filter_list_t *pfil, stream_filter_list_t *rfil)
    580  1.1       scw {
    581  1.1       scw 	struct acu_softc *sc = arg;
    582  1.1       scw 	struct audio_params *p;
    583  1.1       scw 	stream_filter_list_t *fil;
    584  1.1       scw 	int mode, err;
    585  1.1       scw 
    586  1.1       scw 	for (mode = AUMODE_RECORD; mode != -1;
    587  1.1       scw 	    mode = (mode == AUMODE_RECORD) ? AUMODE_PLAY : -1) {
    588  1.1       scw 		if ((setmode & mode) == 0)
    589  1.1       scw 			continue;
    590  1.1       scw 
    591  1.1       scw 		p = (mode == AUMODE_PLAY) ? play : rec;
    592  1.1       scw 
    593  1.1       scw 		if (p->sample_rate < 4000 || p->sample_rate > 48000 ||
    594  1.1       scw 		    (p->precision != 8 && p->precision != 16) ||
    595  1.1       scw 		    (p->channels != 1 && p->channels != 2)) {
    596  1.1       scw 			printf("acu_set_params: precision/channels botch\n");
    597  1.1       scw 			printf("acu_set_params: rate %d, prec %d, chan %d\n",
    598  1.1       scw 			    p->sample_rate, p->precision, p->channels);
    599  1.1       scw 			return (EINVAL);
    600  1.1       scw 		}
    601  1.1       scw 
    602  1.1       scw 		fil = (mode == AUMODE_PLAY) ? pfil : rfil;
    603  1.1       scw 		err = auconv_set_converter(acu_formats, ACU_NFORMATS,
    604  1.4   thorpej 		    mode, p, true, fil);
    605  1.1       scw 		if (err < 0)
    606  1.1       scw 			return (EINVAL);
    607  1.1       scw 
    608  1.1       scw 		if (mode == AUMODE_PLAY) {
    609  1.1       scw 			err = sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if,
    610  1.1       scw 			    AC97_REG_PCM_FRONT_DAC_RATE, &play->sample_rate);
    611  1.1       scw 			sc->sc_dac_rate = play->sample_rate;
    612  1.1       scw 		} else {
    613  1.1       scw 			err = sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if,
    614  1.1       scw 			    AC97_REG_PCM_LR_ADC_RATE, &rec->sample_rate);
    615  1.1       scw 			sc->sc_adc_rate = rec->sample_rate;
    616  1.1       scw 		}
    617  1.1       scw 		if (err)
    618  1.1       scw 			return (EINVAL);
    619  1.1       scw 	}
    620  1.1       scw 
    621  1.1       scw 	return (0);
    622  1.1       scw }
    623  1.1       scw 
    624  1.1       scw static int
    625  1.1       scw acu_round_blocksize(void *arg, int blk, int mode, const audio_params_t *param)
    626  1.1       scw {
    627  1.1       scw 
    628  1.1       scw 	return (blk & ~0x1f);
    629  1.1       scw }
    630  1.1       scw 
    631  1.1       scw static int
    632  1.1       scw acu_getdev(void *addr, struct audio_device *retp)
    633  1.1       scw {
    634  1.1       scw 
    635  1.1       scw 	*retp = acu_device;
    636  1.1       scw 	return (0);
    637  1.1       scw }
    638  1.1       scw 
    639  1.1       scw static int
    640  1.1       scw acu_mixer_set_port(void *arg, mixer_ctrl_t *cp)
    641  1.1       scw {
    642  1.1       scw 	struct acu_softc *sc = arg;
    643  1.1       scw 
    644  1.1       scw 	return (sc->sc_codec_if->vtbl->mixer_set_port(sc->sc_codec_if, cp));
    645  1.1       scw }
    646  1.1       scw 
    647  1.1       scw static int
    648  1.1       scw acu_mixer_get_port(void *arg, mixer_ctrl_t *cp)
    649  1.1       scw {
    650  1.1       scw 	struct acu_softc *sc = arg;
    651  1.1       scw 
    652  1.1       scw 	return (sc->sc_codec_if->vtbl->mixer_get_port(sc->sc_codec_if, cp));
    653  1.1       scw }
    654  1.1       scw 
    655  1.1       scw static int
    656  1.1       scw acu_query_devinfo(void *arg, mixer_devinfo_t *dip)
    657  1.1       scw {
    658  1.1       scw 	struct acu_softc *sc = arg;
    659  1.1       scw 
    660  1.1       scw 	return (sc->sc_codec_if->vtbl->query_devinfo(sc->sc_codec_if, dip));
    661  1.1       scw }
    662  1.1       scw 
    663  1.1       scw static void *
    664  1.1       scw acu_malloc(void *arg, int direction, size_t size,
    665  1.1       scw     struct malloc_type *pool, int flags)
    666  1.1       scw {
    667  1.1       scw 	struct acu_softc *sc = arg;
    668  1.1       scw 	struct acu_dma *ad;
    669  1.1       scw 	int error;
    670  1.1       scw 
    671  1.1       scw 	if ((ad = malloc(sizeof(*ad), pool, flags)) == NULL)
    672  1.1       scw 		return (NULL);
    673  1.1       scw 
    674  1.1       scw 	if ((ad->ad_dx = pxa2x0_dmac_allocate_xfer(M_NOWAIT)) == NULL)
    675  1.1       scw 		goto error;
    676  1.1       scw 
    677  1.1       scw 	ad->ad_size = size;
    678  1.1       scw 
    679  1.1       scw 	error = bus_dmamem_alloc(sc->sc_dmat, size, 16, 0, ad->ad_segs,
    680  1.1       scw 	    ACU_N_SEGS, &ad->ad_nsegs, BUS_DMA_NOWAIT);
    681  1.1       scw 	if (error)
    682  1.1       scw 		goto free_xfer;
    683  1.1       scw 
    684  1.1       scw 	error = bus_dmamem_map(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs, size,
    685  1.1       scw 	    &ad->ad_addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT | BUS_DMA_NOCACHE);
    686  1.1       scw 	if (error)
    687  1.1       scw 		goto free_dmamem;
    688  1.1       scw 
    689  1.1       scw 	error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
    690  1.1       scw 	    BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ad->ad_map);
    691  1.1       scw 	if (error)
    692  1.1       scw 		goto unmap_dmamem;
    693  1.1       scw 
    694  1.1       scw 	error = bus_dmamap_load(sc->sc_dmat, ad->ad_map, ad->ad_addr, size,
    695  1.1       scw 	    NULL, BUS_DMA_NOWAIT);
    696  1.1       scw 	if (error) {
    697  1.1       scw 		bus_dmamap_destroy(sc->sc_dmat, ad->ad_map);
    698  1.1       scw unmap_dmamem:	bus_dmamem_unmap(sc->sc_dmat, ad->ad_addr, size);
    699  1.1       scw free_dmamem:	bus_dmamem_free(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs);
    700  1.1       scw free_xfer:	pxa2x0_dmac_free_xfer(ad->ad_dx);
    701  1.1       scw error:		free(ad, pool);
    702  1.1       scw 		return (NULL);
    703  1.1       scw 	}
    704  1.1       scw 
    705  1.1       scw 	ad->ad_dx->dx_cookie = sc;
    706  1.1       scw 	ad->ad_dx->dx_priority = DMAC_PRIORITY_HIGH;
    707  1.1       scw 	ad->ad_dx->dx_dev_width = DMAC_DEV_WIDTH_4;
    708  1.1       scw 	ad->ad_dx->dx_burst_size = DMAC_BURST_SIZE_32;
    709  1.1       scw 
    710  1.1       scw 	ad->ad_next = sc->sc_dmas;
    711  1.1       scw 	sc->sc_dmas = ad;
    712  1.1       scw 	return (KERNADDR(ad));
    713  1.1       scw }
    714  1.1       scw 
    715  1.1       scw static void
    716  1.1       scw acu_free(void *arg, void *ptr, struct malloc_type *pool)
    717  1.1       scw {
    718  1.1       scw 	struct acu_softc *sc = arg;
    719  1.1       scw 	struct acu_dma *ad, **adp;
    720  1.1       scw 
    721  1.1       scw 	for (adp = &sc->sc_dmas; (ad = *adp) != NULL; adp = &ad->ad_next) {
    722  1.1       scw 		if (KERNADDR(ad) == ptr) {
    723  1.1       scw 			pxa2x0_dmac_abort_xfer(ad->ad_dx);
    724  1.1       scw 			pxa2x0_dmac_free_xfer(ad->ad_dx);
    725  1.1       scw 			ad->ad_segs[0].ds_len = ad->ad_size;	/* XXX */
    726  1.1       scw 			bus_dmamap_unload(sc->sc_dmat, ad->ad_map);
    727  1.1       scw 			bus_dmamap_destroy(sc->sc_dmat, ad->ad_map);
    728  1.1       scw 			bus_dmamem_unmap(sc->sc_dmat, ad->ad_addr, ad->ad_size);
    729  1.1       scw 			bus_dmamem_free(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs);
    730  1.1       scw 			*adp = ad->ad_next;
    731  1.1       scw 			free(ad, pool);
    732  1.1       scw 			return;
    733  1.1       scw 		}
    734  1.1       scw 	}
    735  1.1       scw }
    736  1.1       scw 
    737  1.1       scw static size_t
    738  1.1       scw acu_round_buffersize(void *arg, int direction, size_t size)
    739  1.1       scw {
    740  1.1       scw 
    741  1.1       scw 	return (size);
    742  1.1       scw }
    743  1.1       scw 
    744  1.1       scw static paddr_t
    745  1.1       scw acu_mappage(void *arg, void *mem, off_t off, int prot)
    746  1.1       scw {
    747  1.1       scw 	struct acu_softc *sc = arg;
    748  1.1       scw 	struct acu_dma *ad;
    749  1.1       scw 
    750  1.1       scw 	if (off < 0)
    751  1.1       scw 		return (-1);
    752  1.1       scw 	for (ad = sc->sc_dmas; ad && KERNADDR(ad) != mem; ad = ad->ad_next)
    753  1.1       scw 		;
    754  1.1       scw 	if (ad == NULL)
    755  1.1       scw 		return (-1);
    756  1.1       scw 	return (bus_dmamem_mmap(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs,
    757  1.1       scw 	    off, prot, BUS_DMA_WAITOK));
    758  1.1       scw }
    759  1.1       scw 
    760  1.1       scw static int
    761  1.1       scw acu_get_props(void *arg)
    762  1.1       scw {
    763  1.1       scw 
    764  1.1       scw 	return (AUDIO_PROP_MMAP|AUDIO_PROP_INDEPENDENT|AUDIO_PROP_FULLDUPLEX);
    765  1.1       scw }
    766  1.1       scw 
    767  1.1       scw static int
    768  1.1       scw acu_halt_output(void *arg)
    769  1.1       scw {
    770  1.1       scw 	struct acu_softc *sc = arg;
    771  1.1       scw 	int s;
    772  1.1       scw 
    773  1.1       scw 	s = splaudio();
    774  1.1       scw 	if (sc->sc_txdma) {
    775  1.1       scw 		acu_reg_write(sc, AC97_POCR, 0);
    776  1.1       scw 		acu_reg_write(sc, AC97_POSR, AC97_FIFOE);
    777  1.1       scw 		pxa2x0_dmac_abort_xfer(sc->sc_txdma->ad_dx);
    778  1.1       scw 		sc->sc_txdma = NULL;
    779  1.1       scw 	}
    780  1.1       scw 	splx(s);
    781  1.1       scw 	return (0);
    782  1.1       scw }
    783  1.1       scw 
    784  1.1       scw static int
    785  1.1       scw acu_halt_input(void *arg)
    786  1.1       scw {
    787  1.1       scw 	struct acu_softc *sc = arg;
    788  1.1       scw 	int s;
    789  1.1       scw 
    790  1.1       scw 	s = splaudio();
    791  1.1       scw 	if (sc->sc_rxdma) {
    792  1.1       scw 		acu_reg_write(sc, AC97_PICR, 0);
    793  1.1       scw 		acu_reg_write(sc, AC97_PISR, AC97_FIFOE);
    794  1.1       scw 		pxa2x0_dmac_abort_xfer(sc->sc_rxdma->ad_dx);
    795  1.1       scw 		sc->sc_rxdma = NULL;
    796  1.1       scw 	}
    797  1.1       scw 	splx(s);
    798  1.1       scw 	return (0);
    799  1.1       scw }
    800  1.1       scw 
    801  1.1       scw static int
    802  1.1       scw acu_trigger_output(void *arg, void *start, void *end, int blksize,
    803  1.1       scw     void (*tx_func)(void *), void *tx_arg, const audio_params_t *param)
    804  1.1       scw {
    805  1.1       scw 	struct acu_softc *sc = arg;
    806  1.1       scw 	struct dmac_xfer *dx;
    807  1.1       scw 	struct acu_dma *ad;
    808  1.1       scw 	int rv;
    809  1.1       scw 
    810  1.1       scw 	if (sc->sc_txdma)
    811  1.1       scw 		return (EBUSY);
    812  1.1       scw 
    813  1.1       scw 	sc->sc_txfunc = tx_func;
    814  1.1       scw 	sc->sc_txarg = tx_arg;
    815  1.1       scw 
    816  1.1       scw 	for (ad = sc->sc_dmas; ad && KERNADDR(ad) != start; ad = ad->ad_next)
    817  1.1       scw 		;
    818  1.1       scw 	if (ad == NULL) {
    819  1.1       scw 		printf("acu_trigger_output: bad addr %p\n", start);
    820  1.1       scw 		return (EINVAL);
    821  1.1       scw 	}
    822  1.1       scw 
    823  1.1       scw 	sc->sc_txdma = ad;
    824  1.1       scw 	ad->ad_segs[0].ds_addr = ad->ad_map->dm_segs[0].ds_addr;
    825  1.1       scw 	ad->ad_segs[0].ds_len = (uintptr_t)end - (uintptr_t)start;
    826  1.1       scw 
    827  1.1       scw 	/*
    828  1.1       scw 	 * Fix up a looping DMA request.
    829  1.1       scw 	 * The 'done' function will be called for every 'blksize' bytes
    830  1.1       scw 	 * transferred by the DMA engine.
    831  1.1       scw 	 */
    832  1.1       scw 	dx = ad->ad_dx;
    833  1.1       scw 	dx->dx_done = acu_tx_loop_segment;
    834  1.1       scw 	dx->dx_peripheral = DMAC_PERIPH_AC97AUDIOTX;
    835  1.1       scw 	dx->dx_flow = DMAC_FLOW_CTRL_DEST;
    836  1.1       scw 	dx->dx_loop_notify = blksize;
    837  1.4   thorpej 	dx->dx_desc[DMAC_DESC_SRC].xd_addr_hold = false;
    838  1.1       scw 	dx->dx_desc[DMAC_DESC_SRC].xd_nsegs = ad->ad_nsegs;
    839  1.1       scw 	dx->dx_desc[DMAC_DESC_SRC].xd_dma_segs = ad->ad_segs;
    840  1.4   thorpej 	dx->dx_desc[DMAC_DESC_DST].xd_addr_hold = true;
    841  1.1       scw 	dx->dx_desc[DMAC_DESC_DST].xd_nsegs = 1;
    842  1.1       scw 	dx->dx_desc[DMAC_DESC_DST].xd_dma_segs = &sc->sc_dr;
    843  1.1       scw 
    844  1.1       scw 	rv = pxa2x0_dmac_start_xfer(dx);
    845  1.1       scw 	if (rv == 0) {
    846  1.1       scw 		/*
    847  1.1       scw 		 * XXX: We should only do this once the request has been
    848  1.1       scw 		 * loaded into a DMAC channel.
    849  1.1       scw 		 */
    850  1.1       scw 		acu_reg_write(sc, AC97_POSR, AC97_FIFOE);
    851  1.1       scw 		acu_reg_write(sc, AC97_POCR, AC97_FEFIE);
    852  1.1       scw 	}
    853  1.1       scw 
    854  1.1       scw 	return (rv);
    855  1.1       scw }
    856  1.1       scw 
    857  1.1       scw static int
    858  1.1       scw acu_trigger_input(void *arg, void *start, void *end, int blksize,
    859  1.1       scw     void (*rx_func)(void *), void *rx_arg, const audio_params_t *param)
    860  1.1       scw {
    861  1.1       scw 	struct acu_softc *sc = arg;
    862  1.1       scw 	struct dmac_xfer *dx;
    863  1.1       scw 	struct acu_dma *ad;
    864  1.1       scw 	int rv;
    865  1.1       scw 
    866  1.1       scw 	if (sc->sc_rxdma)
    867  1.1       scw 		return (EBUSY);
    868  1.1       scw 
    869  1.1       scw 	sc->sc_rxfunc = rx_func;
    870  1.1       scw 	sc->sc_rxarg = rx_arg;
    871  1.1       scw 
    872  1.1       scw 	for (ad = sc->sc_dmas; ad && KERNADDR(ad) != start; ad = ad->ad_next)
    873  1.1       scw 		;
    874  1.1       scw 	if (ad == NULL) {
    875  1.1       scw 		printf("acu_trigger_input: bad addr %p\n", start);
    876  1.1       scw 		return (EINVAL);
    877  1.1       scw 	}
    878  1.1       scw 
    879  1.1       scw 	sc->sc_rxdma = ad;
    880  1.1       scw 	ad->ad_segs[0].ds_addr = ad->ad_map->dm_segs[0].ds_addr;
    881  1.1       scw 	ad->ad_segs[0].ds_len = (uintptr_t)end - (uintptr_t)start;
    882  1.1       scw 
    883  1.1       scw 	/*
    884  1.1       scw 	 * Fix up a looping DMA request.
    885  1.1       scw 	 * The 'done' function will be called for every 'blksize' bytes
    886  1.1       scw 	 * transferred by the DMA engine.
    887  1.1       scw 	 */
    888  1.1       scw 	dx = ad->ad_dx;
    889  1.1       scw 	dx->dx_done = acu_rx_loop_segment;
    890  1.1       scw 	dx->dx_peripheral = DMAC_PERIPH_AC97AUDIORX;
    891  1.1       scw 	dx->dx_flow = DMAC_FLOW_CTRL_SRC;
    892  1.1       scw 	dx->dx_loop_notify = blksize;
    893  1.4   thorpej 	dx->dx_desc[DMAC_DESC_DST].xd_addr_hold = false;
    894  1.1       scw 	dx->dx_desc[DMAC_DESC_DST].xd_nsegs = ad->ad_nsegs;
    895  1.1       scw 	dx->dx_desc[DMAC_DESC_DST].xd_dma_segs = ad->ad_segs;
    896  1.4   thorpej 	dx->dx_desc[DMAC_DESC_SRC].xd_addr_hold = true;
    897  1.1       scw 	dx->dx_desc[DMAC_DESC_SRC].xd_nsegs = 1;
    898  1.1       scw 	dx->dx_desc[DMAC_DESC_SRC].xd_dma_segs = &sc->sc_dr;
    899  1.1       scw 
    900  1.1       scw 	rv = pxa2x0_dmac_start_xfer(dx);
    901  1.1       scw 
    902  1.1       scw 	if (rv == 0) {
    903  1.1       scw 		/*
    904  1.1       scw 		 * XXX: We should only do this once the request has been
    905  1.1       scw 		 * loaded into a DMAC channel.
    906  1.1       scw 		 */
    907  1.1       scw 		acu_reg_write(sc, AC97_PISR, AC97_FIFOE);
    908  1.1       scw 		acu_reg_write(sc, AC97_PICR, AC97_FEFIE);
    909  1.1       scw 	}
    910  1.1       scw 
    911  1.1       scw 	return (rv);
    912  1.1       scw }
    913  1.1       scw 
    914  1.1       scw static void
    915  1.1       scw acu_tx_loop_segment(struct dmac_xfer *dx, int status)
    916  1.1       scw {
    917  1.1       scw 	struct acu_softc *sc = dx->dx_cookie;
    918  1.1       scw 	struct acu_dma *ad;
    919  1.1       scw 	int s;
    920  1.1       scw 
    921  1.1       scw 	if ((ad = sc->sc_txdma) == NULL)
    922  1.1       scw 		panic("acu_tx_loop_segment: bad TX dma descriptor!");
    923  1.1       scw 
    924  1.1       scw 	if (ad->ad_dx != dx)
    925  1.1       scw 		panic("acu_tx_loop_segment: xfer mismatch!");
    926  1.1       scw 
    927  1.1       scw 	if (status) {
    928  1.1       scw 		printf(
    929  1.1       scw 		    "%s: acu_tx_loop_segment: non-zero completion status %d\n",
    930  1.1       scw 		    sc->sc_dev.dv_xname, status);
    931  1.1       scw 	}
    932  1.1       scw 
    933  1.1       scw 	s = splaudio();
    934  1.1       scw 	(sc->sc_txfunc)(sc->sc_txarg);
    935  1.1       scw 	splx(s);
    936  1.1       scw }
    937  1.1       scw 
    938  1.1       scw static void
    939  1.1       scw acu_rx_loop_segment(struct dmac_xfer *dx, int status)
    940  1.1       scw {
    941  1.1       scw 	struct acu_softc *sc = dx->dx_cookie;
    942  1.1       scw 	struct acu_dma *ad;
    943  1.1       scw 	int s;
    944  1.1       scw 
    945  1.1       scw 	if ((ad = sc->sc_rxdma) == NULL)
    946  1.1       scw 		panic("acu_rx_loop_segment: bad RX dma descriptor!");
    947  1.1       scw 
    948  1.1       scw 	if (ad->ad_dx != dx)
    949  1.1       scw 		panic("acu_rx_loop_segment: xfer mismatch!");
    950  1.1       scw 
    951  1.1       scw 	if (status) {
    952  1.1       scw 		printf(
    953  1.1       scw 		    "%s: acu_rx_loop_segment: non-zero completion status %d\n",
    954  1.1       scw 		    sc->sc_dev.dv_xname, status);
    955  1.1       scw 	}
    956  1.1       scw 
    957  1.1       scw 	s = splaudio();
    958  1.1       scw 	(sc->sc_rxfunc)(sc->sc_rxarg);
    959  1.1       scw 	splx(s);
    960  1.1       scw }
    961