pxa2x0_ac97.c revision 1.10
1 /* $NetBSD: pxa2x0_ac97.c,v 1.10 2011/11/23 23:07:29 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2003, 2005 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/select.h> 44 #include <sys/audioio.h> 45 #include <sys/kmem.h> 46 47 #include <machine/intr.h> 48 #include <sys/bus.h> 49 50 #include <dev/audio_if.h> 51 #include <dev/audiovar.h> 52 #include <dev/mulaw.h> 53 #include <dev/auconv.h> 54 #include <dev/ic/ac97reg.h> 55 #include <dev/ic/ac97var.h> 56 57 #include <arm/xscale/pxa2x0cpu.h> 58 #include <arm/xscale/pxa2x0reg.h> 59 #include <arm/xscale/pxa2x0var.h> 60 #include <arm/xscale/pxa2x0_gpio.h> 61 #include <arm/xscale/pxa2x0_dmac.h> 62 63 #include "locators.h" 64 65 struct acu_dma { 66 bus_dmamap_t ad_map; 67 void *ad_addr; 68 #define ACU_N_SEGS 1 /* XXX: We don't support > 1 */ 69 bus_dma_segment_t ad_segs[ACU_N_SEGS]; 70 int ad_nsegs; 71 size_t ad_size; 72 struct dmac_xfer *ad_dx; 73 struct acu_dma *ad_next; 74 }; 75 76 #define KERNADDR(ad) ((void *)((ad)->ad_addr)) 77 78 struct acu_softc { 79 device_t sc_dev; 80 bus_space_tag_t sc_bust; 81 bus_dma_tag_t sc_dmat; 82 bus_space_handle_t sc_bush; 83 void *sc_irqcookie; 84 int sc_in_reset; 85 u_int sc_dac_rate; 86 u_int sc_adc_rate; 87 88 /* List of DMA ring-buffers allocated by acu_malloc() */ 89 struct acu_dma *sc_dmas; 90 91 /* Dummy DMA segment which points to the AC97 PCM Fifo register */ 92 bus_dma_segment_t sc_dr; 93 94 /* PCM Output (Tx) state */ 95 dmac_peripheral_t sc_txp; 96 struct acu_dma *sc_txdma; 97 void (*sc_txfunc)(void *); 98 void *sc_txarg; 99 100 /* PCM Input (Rx) state */ 101 dmac_peripheral_t sc_rxp; 102 struct acu_dma *sc_rxdma; 103 void (*sc_rxfunc)(void *); 104 void *sc_rxarg; 105 106 /* AC97 Codec State */ 107 struct ac97_codec_if *sc_codec_if; 108 struct ac97_host_if sc_host_if; 109 110 /* Child audio(4) device */ 111 struct device *sc_audiodev; 112 113 /* auconv encodings */ 114 struct audio_encoding_set *sc_encodings; 115 116 /* MPSAFE interfaces */ 117 kmutex_t sc_lock; 118 kmutex_t sc_intr_lock; 119 }; 120 121 static int pxaacu_match(device_t, cfdata_t, void *); 122 static void pxaacu_attach(device_t, device_t, void *); 123 124 CFATTACH_DECL_NEW(pxaacu, sizeof(struct acu_softc), 125 pxaacu_match, pxaacu_attach, NULL, NULL); 126 127 static int acu_codec_attach(void *, struct ac97_codec_if *); 128 static int acu_codec_read(void *, u_int8_t, u_int16_t *); 129 static int acu_codec_write(void *, u_int8_t, u_int16_t); 130 static int acu_codec_reset(void *); 131 static int acu_intr(void *); 132 133 static int acu_open(void *, int); 134 static void acu_close(void *); 135 static int acu_query_encoding(void *, struct audio_encoding *); 136 static int acu_set_params(void *, int, int, audio_params_t *, audio_params_t *, 137 stream_filter_list_t *, stream_filter_list_t *); 138 static int acu_round_blocksize(void *, int, int, const audio_params_t *); 139 static int acu_halt_output(void *); 140 static int acu_halt_input(void *); 141 static int acu_trigger_output(void *, void *, void *, int, void (*)(void *), 142 void *, const audio_params_t *); 143 static int acu_trigger_input(void *, void *, void *, int, void (*)(void *), 144 void *, const audio_params_t *); 145 static void acu_tx_loop_segment(struct dmac_xfer *, int); 146 static void acu_rx_loop_segment(struct dmac_xfer *, int); 147 static int acu_getdev(void *, struct audio_device *); 148 static int acu_mixer_set_port(void *, mixer_ctrl_t *); 149 static int acu_mixer_get_port(void *, mixer_ctrl_t *); 150 static int acu_query_devinfo(void *, mixer_devinfo_t *); 151 static void *acu_malloc(void *, int, size_t); 152 static void acu_free(void *, void *, size_t); 153 static size_t acu_round_buffersize(void *, int, size_t); 154 static paddr_t acu_mappage(void *, void *, off_t, int); 155 static int acu_get_props(void *); 156 static void acu_get_locks(void *, kmutex_t **, kmutex_t **); 157 158 struct audio_hw_if acu_hw_if = { 159 acu_open, 160 acu_close, 161 NULL, 162 acu_query_encoding, 163 acu_set_params, 164 acu_round_blocksize, 165 NULL, 166 NULL, 167 NULL, 168 NULL, 169 NULL, 170 acu_halt_output, 171 acu_halt_input, 172 NULL, 173 acu_getdev, 174 NULL, 175 acu_mixer_set_port, 176 acu_mixer_get_port, 177 acu_query_devinfo, 178 acu_malloc, 179 acu_free, 180 acu_round_buffersize, 181 acu_mappage, 182 acu_get_props, 183 acu_trigger_output, 184 acu_trigger_input, 185 NULL, 186 acu_get_locks, 187 }; 188 189 struct audio_device acu_device = { 190 "PXA250 AC97", 191 "", 192 "acu" 193 }; 194 195 static const struct audio_format acu_formats[] = { 196 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16, 197 2, AUFMT_STEREO, 0, {4000, 48000}} 198 }; 199 #define ACU_NFORMATS (sizeof(acu_formats) / sizeof(struct audio_format)) 200 201 static inline u_int32_t 202 acu_reg_read(struct acu_softc *sc, int reg) 203 { 204 205 return (bus_space_read_4(sc->sc_bust, sc->sc_bush, reg)); 206 } 207 208 static inline void 209 acu_reg_write(struct acu_softc *sc, int reg, u_int32_t val) 210 { 211 212 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val); 213 } 214 215 static inline int 216 acu_codec_ready(struct acu_softc *sc) 217 { 218 219 return (acu_reg_read(sc, AC97_GSR) & GSR_PCR); 220 } 221 222 static inline int 223 acu_wait_gsr(struct acu_softc *sc, u_int32_t bit) 224 { 225 int timeout; 226 u_int32_t rv; 227 228 for (timeout = 5000; timeout; timeout--) { 229 if ((rv = acu_reg_read(sc, AC97_GSR)) & bit) { 230 acu_reg_write(sc, AC97_GSR, rv | bit); 231 return (0); 232 } 233 delay(1); 234 } 235 236 return (1); 237 } 238 239 static int 240 pxaacu_match(device_t parent, cfdata_t cf, void *aux) 241 { 242 struct pxaip_attach_args *pxa = aux; 243 struct pxa2x0_gpioconf *gpioconf; 244 u_int gpio; 245 int i; 246 247 if (pxa->pxa_addr != PXA2X0_AC97_BASE || 248 pxa->pxa_intr != PXA2X0_INT_AC97) 249 return (0); 250 251 gpioconf = CPU_IS_PXA250 ? pxa25x_pxaacu_gpioconf : 252 pxa27x_pxaacu_gpioconf; 253 for (i = 0; gpioconf[i].pin != -1; i++) { 254 gpio = pxa2x0_gpio_get_function(gpioconf[i].pin); 255 if (GPIO_FN(gpio) != GPIO_FN(gpioconf[i].value) || 256 GPIO_FN_IS_OUT(gpio) != GPIO_FN_IS_OUT(gpioconf[i].value)) 257 return (0); 258 } 259 260 pxa->pxa_size = PXA2X0_AC97_SIZE; 261 262 return (1); 263 } 264 265 static void 266 pxaacu_attach(device_t parent, device_t self, void *aux) 267 { 268 struct acu_softc *sc = device_private(self); 269 struct pxaip_attach_args *pxa = aux; 270 271 sc->sc_dev = self; 272 sc->sc_bust = pxa->pxa_iot; 273 sc->sc_dmat = pxa->pxa_dmat; 274 275 aprint_naive("\n"); 276 aprint_normal(": AC97 Controller\n"); 277 278 if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0, 279 &sc->sc_bush)) { 280 aprint_error_dev(self, "Can't map registers!\n"); 281 return; 282 } 283 284 sc->sc_irqcookie = pxa2x0_intr_establish(pxa->pxa_intr, IPL_SCHED, 285 acu_intr, sc); 286 KASSERT(sc->sc_irqcookie != NULL); 287 288 /* Make sure the AC97 clock is enabled */ 289 pxa2x0_clkman_config(CKEN_AC97, true); 290 delay(100); 291 292 /* Do a cold reset */ 293 acu_reg_write(sc, AC97_GCR, 0); 294 delay(100); 295 acu_reg_write(sc, AC97_GCR, GCR_COLD_RST); 296 delay(100); 297 acu_reg_write(sc, AC97_CAR, 0); 298 299 if (acu_wait_gsr(sc, GSR_PCR)) { 300 acu_reg_write(sc, AC97_GCR, 0); 301 delay(100); 302 pxa2x0_clkman_config(CKEN_AC97, false); 303 bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size); 304 aprint_error_dev(self, "Primary codec not ready\n"); 305 return; 306 } 307 308 sc->sc_dr.ds_addr = pxa->pxa_addr + AC97_PCDR; 309 sc->sc_dr.ds_len = 4; 310 311 sc->sc_codec_if = NULL; 312 sc->sc_host_if.arg = sc; 313 sc->sc_host_if.attach = acu_codec_attach; 314 sc->sc_host_if.read = acu_codec_read; 315 sc->sc_host_if.write = acu_codec_write; 316 sc->sc_host_if.reset = acu_codec_reset; 317 sc->sc_host_if.flags = NULL; 318 sc->sc_in_reset = 0; 319 sc->sc_dac_rate = sc->sc_adc_rate = 0; 320 321 if (ac97_attach(&sc->sc_host_if, sc->sc_dev, &sc->sc_lock)) { 322 aprint_error_dev(self, "Failed to attach primary codec\n"); 323 fail: 324 acu_reg_write(sc, AC97_GCR, 0); 325 delay(100); 326 pxa2x0_clkman_config(CKEN_AC97, false); 327 bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size); 328 return; 329 } 330 331 if (auconv_create_encodings(acu_formats, ACU_NFORMATS, 332 &sc->sc_encodings)) { 333 aprint_error_dev(self, "Failed to create encodings\n"); 334 if (sc->sc_codec_if != NULL) 335 (sc->sc_codec_if->vtbl->detach)(sc->sc_codec_if); 336 goto fail; 337 } 338 339 sc->sc_audiodev = audio_attach_mi(&acu_hw_if, sc, sc->sc_dev); 340 341 /* 342 * As a work-around for braindamage in the PXA250's AC97 controller 343 * (see errata #125), we hold the ACUNIT/Codec in Cold Reset until 344 * acu_open() is called. acu_close() also puts the controller into 345 * Cold Reset. 346 * 347 * While this won't necessarily prevent Rx FIFO overruns, it at least 348 * allows the user to recover by closing then re-opening the audio 349 * device. 350 */ 351 acu_reg_write(sc, AC97_GCR, 0); 352 sc->sc_in_reset = 1; 353 } 354 355 static int 356 acu_codec_attach(void *arg, struct ac97_codec_if *aci) 357 { 358 struct acu_softc *sc = arg; 359 360 sc->sc_codec_if = aci; 361 return (0); 362 } 363 364 static int 365 acu_codec_read(void *arg, u_int8_t codec_reg, u_int16_t *valp) 366 { 367 struct acu_softc *sc = arg; 368 u_int32_t val; 369 int reg, rv = 1; 370 371 /* 372 * If we're currently closed, return non-zero. The ac97 frontend 373 * will use its cached copy of the register instead. 374 */ 375 if (sc->sc_in_reset) 376 return (1); 377 378 reg = AC97_CODEC_BASE(0) + codec_reg * 2; 379 380 mutex_spin_enter(&sc->sc_intr_lock); 381 382 if (!acu_codec_ready(sc) || (acu_reg_read(sc, AC97_CAR) & CAR_CAIP)) 383 goto out_nocar; 384 385 val = acu_reg_read(sc, AC97_GSR); 386 val |= GSR_RDCS | GSR_SDONE; 387 acu_reg_write(sc, AC97_GSR, val); 388 389 /* 390 * Dummy read to initiate the real read access 391 */ 392 (void) acu_reg_read(sc, reg); 393 if (acu_wait_gsr(sc, GSR_SDONE)) 394 goto out; 395 396 (void) acu_reg_read(sc, reg); 397 if (acu_wait_gsr(sc, GSR_SDONE)) 398 goto out; 399 400 val = acu_reg_read(sc, AC97_GSR); 401 if (val & GSR_RDCS) 402 goto out; 403 404 *valp = acu_reg_read(sc, reg); 405 if (acu_wait_gsr(sc, GSR_SDONE)) 406 goto out; 407 408 rv = 0; 409 410 out: 411 acu_reg_write(sc, AC97_CAR, 0); 412 out_nocar: 413 mutex_spin_exit(&sc->sc_intr_lock); 414 delay(10); 415 return (rv); 416 } 417 418 static int 419 acu_codec_write(void *arg, u_int8_t codec_reg, u_int16_t val) 420 { 421 struct acu_softc *sc = arg; 422 u_int16_t rv; 423 424 /* 425 * If we're currently closed, chances are the user is just 426 * tweaking mixer settings. Pretend the write succeeded. 427 * The ac97 frontend will cache the value anyway, and it'll 428 * be written correctly when the driver is opened. 429 */ 430 if (sc->sc_in_reset) 431 return (0); 432 433 mutex_spin_enter(&sc->sc_intr_lock); 434 435 if (!acu_codec_ready(sc) || (acu_reg_read(sc, AC97_CAR) & CAR_CAIP)) { 436 mutex_spin_exit(&sc->sc_intr_lock); 437 return (1); 438 } 439 440 rv = acu_reg_read(sc, AC97_GSR); 441 rv |= GSR_RDCS | GSR_CDONE; 442 acu_reg_write(sc, AC97_GSR, rv); 443 444 acu_reg_write(sc, AC97_CODEC_BASE(0) + codec_reg * 2, val); 445 446 /* 447 * Wait for the write to complete 448 */ 449 (void) acu_wait_gsr(sc, GSR_CDONE); 450 acu_reg_write(sc, AC97_CAR, 0); 451 452 mutex_spin_exit(&sc->sc_intr_lock); 453 delay(10); 454 return (0); 455 } 456 457 static int 458 acu_codec_reset(void *arg) 459 { 460 struct acu_softc *sc = arg; 461 u_int32_t rv; 462 463 rv = acu_reg_read(sc, AC97_GCR); 464 acu_reg_write(sc, AC97_GCR, rv | GCR_WARM_RST); 465 delay(100); 466 acu_reg_write(sc, AC97_GCR, rv); 467 delay(100); 468 469 if (acu_wait_gsr(sc, GSR_PCR)) { 470 aprint_error_dev(sc->sc_dev, 471 "acu_codec_reset: failed to ready after reset\n"); 472 return (ETIMEDOUT); 473 } 474 475 return (0); 476 } 477 478 static int 479 acu_intr(void *arg) 480 { 481 struct acu_softc *sc = arg; 482 u_int32_t gsr, reg; 483 484 mutex_spin_enter(&sc->sc_intr_lock); 485 gsr = acu_reg_read(sc, AC97_GSR); 486 487 /* 488 * Tx FIFO underruns are no big deal. Just log it and ignore and 489 * subsequent underruns until the next time acu_trigger_output() 490 * is called. 491 */ 492 if ((gsr & GSR_POINT) && (acu_reg_read(sc, AC97_POCR) & AC97_FEFIE)) { 493 acu_reg_write(sc, AC97_POCR, 0); 494 reg = acu_reg_read(sc, AC97_POSR); 495 acu_reg_write(sc, AC97_POSR, reg); 496 aprint_error_dev(sc->sc_dev, "Tx PCM Fifo underrun\n"); 497 } 498 499 /* 500 * Rx FIFO overruns are a different story. See PAX250 Errata #125 501 * for the gory details. 502 * I don't see any way to gracefully recover from this problem, 503 * other than a issuing a Cold Reset in acu_close(). 504 * The best we can do here is to report the problem on the console. 505 */ 506 if ((gsr & GSR_PIINT) && (acu_reg_read(sc, AC97_PICR) & AC97_FEFIE)) { 507 acu_reg_write(sc, AC97_PICR, 0); 508 reg = acu_reg_read(sc, AC97_PISR); 509 acu_reg_write(sc, AC97_PISR, reg); 510 aprint_error_dev(sc->sc_dev, "Rx PCM Fifo overrun\n"); 511 } 512 513 mutex_spin_exit(&sc->sc_intr_lock); 514 515 return (1); 516 } 517 518 static int 519 acu_open(void *arg, int flags) 520 { 521 struct acu_softc *sc = arg; 522 523 /* 524 * Deassert Cold Reset 525 */ 526 acu_reg_write(sc, AC97_GCR, GCR_COLD_RST); 527 delay(100); 528 acu_reg_write(sc, AC97_CAR, 0); 529 530 /* 531 * Wait for the primary codec to become ready 532 */ 533 if (acu_wait_gsr(sc, GSR_PCR)) 534 return (EIO); 535 sc->sc_in_reset = 0; 536 537 /* 538 * Restore the codec port settings 539 */ 540 sc->sc_codec_if->vtbl->restore_ports(sc->sc_codec_if); 541 542 /* 543 * Need to reprogram the sample rates, since 'restore_ports' 544 * doesn't do it. 545 * 546 * XXX: These aren't the only two sample rate registers ... 547 */ 548 if (sc->sc_dac_rate) 549 (void) sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if, 550 AC97_REG_PCM_FRONT_DAC_RATE, &sc->sc_dac_rate); 551 if (sc->sc_adc_rate) 552 (void) sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if, 553 AC97_REG_PCM_LR_ADC_RATE, &sc->sc_adc_rate); 554 555 return (0); 556 } 557 558 static void 559 acu_close(void *arg) 560 { 561 struct acu_softc *sc = arg; 562 563 /* 564 * Make sure the hardware is quiescent 565 */ 566 acu_halt_output(sc); 567 acu_halt_input(sc); 568 delay(100); 569 570 /* Assert Cold Reset */ 571 acu_reg_write(sc, AC97_GCR, 0); 572 sc->sc_in_reset = 1; 573 } 574 575 static int 576 acu_query_encoding(void *arg, struct audio_encoding *fp) 577 { 578 struct acu_softc *sc = arg; 579 580 return (auconv_query_encoding(sc->sc_encodings, fp)); 581 } 582 583 static int 584 acu_set_params(void *arg, int setmode, int usemode, 585 audio_params_t *play, audio_params_t *rec, 586 stream_filter_list_t *pfil, stream_filter_list_t *rfil) 587 { 588 struct acu_softc *sc = arg; 589 struct audio_params *p; 590 stream_filter_list_t *fil; 591 int mode, err; 592 593 for (mode = AUMODE_RECORD; mode != -1; 594 mode = (mode == AUMODE_RECORD) ? AUMODE_PLAY : -1) { 595 if ((setmode & mode) == 0) 596 continue; 597 598 p = (mode == AUMODE_PLAY) ? play : rec; 599 600 if (p->sample_rate < 4000 || p->sample_rate > 48000 || 601 (p->precision != 8 && p->precision != 16) || 602 (p->channels != 1 && p->channels != 2)) { 603 printf("acu_set_params: precision/channels botch\n"); 604 printf("acu_set_params: rate %d, prec %d, chan %d\n", 605 p->sample_rate, p->precision, p->channels); 606 return (EINVAL); 607 } 608 609 fil = (mode == AUMODE_PLAY) ? pfil : rfil; 610 err = auconv_set_converter(acu_formats, ACU_NFORMATS, 611 mode, p, true, fil); 612 if (err < 0) 613 return (EINVAL); 614 615 if (mode == AUMODE_PLAY) { 616 err = sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if, 617 AC97_REG_PCM_FRONT_DAC_RATE, &play->sample_rate); 618 sc->sc_dac_rate = play->sample_rate; 619 } else { 620 err = sc->sc_codec_if->vtbl->set_rate(sc->sc_codec_if, 621 AC97_REG_PCM_LR_ADC_RATE, &rec->sample_rate); 622 sc->sc_adc_rate = rec->sample_rate; 623 } 624 if (err) 625 return (EINVAL); 626 } 627 628 return (0); 629 } 630 631 static int 632 acu_round_blocksize(void *arg, int blk, int mode, const audio_params_t *param) 633 { 634 635 return (blk & ~0x1f); 636 } 637 638 static int 639 acu_getdev(void *addr, struct audio_device *retp) 640 { 641 642 *retp = acu_device; 643 return (0); 644 } 645 646 static int 647 acu_mixer_set_port(void *arg, mixer_ctrl_t *cp) 648 { 649 struct acu_softc *sc = arg; 650 651 return (sc->sc_codec_if->vtbl->mixer_set_port(sc->sc_codec_if, cp)); 652 } 653 654 static int 655 acu_mixer_get_port(void *arg, mixer_ctrl_t *cp) 656 { 657 struct acu_softc *sc = arg; 658 659 return (sc->sc_codec_if->vtbl->mixer_get_port(sc->sc_codec_if, cp)); 660 } 661 662 static int 663 acu_query_devinfo(void *arg, mixer_devinfo_t *dip) 664 { 665 struct acu_softc *sc = arg; 666 667 return (sc->sc_codec_if->vtbl->query_devinfo(sc->sc_codec_if, dip)); 668 } 669 670 static void * 671 acu_malloc(void *arg, int direction, size_t size) 672 { 673 struct acu_softc *sc = arg; 674 struct acu_dma *ad; 675 int error; 676 677 if ((ad = kmem_alloc(sizeof(*ad), KM_SLEEP)) == NULL) 678 return (NULL); 679 680 /* XXX */ 681 if ((ad->ad_dx = pxa2x0_dmac_allocate_xfer()) == NULL) 682 goto error; 683 684 ad->ad_size = size; 685 686 error = bus_dmamem_alloc(sc->sc_dmat, size, 16, 0, ad->ad_segs, 687 ACU_N_SEGS, &ad->ad_nsegs, BUS_DMA_WAITOK); 688 if (error) 689 goto free_xfer; 690 691 error = bus_dmamem_map(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs, size, 692 &ad->ad_addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_NOCACHE); 693 if (error) 694 goto free_dmamem; 695 696 error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 697 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, &ad->ad_map); 698 if (error) 699 goto unmap_dmamem; 700 701 error = bus_dmamap_load(sc->sc_dmat, ad->ad_map, ad->ad_addr, size, 702 NULL, BUS_DMA_WAITOK); 703 if (error) { 704 bus_dmamap_destroy(sc->sc_dmat, ad->ad_map); 705 unmap_dmamem: bus_dmamem_unmap(sc->sc_dmat, ad->ad_addr, size); 706 free_dmamem: bus_dmamem_free(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs); 707 free_xfer: pxa2x0_dmac_free_xfer(ad->ad_dx); 708 error: kmem_free(ad, sizeof(*ad)); 709 return (NULL); 710 } 711 712 ad->ad_dx->dx_cookie = sc; 713 ad->ad_dx->dx_priority = DMAC_PRIORITY_HIGH; 714 ad->ad_dx->dx_dev_width = DMAC_DEV_WIDTH_4; 715 ad->ad_dx->dx_burst_size = DMAC_BURST_SIZE_32; 716 717 ad->ad_next = sc->sc_dmas; 718 sc->sc_dmas = ad; 719 return (KERNADDR(ad)); 720 } 721 722 static void 723 acu_free(void *arg, void *ptr, size_t size) 724 { 725 struct acu_softc *sc = arg; 726 struct acu_dma *ad, **adp; 727 728 for (adp = &sc->sc_dmas; (ad = *adp) != NULL; adp = &ad->ad_next) { 729 if (KERNADDR(ad) == ptr) { 730 pxa2x0_dmac_abort_xfer(ad->ad_dx); 731 pxa2x0_dmac_free_xfer(ad->ad_dx); 732 ad->ad_segs[0].ds_len = ad->ad_size; /* XXX */ 733 bus_dmamap_unload(sc->sc_dmat, ad->ad_map); 734 bus_dmamap_destroy(sc->sc_dmat, ad->ad_map); 735 bus_dmamem_unmap(sc->sc_dmat, ad->ad_addr, ad->ad_size); 736 bus_dmamem_free(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs); 737 *adp = ad->ad_next; 738 kmem_free(ad, sizeof(*ad)); 739 return; 740 } 741 } 742 } 743 744 static size_t 745 acu_round_buffersize(void *arg, int direction, size_t size) 746 { 747 748 return (size); 749 } 750 751 static paddr_t 752 acu_mappage(void *arg, void *mem, off_t off, int prot) 753 { 754 struct acu_softc *sc = arg; 755 struct acu_dma *ad; 756 757 if (off < 0) 758 return (-1); 759 for (ad = sc->sc_dmas; ad && KERNADDR(ad) != mem; ad = ad->ad_next) 760 ; 761 if (ad == NULL) 762 return (-1); 763 return (bus_dmamem_mmap(sc->sc_dmat, ad->ad_segs, ad->ad_nsegs, 764 off, prot, BUS_DMA_WAITOK)); 765 } 766 767 static int 768 acu_get_props(void *arg) 769 { 770 771 return (AUDIO_PROP_MMAP|AUDIO_PROP_INDEPENDENT|AUDIO_PROP_FULLDUPLEX); 772 } 773 774 static void 775 acu_get_locks(void *opaque, kmutex_t **intr, kmutex_t **thread) 776 { 777 struct acu_softc *sc = opaque; 778 779 *intr = &sc->sc_intr_lock; 780 *thread = &sc->sc_lock; 781 } 782 783 static int 784 acu_halt_output(void *arg) 785 { 786 struct acu_softc *sc = arg; 787 788 mutex_spin_enter(&sc->sc_intr_lock); 789 if (sc->sc_txdma) { 790 acu_reg_write(sc, AC97_POCR, 0); 791 acu_reg_write(sc, AC97_POSR, AC97_FIFOE); 792 pxa2x0_dmac_abort_xfer(sc->sc_txdma->ad_dx); 793 sc->sc_txdma = NULL; 794 } 795 mutex_spin_exit(&sc->sc_intr_lock); 796 return (0); 797 } 798 799 static int 800 acu_halt_input(void *arg) 801 { 802 struct acu_softc *sc = arg; 803 804 mutex_spin_enter(&sc->sc_intr_lock); 805 if (sc->sc_rxdma) { 806 acu_reg_write(sc, AC97_PICR, 0); 807 acu_reg_write(sc, AC97_PISR, AC97_FIFOE); 808 pxa2x0_dmac_abort_xfer(sc->sc_rxdma->ad_dx); 809 sc->sc_rxdma = NULL; 810 } 811 mutex_spin_exit(&sc->sc_intr_lock); 812 return (0); 813 } 814 815 static int 816 acu_trigger_output(void *arg, void *start, void *end, int blksize, 817 void (*tx_func)(void *), void *tx_arg, const audio_params_t *param) 818 { 819 struct acu_softc *sc = arg; 820 struct dmac_xfer *dx; 821 struct acu_dma *ad; 822 int rv; 823 824 if (sc->sc_txdma) 825 return (EBUSY); 826 827 sc->sc_txfunc = tx_func; 828 sc->sc_txarg = tx_arg; 829 830 for (ad = sc->sc_dmas; ad && KERNADDR(ad) != start; ad = ad->ad_next) 831 ; 832 if (ad == NULL) { 833 printf("acu_trigger_output: bad addr %p\n", start); 834 return (EINVAL); 835 } 836 837 sc->sc_txdma = ad; 838 ad->ad_segs[0].ds_addr = ad->ad_map->dm_segs[0].ds_addr; 839 ad->ad_segs[0].ds_len = (uintptr_t)end - (uintptr_t)start; 840 841 /* 842 * Fix up a looping DMA request. 843 * The 'done' function will be called for every 'blksize' bytes 844 * transferred by the DMA engine. 845 */ 846 dx = ad->ad_dx; 847 dx->dx_done = acu_tx_loop_segment; 848 dx->dx_peripheral = DMAC_PERIPH_AC97AUDIOTX; 849 dx->dx_flow = DMAC_FLOW_CTRL_DEST; 850 dx->dx_loop_notify = blksize; 851 dx->dx_desc[DMAC_DESC_SRC].xd_addr_hold = false; 852 dx->dx_desc[DMAC_DESC_SRC].xd_nsegs = ad->ad_nsegs; 853 dx->dx_desc[DMAC_DESC_SRC].xd_dma_segs = ad->ad_segs; 854 dx->dx_desc[DMAC_DESC_DST].xd_addr_hold = true; 855 dx->dx_desc[DMAC_DESC_DST].xd_nsegs = 1; 856 dx->dx_desc[DMAC_DESC_DST].xd_dma_segs = &sc->sc_dr; 857 858 rv = pxa2x0_dmac_start_xfer(dx); 859 if (rv == 0) { 860 /* 861 * XXX: We should only do this once the request has been 862 * loaded into a DMAC channel. 863 */ 864 acu_reg_write(sc, AC97_POSR, AC97_FIFOE); 865 acu_reg_write(sc, AC97_POCR, AC97_FEFIE); 866 } 867 868 return (rv); 869 } 870 871 static int 872 acu_trigger_input(void *arg, void *start, void *end, int blksize, 873 void (*rx_func)(void *), void *rx_arg, const audio_params_t *param) 874 { 875 struct acu_softc *sc = arg; 876 struct dmac_xfer *dx; 877 struct acu_dma *ad; 878 int rv; 879 880 if (sc->sc_rxdma) 881 return (EBUSY); 882 883 sc->sc_rxfunc = rx_func; 884 sc->sc_rxarg = rx_arg; 885 886 for (ad = sc->sc_dmas; ad && KERNADDR(ad) != start; ad = ad->ad_next) 887 ; 888 if (ad == NULL) { 889 printf("acu_trigger_input: bad addr %p\n", start); 890 return (EINVAL); 891 } 892 893 sc->sc_rxdma = ad; 894 ad->ad_segs[0].ds_addr = ad->ad_map->dm_segs[0].ds_addr; 895 ad->ad_segs[0].ds_len = (uintptr_t)end - (uintptr_t)start; 896 897 /* 898 * Fix up a looping DMA request. 899 * The 'done' function will be called for every 'blksize' bytes 900 * transferred by the DMA engine. 901 */ 902 dx = ad->ad_dx; 903 dx->dx_done = acu_rx_loop_segment; 904 dx->dx_peripheral = DMAC_PERIPH_AC97AUDIORX; 905 dx->dx_flow = DMAC_FLOW_CTRL_SRC; 906 dx->dx_loop_notify = blksize; 907 dx->dx_desc[DMAC_DESC_DST].xd_addr_hold = false; 908 dx->dx_desc[DMAC_DESC_DST].xd_nsegs = ad->ad_nsegs; 909 dx->dx_desc[DMAC_DESC_DST].xd_dma_segs = ad->ad_segs; 910 dx->dx_desc[DMAC_DESC_SRC].xd_addr_hold = true; 911 dx->dx_desc[DMAC_DESC_SRC].xd_nsegs = 1; 912 dx->dx_desc[DMAC_DESC_SRC].xd_dma_segs = &sc->sc_dr; 913 914 rv = pxa2x0_dmac_start_xfer(dx); 915 916 if (rv == 0) { 917 /* 918 * XXX: We should only do this once the request has been 919 * loaded into a DMAC channel. 920 */ 921 acu_reg_write(sc, AC97_PISR, AC97_FIFOE); 922 acu_reg_write(sc, AC97_PICR, AC97_FEFIE); 923 } 924 925 return (rv); 926 } 927 928 static void 929 acu_tx_loop_segment(struct dmac_xfer *dx, int status) 930 { 931 struct acu_softc *sc = dx->dx_cookie; 932 struct acu_dma *ad; 933 934 if ((ad = sc->sc_txdma) == NULL) 935 panic("acu_tx_loop_segment: bad TX dma descriptor!"); 936 937 if (ad->ad_dx != dx) 938 panic("acu_tx_loop_segment: xfer mismatch!"); 939 940 if (status) { 941 aprint_error_dev(sc->sc_dev, 942 "acu_tx_loop_segment: non-zero completion status %d\n", 943 status); 944 } 945 946 mutex_spin_enter(&sc->sc_intr_lock); 947 (sc->sc_txfunc)(sc->sc_txarg); 948 mutex_spin_exit(&sc->sc_intr_lock); 949 } 950 951 static void 952 acu_rx_loop_segment(struct dmac_xfer *dx, int status) 953 { 954 struct acu_softc *sc = dx->dx_cookie; 955 struct acu_dma *ad; 956 957 if ((ad = sc->sc_rxdma) == NULL) 958 panic("acu_rx_loop_segment: bad RX dma descriptor!"); 959 960 if (ad->ad_dx != dx) 961 panic("acu_rx_loop_segment: xfer mismatch!"); 962 963 if (status) { 964 aprint_error_dev(sc->sc_dev, 965 "acu_rx_loop_segment: non-zero completion status %d\n", 966 status); 967 } 968 969 mutex_spin_enter(&sc->sc_intr_lock); 970 (sc->sc_rxfunc)(sc->sc_rxarg); 971 mutex_spin_exit(&sc->sc_intr_lock); 972 } 973
Indexes created Wed Oct 01 18:09:54 GMT 2025