pxa2x0_dmac.h revision 1.1.10.2
1 1.1.10.2 skrll /* $NetBSD: pxa2x0_dmac.h,v 1.1.10.2 2005/11/10 13:55:27 skrll Exp $ */ 2 1.1.10.2 skrll 3 1.1.10.2 skrll /* 4 1.1.10.2 skrll * Copyright (c) 2003, 2005 Wasabi Systems, Inc. 5 1.1.10.2 skrll * All rights reserved. 6 1.1.10.2 skrll * 7 1.1.10.2 skrll * Written by Steve C. Woodford for Wasabi Systems, Inc. 8 1.1.10.2 skrll * 9 1.1.10.2 skrll * Redistribution and use in source and binary forms, with or without 10 1.1.10.2 skrll * modification, are permitted provided that the following conditions 11 1.1.10.2 skrll * are met: 12 1.1.10.2 skrll * 1. Redistributions of source code must retain the above copyright 13 1.1.10.2 skrll * notice, this list of conditions and the following disclaimer. 14 1.1.10.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 15 1.1.10.2 skrll * notice, this list of conditions and the following disclaimer in the 16 1.1.10.2 skrll * documentation and/or other materials provided with the distribution. 17 1.1.10.2 skrll * 3. All advertising materials mentioning features or use of this software 18 1.1.10.2 skrll * must display the following acknowledgement: 19 1.1.10.2 skrll * This product includes software developed for the NetBSD Project by 20 1.1.10.2 skrll * Wasabi Systems, Inc. 21 1.1.10.2 skrll * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 1.1.10.2 skrll * or promote products derived from this software without specific prior 23 1.1.10.2 skrll * written permission. 24 1.1.10.2 skrll * 25 1.1.10.2 skrll * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 1.1.10.2 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.1.10.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.1.10.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 1.1.10.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.1.10.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.1.10.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.1.10.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.1.10.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.1.10.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.1.10.2 skrll * POSSIBILITY OF SUCH DAMAGE. 36 1.1.10.2 skrll */ 37 1.1.10.2 skrll 38 1.1.10.2 skrll #ifndef __PXA2X0_DMAC_H 39 1.1.10.2 skrll #define __PXA2X0_DMAC_H 40 1.1.10.2 skrll 41 1.1.10.2 skrll typedef u_int dmac_peripheral_t; 42 1.1.10.2 skrll #define DMAC_PERIPH_NONE (~0) 43 1.1.10.2 skrll #define DMAC_PERIPH_DREQ0 0 44 1.1.10.2 skrll #define DMAC_PERIPH_DREQ1 1 45 1.1.10.2 skrll #define DMAC_PERIPH_I2SRX 2 46 1.1.10.2 skrll #define DMAC_PERIPH_I2STX 3 47 1.1.10.2 skrll #define DMAC_PERIPH_BTUARTRX 4 48 1.1.10.2 skrll #define DMAC_PERIPH_BTUARTTX 5 49 1.1.10.2 skrll #define DMAC_PERIPH_FFUARTRX 6 50 1.1.10.2 skrll #define DMAC_PERIPH_FFUARTTX 7 51 1.1.10.2 skrll #define DMAC_PERIPH_AC97MIC 8 52 1.1.10.2 skrll #define DMAC_PERIPH_AC97MODEMRX 9 53 1.1.10.2 skrll #define DMAC_PERIPH_AC97MODEMTX 10 54 1.1.10.2 skrll #define DMAC_PERIPH_AC97AUDIORX 11 55 1.1.10.2 skrll #define DMAC_PERIPH_AC97AUDIOTX 12 56 1.1.10.2 skrll #define DMAC_PERIPH_SSPRX 13 57 1.1.10.2 skrll #define DMAC_PERIPH_SSPTX 14 58 1.1.10.2 skrll #define DMAC_PERIPH_FICPRX 17 59 1.1.10.2 skrll #define DMAC_PERIPH_FICPTX 18 60 1.1.10.2 skrll #define DMAC_PERIPH_STUARTRX 19 61 1.1.10.2 skrll #define DMAC_PERIPH_STUARTTX 20 62 1.1.10.2 skrll #define DMAC_PERIPH_MMCRX 21 63 1.1.10.2 skrll #define DMAC_PERIPH_MMCTX 22 64 1.1.10.2 skrll #define DMAC_PERIPH_USBEP(n) (24+(n)) /* for endpoint 1..4,6..9,11..14 */ 65 1.1.10.2 skrll #define DMAC_N_PERIPH 40 66 1.1.10.2 skrll 67 1.1.10.2 skrll typedef enum { 68 1.1.10.2 skrll #define DMAC_PRIORITY_NORMAL DMAC_PRIORITY_LOW 69 1.1.10.2 skrll DMAC_PRIORITY_LOW = 0, 70 1.1.10.2 skrll DMAC_PRIORITY_MED, 71 1.1.10.2 skrll DMAC_PRIORITY_HIGH 72 1.1.10.2 skrll } dmac_priority_t; 73 1.1.10.2 skrll 74 1.1.10.2 skrll typedef enum { 75 1.1.10.2 skrll DMAC_FLOW_CTRL_NONE, 76 1.1.10.2 skrll DMAC_FLOW_CTRL_SRC, 77 1.1.10.2 skrll DMAC_FLOW_CTRL_DEST 78 1.1.10.2 skrll } dmac_flow_ctrl_t; 79 1.1.10.2 skrll 80 1.1.10.2 skrll typedef enum { 81 1.1.10.2 skrll DMAC_DEV_WIDTH_DEFAULT = 0, 82 1.1.10.2 skrll DMAC_DEV_WIDTH_1, 83 1.1.10.2 skrll DMAC_DEV_WIDTH_2, 84 1.1.10.2 skrll DMAC_DEV_WIDTH_4 85 1.1.10.2 skrll } dmac_dev_width_t; 86 1.1.10.2 skrll 87 1.1.10.2 skrll typedef enum { 88 1.1.10.2 skrll DMAC_BURST_SIZE_8 = 1, 89 1.1.10.2 skrll DMAC_BURST_SIZE_16, 90 1.1.10.2 skrll DMAC_BURST_SIZE_32 91 1.1.10.2 skrll } dmac_burst_size_t; 92 1.1.10.2 skrll 93 1.1.10.2 skrll struct dmac_xfer_desc { 94 1.1.10.2 skrll /* 95 1.1.10.2 skrll * Hold the source/destination address. 96 1.1.10.2 skrll * Note that if this is TRUE, then xd_nsegs must be at least '1', 97 1.1.10.2 skrll * and the first dma segment in xd_dma_segs must have a non-zero 98 1.1.10.2 skrll * ds_len field. 99 1.1.10.2 skrll */ 100 1.1.10.2 skrll boolean_t xd_addr_hold; 101 1.1.10.2 skrll 102 1.1.10.2 skrll u_int xd_nsegs; 103 1.1.10.2 skrll bus_dma_segment_t *xd_dma_segs; 104 1.1.10.2 skrll }; 105 1.1.10.2 skrll 106 1.1.10.2 skrll struct dmac_xfer { 107 1.1.10.2 skrll /* 108 1.1.10.2 skrll * The following fields must be initialised by clients of the 109 1.1.10.2 skrll * DMAC driver. 110 1.1.10.2 skrll * The DMAC driver treats all these fields as Read-Only. 111 1.1.10.2 skrll */ 112 1.1.10.2 skrll 113 1.1.10.2 skrll /* Client-specific cookie for this request */ 114 1.1.10.2 skrll void *dx_cookie; 115 1.1.10.2 skrll 116 1.1.10.2 skrll /* Client function to invoke when the transfer completes */ 117 1.1.10.2 skrll void (*dx_done)(struct dmac_xfer *, int); 118 1.1.10.2 skrll 119 1.1.10.2 skrll /* Priority to assign to the transfer */ 120 1.1.10.2 skrll dmac_priority_t dx_priority; 121 1.1.10.2 skrll 122 1.1.10.2 skrll /* Peripheral device involved in the transfer */ 123 1.1.10.2 skrll dmac_peripheral_t dx_peripheral; 124 1.1.10.2 skrll 125 1.1.10.2 skrll /* Flow Control */ 126 1.1.10.2 skrll dmac_flow_ctrl_t dx_flow; 127 1.1.10.2 skrll 128 1.1.10.2 skrll /* Device width */ 129 1.1.10.2 skrll dmac_dev_width_t dx_dev_width; 130 1.1.10.2 skrll 131 1.1.10.2 skrll /* Burst size */ 132 1.1.10.2 skrll dmac_burst_size_t dx_burst_size; 133 1.1.10.2 skrll 134 1.1.10.2 skrll /* Loop notification period */ 135 1.1.10.2 skrll size_t dx_loop_notify; 136 1.1.10.2 skrll /* 137 1.1.10.2 skrll * Initialise dx_loop_notify to the following value if you do not 138 1.1.10.2 skrll * need to use the looping facility of the DMA engine. (Looping is 139 1.1.10.2 skrll * primarily for use by the AC97 driver, but may be of interest to 140 1.1.10.2 skrll * other drivers...) 141 1.1.10.2 skrll */ 142 1.1.10.2 skrll #define DMAC_DONT_LOOP 0 143 1.1.10.2 skrll 144 1.1.10.2 skrll /* Source/Destination descriptors */ 145 1.1.10.2 skrll struct dmac_xfer_desc dx_desc[2]; 146 1.1.10.2 skrll #define DMAC_DESC_SRC 0 147 1.1.10.2 skrll #define DMAC_DESC_DST 1 148 1.1.10.2 skrll }; 149 1.1.10.2 skrll 150 1.1.10.2 skrll extern struct dmac_xfer *pxa2x0_dmac_allocate_xfer(int); 151 1.1.10.2 skrll extern void pxa2x0_dmac_free_xfer(struct dmac_xfer *); 152 1.1.10.2 skrll extern int pxa2x0_dmac_start_xfer(struct dmac_xfer *); 153 1.1.10.2 skrll extern void pxa2x0_dmac_abort_xfer(struct dmac_xfer *); 154 1.1.10.2 skrll 155 1.1.10.2 skrll #endif /* __PXA2X0_DMAC_H */ 156
Indexes created Wed Oct 22 00:09:40 GMT 2025